LMD20N06A LEIDITECH

Document overview

  • Manufacturer or author: Provided By www.digicamel.com(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 5

Technical content

  • VDS 60V
  • ID 20A
  • RDS(ON)( at VGS=10V) ＜43mohm
  • RDS(ON)( at VGS=4.5V) ＜47 mohm
  • 100% UIS Tested
  • 100% ▽VDS Tested General Description
  • Trench Power MV MOSFET technology
  • Excellent package for heat dissipation
  • High density cell design for low RDS(ON)

Applications

  • DC-DC Converters
  • Power management functions
  • Backlighting ■ Absolute Maximum Ratings (TA=25℃unless otherwise noted) Parameter Symbol Limit Unit Drain-source Voltage VDS 60 V Gate-source Voltage VGS ±20 V Drain Current TC=25℃ ID A TC=100℃ 14 Pulsed Drain Current A IDM 60 A Total Power Dissipation TC=25℃ PD 34 W TC=100℃ 17 W Single Pulse Avalanche Energy B EAS 20 mJ Thermal Resistance Junction-to-Case C RθJC 4.4 ℃/ W Junction and Storage Temperature Range TJ ,TSTG -55～+175 ℃ ■ Ordering Information (Example) PREFERED P/N PACKING CODE Marking MINIMUM PACKAGE(pcs) INNER BOX QUANTITY(pcs) OUTER CARTON QUANTITY(pcs) DELIVERY MODE LMD20N06A F2 2500 2500 13“ reel LMD20N06A Enhancement Mode Field Effect Transistor N-Channel Rev : www.leiditech.com 01.06.2018 1/5

■ Electrical Characteristics (TJ=25℃ unless otherwise noted) Parameter Symbol Conditions Min Typ Max Units Static Parameter Drain-Source Breakdown Voltage BVDSS VGS= 0V, ID=250μA 60 V Zero Gate Voltage Drain Current IDSS VDS=60V,VGS=0V TJ=25℃ 1 μA TJ=55℃ 5 Gate-Body Leakage Current IGSS VGS= ±20V, VDS=0V ±100 nA Gate Threshold Voltage VGS(th) VDS= VGS, ID=250μA 1.0 1.5 2.5 V Static Drain-Source On-Resistance RDS(ON) VGS= 10V, ID=20A 34 43 mΩ VGS= 4.5V, ID=10A 36 47 Diode Forward Voltage VSD IS=10A,VGS=0V 0.8 1.2 V Maximum Body-Diode Continuous Current IS 20 A Dynamic Parameters Input Capacitance Ciss VDS=30V,VGS=0V,f=1MHZ 800 pF Output Capacitance Coss 68 Reverse Transfer Capacitance Crss 36 Switching Parameters Total Gate Charge Qg VGS=10V,VDS=30V,ID=10A nC Gate-Source Charge Qgs 2.4 Gate-Drain Charge Qgd 2.5 Reverse Recovery Charge Qrr IF=20A, di/dt=500A/us Reverse Recovery Time trr 45 ns Turn-on Delay Time tD(on) VGS=10V,VDD=30V, ID=2A,RL=1Ω RGEN=3Ω Turn-on Rise Time tr 39 Turn-off Delay Time tD(off) 19 Turn-off fall Time tf 7 A. Pulse Test: Pulse Width≤300us,Duty cycle ≤2%. B. Tj=25℃, VDD=30V, VG=10V, L=0.5mH, Rg=25Ω. C. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design, while RθJA is determined by the board design. The maximum rating presented here is based on mounting on a 1 in 2 pad of 2oz copper. LMD20N06A Rev : www.leiditech.com 01.06.2018 2/5

■ Typical Performance Characteristics Figure1. Output Characteristics Figure2. Transfer Characteristics Figure3. Capacitance Characteristics Figure4. Gate Charge Figure5. Drain-Source on Resistance Figure6. Drain-Source on Resistance LMD20N06A Rev : www.leiditech.com 01.06.2018 3/5

Figure7. Safe Operation Area Figure8. Switching wave LMD20N06A Rev : www.leiditech.com 01.06.2018 4/5

■ TO-252 Package information LMD20N06A Shanghai Leiditech Electronic Co.,Ltd Email: sale1@leiditech.com Tel : +86- 021 50828806 Fax : +86- 021 50477059 Rev : www.leiditech.com 01.06.2018 5/5