High-Performance, Step-Up DC-DC Converter for High-Power Apps in Mobile Devices datasheet (Rev. C)

Document overview

  • Manufacturer or author: Texas Instruments, Incorporated [SNVS647,C]
  • PDF pages: 20

Technical content

3.6V 1 PH 4.7 PF 4.7 PF 0.05F to 1.0F LM8850 www.ti.com SNVS647C –AUGUST 2010–REVISED MAY 2013 LM8850High-Performance,Step-UpDC-DCConverterforHigh-PowerApplicationsin MobileDevices Check forSamples: LM8850 1FEATURES APPLICATIONS 2• 6µA typ.QuiescentCurrent • FlashLED

  • VOUT = 3.6Vto5.7V(max VO = 5.7V) • MobilePhones
  • Operates from a SingleLithiumIonCell(2.3V • WiMAX to5.5V) • USB
  • 8 User-selectableOutput VoltagesviaI2C • Audio Amplifier
  • High-speed 3.4MHz I2C-compatibleInterface DESCRIPTION• Up to1.0A Maximum Load CurrentCapability LM8850 isa step-upDC-DC converteroptimizedfor• 4 LevelsofCurrentLimiting use witha supercapacitorto protecta batteryfrom• Auto-mode Operationand Forced PWM power surges and enable new high power
  • 2.5MHz SwitchingDrequency (typ.) applicationsin mobile device architectures.The device creates an idealrailfrom 3.6V to 5.7V• ±2.5% DC Output VoltagePrecision boostingfroma singleLi-Ioncellwithan inputvoltage• 1.0µH Inductor(2520Case Size) range of2.3V to5.5V;TargetVOUT must be atleast
  • 4.7µF Inputand Output Capacitors(0603case 10% higherthanVIN. size) An I2C interfacecontrollingmultipleoutputvoltage• PGOOD Signal settings,inputcurrentlimits,and loadcurrentsup to 1A providessuperioruser flexibility.The LM8850• True Shutdown Isolation operatesin Auto mode, where the converteris in• Output Over-voltageProtection PFM mode atlightloadsand switchestoPWM mode• InternalActiveVoltageBalancingfor at heavy loads.HystereticPFM extendsthe batterySupercapacitors lifeby reductionofthequiescentcurrentto6µA (typ.) during light load and standby conditions.• DSBGA 9-bump Package TypicalApplicationCircuit Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2010–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

SNVS647C –AUGUST 2010–REVISED MAY 2013 www.ti.com DESCRIPTION (CONTINUED) High-switchingfrequencyenablessmallerpassivecomponents.Internalcompensationisused fora broader rangeofinductorand outputcapacitorvaluestomeet systemdemand and achievesmallsystemsolutionsize. LM8850 isavailableina 9-bump ultra-thinDSBGA package.Onlyfourexternalsurface-mountcomponents,a 1.0 µH inductor,a 4.7µF forinputcapacitor,4.7µF foroutputcapacitorand 0.05F-1.0Fsupercapacitorforenergy storagearerequired. Connection Diagram Figure1. 9-Bump Ultra-ThinDSBGA Package See Package Number YPD0009 PIN DESCRIPTIONS Pin # Name Description A1 VIN Power SupplyInput.Connecttoinputfiltercapacitor(See TypicalApplication Circuit) A2 SW Switchingnode.ConnectiontotheinternalNFET switchand PFET synchronous rectifier A3 GND Ground Pin B1 SDA I2C data(Use a 2kΩ pull-upresistor) B2 PG Power Good indicator B3 VOUT Outputpin. C1 SCLK I2C Clock(Use a 2kΩ pull-upresistor) C2 EN Enablepin.The deviceisinshutdownwhen voltagetothispinis<0.4Vand enabled when >1.2V.Do notleavethispinfloating. C3 BAL Balancingpinforactivevoltagebalancingofsupercapacitor These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates.

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www.ti.com SNVS647C –AUGUST 2010–REVISED MAY 2013 AbsoluteMaximum Ratings(1)(2) VIN PintoGND −0.2Vto6.5V EN, PG, SDA, SCLK pinstoGND −0.2Vto6.0V VOUT toGND (GND −0.2V)to 6.5V SW pintoGND −0.2Vto6.5V BAL toGND −0.2VtoVOUT JunctionTemperature(TJ-MAX ) +150°C StorageTemperatureRange −65°C to+150°C ContinuousPower Dissipation(3) InternallyLimited Maximum Lead Temperature 260°C (Soldering,10 sec.) ESD Rating(4) Human Body Model 2kV Machine Model 200V Charged DeviceModel 500V (1) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothecomponent may occur.OperatingRatingsareconditionsunder whichoperationofthedeviceisensured.OperatingRatingsdo notimplyensuredperformancelimits.Forensuredperformancelimits and associatedtestconditions,see theElectricalCharacteristicstables. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTexas InstrumentsSalesOffice/Distributorsforavailabilityand specifications. (3) Internalthermalshutdowncircuitryprotectsthedevicefrompermanentdamage. Thermalshutdownengages atTJ = 150°C (typ.)and disengagesatTJ = 140°C (typ.). (4) The Human Body Model isa 100 pF capacitordischargedthrougha 1.5kΩ resistorintoeach pin.The machine model isa 200 pF capacitordischargeddirectlyintoeach pin.MIL-STD-883–3015.7. OperatingRatings(1)(2) InputVoltageRange 2.3Vto5.5V Recommended Load Current 0mA to1.0A JunctionTemperature(TJ)Range −40°C to+125°C AmbientTemperature(TA)Range (3) −40°C to+85°C (1) AbsoluteMaximum Ratingsindicatelimitsbeyond whichdamage tothecomponent may occur.OperatingRatingsareconditionsunder whichoperationofthedeviceisensured.OperatingRatingsdo notimplyensuredperformancelimits.Forensuredperformancelimits and associatedtestconditions,see theElectricalCharacteristicstables. (2) AllvoltagesarewithrespecttothepotentialattheGND pin. (3) Inapplicationswhere highpower dissipationand/orpoorpackage resistanceispresent,themaximum ambienttemperaturemay have to be derated.Maximum ambienttemperature(TA-MAX )isdependenton themaximum operatingjunctiontemperature(TJ-MAX-OP = 125°C), themaximum power dissipationofthedeviceintheapplication(PD-MAX )and thejunction-to-ambientthermalresistanceofthe part/package(θJA)intheapplication,as givenby thefollowingequation:TA-MAX = TJ-MAX − (θJAx PD-MAX ). Thermal Properties Junction-to-AmbientThermalResistance(θJA) 70°C/W (DSBGA) (1) (1) Junction-to-ambientthermalresistanceishighlyapplicationand board-layoutdependent.Inapplicationswhere highpower dissipation exists,specialcaremust be giventothermaldissipationissuesinboarddesign. Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LM8850

SNVS647C –AUGUST 2010–REVISED MAY 2013 www.ti.com ElectricalCharacteristics(1)(2)(3)(4) LimitsinstandardtypefaceareforTA = 25°C. Limitsinboldfacetypeapplyovertheoperatingjunctiontemperaturerange (−40°C ≤ TJ = TA ≤ +85°C).Unlessotherwisenoted,specificationsapplytotheLM8850 open loopTypicalApplicationCircuit withVIN = EN = 3.6V. Symbol Parameter Condition Min Typ Max Units VOUT OutputVoltage IOUT = 0mA, VOUT = 5V -2.5 +2.5 % VSEL bits= 0 0 0 3.6 VSEL bits= 0 0 1 3.9OutputVoltageRange Register0 VSEL bits= 0 1 0 4.2 VSEL bits= 0 1 1 4.5 VOUT V VSEL bits= 1 0 0 4.7 VSEL bits= 1 0 1 5.0OutputVoltageRange Register1 VSEL bits= 1 1 0 5.3 VSEL bits= 1 1 1 5.7 ISHDN Shutdown SupplyCurrent 0.4 3 IQ_PFM QuiescentCurrentinPFM 6 10 Mode µA IQ_PWM QuiescentCurrentinPWM 330 500 Mode R DSON (NFET) Pin-PinResistanceforSync VIN = VGS = 3.6V 200 NFET m Ω R DSON (PFET) Pin-PinResistancefor VIN = VGS = 5.0V 215 PFET ISEL bits= 111 1350 1500 1650 VIN = 4.5V ISEL bits= 101 923 1025 1128 VIN = 4.5V ILIM SwitchPeak CurrentLimit mA ISEL bits= 011 666 740 814 VIN = 4.5V ISEL bits= 001 477 530 583 VIN = 4.5V TON = 00 5 TON = 01 7.5 TON Turnon Time secs. TON = 10 10 TON = 11 12.5 IEN PinInputcurrent EN 0.01 1 µA FOSC InternalOscillator 2.25 2.5 2.75 MHzFrequency VIH LogicHighInput 1.2 VIL LogicLow Input 0.4 V VOH LogicOutputHigh 1.2 VOL LogicInputHigh 0.4 (1) AllvoltagesarewithrespecttothepotentialattheGND pin. (2) Min and Max limitsarespecifiedby design,testorstatisticalanalysis.Typicalnumbers arenotensured,butdo representthemost likely norm. (3) The parametersintheelectricalcharacteristictablearetestedunderopen loopconditionsatVIN = 3.6Vunlessotherwisespecified.For performanceovertheinputvoltagerangeand closedloopcondition,refertothedatasheetcurves. (4) Open-loopElectricalCharacteristicstakenwithoutsupercapacitor. Table1.DissipationRatingTable θJA TA ≤ 25°C TA ≤ 60°C TA ≤ 85°C Power Rating Power Rating Power Rating 70°C/W 1500 mW 980 mW 600 mW

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2.5 MHz

www.ti.com SNVS647C –AUGUST 2010–REVISED MAY 2013 Block Diagram Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LM8850

420CURRENT ( VIN (V) -40° C 25° C 85° C -200 200 400 600 800 1,000Iq(nA) VIN(V) -40° C 25° C 85° C 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 CURRENT ( VIN (V) -40° C 25° C 85° C LM8850 SNVS647C –AUGUST 2010–REVISED MAY 2013 www.ti.com TypicalPerformance Characteristics Unlessotherwisenoted:VOUT = 5.0V,TA = 25°C, Supercapacitor= TDK EDLC272020 –501–2F-50). Iq Shutdown Iq,PFM, No Load Figure2. Figure3. Iq,PWM Efficiency,VOUT = 5V,PWM Mode, 25°C Figure4. Figure5. EfficiencyRoom temp, 100 mV PFM ripple Efficiencyover PFM ripple,VIN = 3.9V,Room Temp Figure6. Figure7.

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1.0s/DIV 5V/DIV VOUT INPUT CURRENT PGOOD 500 mA/ DIV 2V/DIV 2.0s/DIV 5V/DIV VOUT INPUT CURRENT PGOOD LM8850 www.ti.com SNVS647C –AUGUST 2010–REVISED MAY 2013 TypicalPerformance Characteristics(continued) Unlessotherwisenoted:VOUT = 5.0V,TA = 25°C, Supercapacitor= TDK EDLC272020 –501–2F-50). LineRegulation,VOUT 5V Load Regulation,VOUT 5V, VIN = 3.6V,100 mV Ripple,Auto Mode VIN = 3.6V,100 mV Ripple,Auto Mode Figure8. Figure9. LineRegulation,VOUT 5V, 250 mA Load, 100 mV Ripple,Auto Mode Osc Freq ErrorNormalizedto3.6V Figure10. Figure11. StartupVIN 2.7V,VOUT 5.3V, StartupVIN 3.6V,VOUT 5.0V, 5sec Delay,Room Temp 5sec Delay,Room Temp Figure12. Figure13. Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LM8850

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100 Ps/DIV

SNVS647C –AUGUST 2010–REVISED MAY 2013 www.ti.com TypicalPerformance Characteristics(continued) Unlessotherwisenoted:VOUT = 5.0V,TA = 25°C, Supercapacitor= TDK EDLC272020 –501–2F-50). InputCurrentand VOUT ,1.5A CurrentLimit InputCurrentand VOUT ,500 mA CurrentLimit Figure14. Figure15. LineTransient LineTransient VIN 2.7V-3.6V,ILOAD = 600 mA VIN 3.6V-4.2V,ILOAD = 600 mA Figure16. Figure17. Load Transient Load Transient VIN = 2.7V,VOUT 5.0V,ILOAD 0-1000mA VIN = 2.7V,VOUT 5.0V,ILOAD 1000-0mA Figure18. Figure19.

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4 Ps/DIV

www.ti.com SNVS647C –AUGUST 2010–REVISED MAY 2013 TypicalPerformance Characteristics(continued) Unlessotherwisenoted:VOUT = 5.0V,TA = 25°C, Supercapacitor= TDK EDLC272020 –501–2F-50). Load Transient Load Transient VIN = 3.6V,VOUT 5.0V,ILOAD 200-800mA VIN = 3.6V,VOUT 5.0V,ILOAD 800-200mA Figure20. Figure21. Load Transient Load Transient VIN = 4.2V,VOUT 5.0V,ILOAD 0-200mA VIN = 4.2V,VOUT 5.0V,ILOAD 200-0mA Figure22. Figure23. Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LM8850

SNVS647C –AUGUST 2010–REVISED MAY 2013 www.ti.com OPERATION DESCRIPTION LM8850 FUNCTIONALITY The LM8850, a high-efficiency,step-upDC-DC switchingboostconverter,deliversa constantvoltagefrom a stableDC inputvoltagesource.Using a voltagemode architecturewithsynchronousrectification,theLM8850 has theabilitytodeliverup to600 mA ofloadcurrent,dependingon theinputvoltage,outputvoltage,ambient temperature,and theinductorchosen. There are threemodes ofoperationdependingon thecurrentrequired- PWM (PulseWidth Modulation),PFM (Pulse Frequency Modulation),and shutdown. The device operatesin PWM mode at load currentsof approximately200 mA orhigher.Lighteroutputcurrentloadscause thedevicetoautomaticallyswitchintoPFM forreducedcurrentconsumption(Iq = 6µA typ).Shutdown mode turnsoffthevoltageregulationand offersthe lowestcurrentconsumption(ISHUTDOWN = 0.4µA typ). Once enabled,theLM8850 chargesthesupercapacitorutilizingallofthedefaultsettingsintheregisters.The I2C must be used tochange thedefaultsettingsand thiscan onlybe done withtheLM8850 enabled.Once a register iswrittento,thechanges willtransitionimmediately.EverytimetheEN pintransitionsfromVIL toVIH,registers 0 and 1 areresettotheirdefaultssettingsand any settingsneed tobe rewrittenintotheappropriateregisters. AUTO MODE The LM8850 utilizesAUTO mode to reduce the amount of energy requiredto maintainthe regulatedoutput voltageunder lightloadconditions.The transitionfrom Auto mode to PWM mode variesdependingon input voltageand outputvoltage.For an outputvoltageof5.0V and an inputvoltageof3.6V,thetransitionwilloccur around225 mA. Auto mode can onlybe used witha supercapacitor.Ifno supercapacitorisbeingused inthecircuit,Auto-Mode must be disabledviaI2C. VRIPPLE The ripplevoltageused inAuto-Mode isprogrammableviaI2C. The ripplevoltagecan be setto50,100,200 and 250 mV. The largerthe ripplevoltage,the more constantenergy willbe suppliedby the supercapacitor.The regulatorwillremainasleepuntiltheeffectiveenergytoreducethesupercapacitor’s voltageby theripplevalue has been used by theload. POWER GOOD The Power Good signalisbothan outputand a read onlyregisterbit.The Power Good signalwillhave a VOH valueiftheVOUT isgreaterthan85% ofitsprogrammed value.Thisisa typicalvaluefor5.0V and 3.6V VIN.The typicalvaluewillvarybased on inputand outputvoltage. PROGRAMMABLE VOUT 5.0,5.3,and 5.7V.The onlyrequirementisthatthe inputvoltagemust remain 10% below the desiredoutput voltageforittoremaininregulation.The outputvoltagecan be changed whilethepartisenabledand regulating. The transitiontimewilldepend on loadconditions. TURN-ON TIME The LM8850 has fourprogrammableturntimevalues,5,7.5,10,and 12.5seconds.Duringtheturnon time,the LM8850 isrampingtotheoutputvoltagewhilelimitingtheinrushcurrentwhichchargesthesupercapacitor. BALANCING CIRCUIT The LM8850 has an internalbalancingcircuitthathelpsmaintainvoltagebalancebetween the two capacitors withinthe super capacitor.The BAL pinregulatesa voltageof VOUT/ 2 between the two capacitors.Ifone capacitoris overchargedor lesscharged,the LM8850 willuse the balancingcircuitto correctthischarge inbalance.The balancingcircuitcan be turnedoff/onviatheI2C registers(BALMODE – ControlReg01, bit3). The balancingcircuitalsohas the abilityto stayON even afterthe LM8850 isshuttingdown (BAL – Control Reg00, bit4).

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START CONDITION STOP CONDITION SCL SDA data change allowed data valid data change allowed data valid data change allowed LM8850 www.ti.com SNVS647C –AUGUST 2010–REVISED MAY 2013 I2C Interface ControlofLM8850 isdone viaI2C compatibleinterface.Thisincludesswitchoverfrom AUTO toPWM mode, adjustmentofcurrentlimit,outputvoltage,PFM Hysteresisvoltage,and start-uptime.The I2C interfacecan also switchthe activevoltagebalancecircuitON duringshutdown.Additionally,thereisa flagbitthatreads back PGOOD condition. I2C SIGNALS InI2C-compatiblemode, theSCL pinisused fortheI2C clockand theSDA pinisused fortheI2C data.Both these signalsneed a pull-upresistoraccordingto I2C specification.The valuesof the pull-upresistorsare determinedby the capacitanceof the bus.See I2C specificationfrom Philipsforfurtherdetails.Signaltiming specificationsare accordingtotheI2C bus specification.Maximum frequencyis400 kHz or 3.4MHz ifinHigh- Speed Mode. I2C DATA VALIDITY The dataon SDA linemust be stableduringtheHIGH periodoftheclocksignal(SCL).Inotherwords,stateof thedatalinecan onlybe changed when CLK isLOW. Figure24. I2C Signals:Data Validity I2C START AND STOP CONDITIONS START and STOP bitsclassifythebeginningand theend oftheI2C session.START conditionisdefinedas SDA signaltransitioningfrom HIGH to LOW whileSCL lineis HIGH. STOP conditionis definedas the SDA transitioningfrom LOW toHIGH whileSCL isHIGH. The I2C masteralwaysgeneratesSTART and STOP bits. The I2C bus is consideredto be busy afterSTART conditionand freeafterSTOP condition.During data transmission,I2C master can generate repeated START conditions.FirstSTART and repeated START conditionsareequivalent,function-wise. Figure25. START and STOP Conditions TRANSFERRING DATA Everybyteputon theSDA linemust be eightbitslong,withthemost significantbit(MSB) beingtransferredfirst. Each byteofdatahas tobe followedby an acknowledgebit.Allclockpulsesaregeneratedby themaster.The transmitterreleasestheSDA line(HIGH) duringtheacknowledgeclockpulse.The receivermust pulldown the SDA lineduringtheninthclockpulse,signifyingan acknowledge.A receiverwhich has been addressedmust generatean acknowledgeaftereach bytehas been received. AftertheSTART condition,theI2C mastersends a chipaddress.Thisaddressisseven bitslongfollowedby an eighthbitwhich isa data directionbit(R/W).The LM8850 addressis0x60.the eighthbit,a “0” indicatesa WRITE and a “1”indicatesa READ. The second byteselectstheregistertowhichthedatawillbe written.The thirdbytecontainsdatatowritetotheselectedregister. Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LM8850

w MSB Register Addr LSB rs r MSB Data LSB stop ack from slave ack from masterrepeated start data from slave SDA start id =0x60h w ack addr = h¶01 ack rs r ack 0x6Ah data ack stop MSB Chip Address LSB address = 0x60h start MSB Chip Addr LSB w ack MSB Register Addr LSB ack MSB Data LSB ack stop ack from slave ack from slave ack from slave SCL SDA start id = 0x60h w ack addr = 02h ack ack address h¶0E data stop R/W Bit 0Bit 1Bit 2Bit 3Bit 4Bit 5 ADR6 Bit 7 Bit 6 MSB LSB I2C Slave Address (chip address) ADR5 ADR4 ADR3 ADR2 ADR1 ADR0 LM8850 SNVS647C –AUGUST 2010–REVISED MAY 2013 www.ti.com Chip address:60h Figure26. I2C Chip Address Figure27. I2C WriteCycle

  • w = write(SDA = “0”)
  • r= read(SDA = “1)
  • ack = acknowledge(SDA pulleddown by eithermasterorslave)
  • rs= repeatedstart
  • id= chipaddress When a READ functionistobe accomplished,a WRITE functionmust precedetheREAD functionas shown in theRead Cyclewaveform. Figure28. I2C Read Cycle HIGH-SPEED, 3.4MHZ MODE High-speedmode isenteredby: 1. Startcondition; 2. ChipAddress:0000 1XXXX (X = don'tcare); 3. Waita clockfortheacknowledge; 4. Now everythingisinHS mode...doa repeatedstart(doNOT do a “stop”thena “start”because a “stop”kicks thepartoutofHS mode); 5. Send readorwritesinHS mode. (Remember touse “repeatedstarts”between commands.);then 6. When you aredone withthelastcommand send a “stop”conditiontoputthepartback intoregular400 kHz mode.

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Register location = 00 Output Voltage Change 0 0 0 = 3.6V 0 0 1 = 3.9V 0 1 0 = 4.2V 0 1 1 = 4.5V 1 0 0 = 4.7V 1 0 1 = 5.0V (default) 1 1 0 = 5.3V 1 1 1 = 5.7V 0 0 = 50 mV 0 1 = 100 mV (default) 1 0 = 200 mV 1 1 = 250 mV PFM Voltage Ripple Balance Circuit 0 = OFF 1 = ON (default) Effective when part is enabled Mode 0 = AUTO (PFM/PWM ± default) 1 = FORCED PWMTon Time 0 0 = 5s (default) 0 1 = 7.5s 1 0 = 10s 1 1 = 12.5s From Register Location 00, bits 0 and 1 FromRegister Location 01, bit 5 LM8850 www.ti.com SNVS647C –AUGUST 2010–REVISED MAY 2013 I2C-COMPATIBLE CHIP ADDRESS The deviceaddressforLM8850 is60 (HEX). Table2.RegisterInformationand Details Registername Location Type Register CONTROL 0 R/W ControlRegister1 CONTROL 1 R/W ControlRegister2 Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LM8850

Register location = 01 Switch Current Limit ± (Max values) 111 = 1500 mA (default) 101 = 1025 mA 001 = 740 mA 000 = 530 mA Balmode Enable 0 = OFF 1 = ON (default) 0 = OFF (default) 1 = ON Effective when part is disabled PGOOD (Read only) Bit 5 used to determine output voltage 0 0 0 = 3.6V 0 0 1 = 3.9V 0 1 0 = 4.2V 0 1 1 = 4.5V 1 0 0 = 4.7V 1 0 1 = 5.0V (default) 1 1 0 = 5.3V 1 1 1 = 5.7V From Register Location 00, bits 0 and 1 From Register Location 01, bit 5 LM8850 SNVS647C –AUGUST 2010–REVISED MAY 2013 www.ti.com

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REVISION HISTORY

Changes from RevisionB (May 2013)toRevisionC Page Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LM8850

www.ti.com 11-Nov-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) LM8850URE/NOPB Active Production DSBGA (YPD) | 9 250 | SMALL T&R Yes SNAGCU Level-1-260C-UNLIM -40 to 125 SK LM8850URE/NOPB.A Active Production DSBGA (YPD) | 9 250 | SMALL T&R Yes SNAGCU Level-1-260C-UNLIM -40 to 125 SK LM8850URX/NOPB Active Production DSBGA (YPD) | 9 3000 | LARGE T&R Yes SNAGCU Level-1-260C-UNLIM -40 to 125 SK LM8850URX/NOPB.A Active Production DSBGA (YPD) | 9 3000 | LARGE T&R Yes SNAGCU Level-1-260C-UNLIM -40 to 125 SK (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 25-Sep-2024 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 25-Sep-2024 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM8850URE/NOPB DSBGA YPD 9 250 208.0 191.0 35.0 LM8850URX/NOPB DSBGA YPD 9 3000 208.0 191.0 35.0 Pack Materials-Page 2

www.ti.com URA09XXX (Rev A) 0.350±0.045 D E 4215145/A 12/12 A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994. B. This drawing is subject to change without notice. NOTES: D: Max = E: Max = 1.635 mm, Min = 1.594 mm, Min = 1.574 mm 1.534 mm

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