Triple-Diode Input & Local Digital Temp Sensor w/Two-Wire Interface datasheet (Rev. A)
Document overview
- Manufacturer or author: Texas Instruments, Incorporated [SNIS111,A]
- PDF pages: 23
Technical content
LM83 Triple-Diode Input and Local Digital Temperature Sensor with Two-Wire Interface Literature Number: SNIS111A
Triple-Diode Input and Local Digital Temperature Sensor with Two-Wire Interface General Description The LM83 is a digital temperature sensor with a 2 wire serial interface that senses the voltage and thus the temperature of three remote diodes using a Delta-Sigma analog-to-digital converter with a digital over-temperature detector. The LM83 accurately senses its own temperature as well as the tem- perature of three external devices, such as Pentium II ® Pro- cessors or diode connected 2N3904s. The temperature of any ASIC can be detected using the LM83 as long as a dedi- cated diode (semiconductor junction) is available on the die. Using the SMBus interface a host can access the LM83’s registers at any time. Activation of a T_CRIT_A output oc- curs when any temperature is greater than a programmable comparator limit, T_CRIT. Activation of an INT output occurs when any temperature is greater than its corresponding pro- grammable comparator HIGH limit. The host can program as well as read back the state of the T_CRIT register and the four T_HIGH registers. Three state logic inputs allow two pins (ADD0, ADD1) to select up to 9 SMBus address locations for the LM83. The sensor powers up with default thresholds of 127˚C for T_CRIT and all T_HIGHs. The LM83 is pin for pin and register compatible with the LM84 as well as the Maxim MAX1617 and the Ana- log Devices ADM1021.
Features
n Accurately senses die temperature of 3 remote ICs, or diode junctions n On-board local temperature sensing n SMBus and I2C compatible interface, supports SMBus 1.1 TIMEOUT n Two interrupt outputs: INT and T_CRIT_A n Register readback capability n 7 bit plus sign temperature data format, 1 ˚C resolution n 2 address select pins allow connection of 9 LM83s on a single bus Key Specifications j Supply Voltage 3.0V to 3.6V j Supply Current 0.8mA (max) j Local Temp Accuracy (includes quantization error) 0˚C to +85˚C ±3.0˚C (max) j Remote Diode Temp Accuracy (includes quantization error) +25˚C to +100˚C ±3˚C (max) 0˚C to +125˚C ±4˚C (max)
Applications
n System Thermal Management n Computers n Electronic Test Equipment n Office Electronics n HVAC Simplified Block Diagram SMBus ™ is a trademark of the Intel Corporation. Pentium II® is a registered trademark of the Intel Corporation. I2C ® is a registered trademark of the Philips Corporation. DS101058-1 November 1999 LM83 Triple-Diode Input and Local Digital Temperature Sensor with Two-Wire Interface © 2000 National Semiconductor Corporation DS101058 www.national.com
Connection Diagram Ordering Information Order Number NS Package Number Transport Media LM83CIMQA MQA16A (QSOP-16)
95 Units in
(QSOP-16)
2500 Units on
Label Pin # Function Typical Connection Diode Current Source To Diode Anode. Connected to remote discrete diode junction or to the diode junction on a remote IC whose die temperature is being sensed. When not used they should be left floating. V CC 2 Positive Supply Voltage Input DC Voltage from 3.0 V to 3.6 V QSOP-16 DS101058-2 TOP VIEW DS101058-3 LM83 www.national.com 2
Pin Description(Continued) Label Pin # Function Typical Connection D− 4 Diode Return Current Sink To all Diode Junction Cathodes using a star connection to pin. Must float when not used. ADD0–ADD1 10, 6 User-Set SMBus (I2C) Address Inputs Ground (Low, “0”), VCC (High, “1”) or open (“TRI-LEVEL”) GND 7, 8 Power Supply Ground Ground NC 9, 13, 15 Manufacturing test pins. Left floating. PC board traces may be routed through the pads for these pins, although the components that drive these traces should share the same supply as the LM83 so that the Absolute Maximum Rating, Voltage at Any Pin, is not violated. INT
11 Interrupt Output,
Pull Up Resistor, Controller Interrupt or Alert Line SMBData 12 SMBus (I2C) Serial Bi-Directional Data Line, open-drain output From and to Controller, Pull-Up Resistor SMBCLK 14 SMBus (I 2C) Clock Input From Controller, Pull-Up Resistor T_CRIT_A 16 Critical Temperature Alarm, open-drain output Pull Up Resistor, Controller Interrupt Line or System Shutdown LM83 www.national.com3
Absolute Maximum Ratings(Note 1) Supply Voltage −0.3 V to 6.0 V Voltage at Any Pin −0.3 V to (VCC + 0.3 V) D− Input Current ±1m A Input Current at All Other Pins (Note 2) 5 mA Package Input Current (Note 2) 20 mA SMBData, T_CRIT_A, INT Output Sink Current 10 mA SMBCLK, SMBData, T_CRIT_A, INT Output Voltage 6.0 V Storage Temperature −65˚C to +150˚C Soldering Information, Lead Temperature Vapor Phase (60 seconds) 215˚C Infrared (15 seconds) 220˚C ESD Susceptibility (Note 4) Human Body Model 2000 V Machine Model 200 V Operating Ratings (Notes 1, 5) Specified Temperature Range T MIN to TMAX LM83 −40˚C to +125˚C Supply Voltage Range (VCC ) +3.0V to +3.6V Temperature-to-Digital Converter Characteristics Unless otherwise noted, these specifications apply for VCC =+3.0Vdc to 3.6Vdc.Boldface limits apply for TA =T J =T MIN to TMAX ;all other limits TA =T J=+25˚C, unless otherwise noted. Parameter Conditions Typical Limits Units (Note 6) (Note 7) (Limit) Temperature Error using Local Diode ((Note 8)) TA = 0 ˚C to +85˚C, VCC =+3.3V ±1 ±3 ˚C (max) TA = −40 ˚C to +125˚C, VCC =+3.3V ±4 ˚C (max) Temperature Error using Remote Diode ((Note 8)) TA = +60 ˚C to +100˚C, VCC =+3.3V ±3 ˚C (max) TA = 25 ˚C to +100˚C, VCC =+3.3V ±3 ˚C (max) TA = 0 ˚C to +125˚C, VCC =+3.3V ±4 ˚C (max) Diode Channel to Channel Matching 0 ˚C Resolution 8 Bits 1˚ C Conversion Time of All Temperatures (Note 10) 460 600 ms (max) Quiescent Current (Note 9) SMBus (I 2C) Inactive 0.500 0.80 mA (max) D− Source Voltage 0.7 V Diode Source Current (D+ − D−)=+ 0.65V; high level 125 µA (max) 60 µA (min) Low level 15 µA (max) 5 µA (min) T_CRIT_A and INT Output Saturation Voltage IOUT = 3.0 mA 0.4 V (max) Power-On Reset Threshold On V CC input, falling edge 2.3 1.8 V (max) V (min) Local and Remote T_CRIT and HIGH Default Temperature settings (Note 11) +127 ˚C LM83 www.national.com 4
Logic Electrical Characteristics DIGITAL DC CHARACTERISTICS Unless otherwise noted, these specifications apply for VCC =+3.0 to 3.6 Vdc.Boldface limits apply for TA =T J =T MIN to TMAX ;all other limits TA =T J=+25˚C, unless otherwise noted. Symbol Parameter Conditions Typical Limits Units (Note 6) (Note 7) (Limit) SMBData, SMBCLK V IN(1) Logical “1” Input Voltage 2.1 V (min) VIN(0) Logical “0”Input Voltage 0.8 V (max) VIN(HYST) SMBData and SMBCLK Digital Input Hysteresis 300 mV IIN(1) Logical “1” Input Current V IN =V CC 0.005 1.5 µA (max) IIN(0) Logical “0” Input Current V IN = 0 V −0.005 1.5 µA (max) ADD0, ADD1 V IN(1) Logical “1” Input Voltage V CC 1.5 V (min) VIN(0) Logical “0”Input Voltage GND 0.6 V (max) IIN(1) Logical “1” Input Current V IN =V CC 2 µA (max) IIN(0) Logical “0” Input Current V IN =0V -2 µA (max) ALL DIGITAL INPUTS C IN Input Capacitance 20 pF ALL DIGITAL OUTPUTS I OH High Level Output Current V OH =V CC 100 µA (max) VOL SMBus Low Level Output Voltage IOL =3m A IOL =6m A 0.4 0.6 V (max) LM83 www.national.com5
Logic Electrical Characteristics(Continued) SMBus DIGITAL SWITCHING CHARACTERISTICS Unless otherwise noted, these specifications apply for VCC =+3.0 Vdc to +3.6 Vdc, CL (load capacitance) on output lines = 80 pF.Boldface limits apply for TA =T J =T MIN to TMAX ;all other limits TA =T J = +25˚C, unless otherwise noted. The switching characteristics of the LM83 fully meet or exceed the published specifications of the SMBus or I2C bus. The fol- lowing parameters are the timing relationships between SMBCLK and SMBData signals related to the LM83. They are not the I 2C or SMBus bus specifications. Symbol Parameter Conditions Typical Limits Units (Note 6) (Note 7) (Limit) fSMB SMBus Clock Frequency 100 kHz (max) kHz (min) tLOW SMBus Clock Low Time 10 % to 10 % 1.3 µs (min) ms (max) tLOW MEXT Cumulative Clock Low Extend Time 10 ms (max) tHIGH SMBus Clock High Time 90 % to 90% 0.6 µs (min) tR,SMB SMBus Rise Time 10% to 90% 1 µs (max) tF,SMB SMBus Fall Time 90% to 10% 0.3 ns (max) tOF Output Fall Time C L = 400 pF, IO =3m A 250 ns (max) tTIMEOUT SMBData and SMBCLK Time Low for Reset of Serial Interface (Note 12) ms (min) ms (max) t1 SMBCLK (Clock) Period 10 µs (min) t2, tSU;DAT Data In Setup Time to SMBCLK High 100 ns (min) t3, tHD;DAT Data Out Stable after SMBCLK Low 300 TBD ns (min) ns (max) t4, tHD;STA SMBData Low Setup Time to SMBCLK Low 100 ns (min) t tSU;STO SMBData High Delay Time after SMBCLK High (Stop Condition Setup) 100 ns (min) t tSU;STA SMBus Start-Condition Setup Time 0.6 µs (min) tBUF SMBus Free Time 1.3 µs (min) SMBus Communication DS101058-4 LM83 www.national.com 6
the device beyond its rated operating conditions. maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four. Parasitic components and or ESD protection circuitry are shown in the figure below for the LM83’s pins. The nominal breakdown voltage of the zener D3 is6.5 V. Note: An x indicates that the diode exists. ductor Linear Data Book for other methods of soldering surface mount devices. Note 4:Human body model, 100 pF discharged through a 1.5 kΩ resistor. Machine model, 200 pF discharged directly into each pin. FIGURE 1. ESD Protection Input Structure
Note 6:Typicals are at TA = 25˚C and represent most likely parametric norm. Note 7:Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level). Note 8: The Temperature Error will vary less than±1.0 ˚C for a variation in VCC o f3Vt o3 . 6Vfrom the nominal of 3.3 V. Note 9:Quiescent current will not increase substantially with an active SMBus. (and will yield last conversion result). Note 11:Default values set at power up. state of an SMBus communication (SMBCLK and SMBData set High).
1.0 Functional Description
and an 8-bit ADC (Delta-Sigma Analog-to-Digital Converter).
1.1 CONVERSION SEQUENCE
1.2 INT OUTPUT and T_HIGH LIMITS
FIGURE 2. Temperature-to-Digital Transfer Function (Non-linear scale for clarity) FIGURE 3. Printed Circuit Board Used for Thermal Resistance Specifications
1.0 Functional Description(Continued)
for the INT output and related circuitry. active low. INT is an open-drain output.
1.3 T_CRIT_A OUTPUT and T_CRIT LIMIT
Figure 6. The Status
- Figure 7 shows a simplified logic diagram of the
T_CRIT_A and related circuitry. T_CRIT_A output, but will still be set in the Status Registers. point to 127˚C will disable the T_CRIT_A output.
1.4 POWER ON RESET DEFAULT STATES
- Command Register set to 00h
- Local Temperature set to 0˚C
FIGURE 4. INT Temperature Response Diagram with D2RHS and D3RHS set to 127˚C. FIGURE 5. INT output related circuitry logic diagram FIGURE 6. T_CRIT_A Temperature Response Diagram with remote diode 1 and local temperature masked. FIGURE 7. T_CRIT_A output related circuitry logic
- Diode 1, Diode 2, and Diode 3 Remote Temperature set to 0˚C until the LM83 senses a diode present between the D+ and D− input pins. 4. Status Registers 1 and 2 set to 00h. 5. Configuration Register set to 00h; INT enabled and all T_CRIT setpoints enabled to activate T_CRIT_A. 6. Local and all Remote T_CRIT set to 127˚C
1.5 SMBus INTERFACE
The LM83 operates as a slave on the SMBus, so the SMBCLK line is an input (no clock is generated by the LM83) and the SMBData line is bi-directional. According to SMBus specifications, the LM83 has a 7-bit slave address. Bit 4 (A3) of the slave address is hard wired inside the LM83 to a 1. The remainder of the address bits are controlled by the state of the address select pins ADD1 and ADD0, and are set by connecting these pins to ground for a low, (0) , to V CC for a high, (1), or left floating (TRI-LEVEL). Therefore, the complete slave address is: A6 A5 A4 1 A2 A1 A0 MSB LSB and is selected as follows: Address Select Pin State LM83 SMBus Slave Address ADD0 ADD1 A6:A0 binary 0 0 001 1000
0 TRI-LEVEL 001 1001
TRI-LEVEL TRI-LEVEL 010 1010 TRI-LEVEL 1 010 1011 1 0 100 1100
1 TRI-LEVEL 100 1101
The LM83 latches the state of the address select pins during the first read or write on the SMBus. Changing the state of the address select pins after the first read or write to any de- vice on the SMBus will not change the slave address of the LM83.
1.6 TEMPERATURE DATA FORMAT
Temperature data can be read from the Local and Remote Temperature, T_CRIT, and HIGH setpoint registers; and writ- ten to the T_CRIT and HIGH setpoint registers. Temperature data is represented by an 8-bit, two’s complement byte with an LSB (Least Significant Bit) equal to 1˚C: Temperature Digital Output Binary Hex +125˚C 0111 1101 7Dh +25˚C 0001 1001 19h +1˚C 0000 0001 01h 0˚C 0000 0000 00h −1˚C 1111 1111 FFh −25˚C 1110 0111 E7h −55˚C 1100 1001 C9h
1.7 OPEN-DRAIN OUTPUTS
The SMBData, INT and T_CRIT_A outputs are open-drain outputs and do not have internal pull-ups. A “high” level will not be observed on these pins until pull-up current is pro- vided from some external source, typically a pull-up resistor. Choice of resistor value depends on many system factors but, in general, the pull-up resistor should be as large as possible. This will minimize any internal temperature reading errors due to internal heating of the LM83. The maximum re- sistance of the pull up, based on LM83 specification for High Level Output Current, to provide a 2.1V high level, is 30kΩ .
1.8 DIODE FAULT DETECTION
Before each external conversion the LM83 goes through an external diode fault detection sequence. If a D+ input is shorted to V CC or floating then the temperature reading will be +127 ˚C, and its OPEN bit in the Status Register will be set. If the T_CRIT setpoint is set to less than +127 ˚C then the D+ inputs RTCRIT bit in the Status Register will be set which will activate the T_CRIT_A output, if enabled. If a D+ is shorted to GND or D−, its temperature reading will be 0 ˚C and its OPEN bit in the Status Register will not be set. LM83 www.national.com 10
1.9 COMMUNICATING with the LM83
There are 19 data registers in the LM83, selected by the Command Register. At power-up the Command Register is set to “00”, the location for the Read Local Temperature Reg- ister. The Command Register latches the last location it was set to. Reading the Status Register resets T_CRIT_A and INT, so long as a temperature comparison does not signal a fault (seeSections 1.2 and 1.3). All other registers are pre- defined as read only or write only. Read and write registers with the same function contain mirrored data. A Writeto the LM83 will always include the address byte and the command byte. A write to any register requires one data byte. Reading the LM83 can take place either of two ways: 1. If the location latched in the Command Register is cor- rect (most of the time it is expected that the Command Register will point to one of the Read Temperature Reg- isters because that will be the data most frequently read from the LM83), then the read can simply consist of an address byte, followed by retrieving the data byte. 2. If the Command Register needs to be set, then an ad- dress byte, command byte, repeat start, and another ad- dress byte will accomplish a read. The data byte has the most significant bit first. At the end of a read, the LM83 can accept either Acknowledge or No Ac- knowledge from the Master (No Acknowledge is typically used as a signal for the slave that the Master has read its last byte).
1.10 SERIAL INTERFACE ERROR RECOVERY
The LM83 SMBus lines will be reset to the SMBus idle state if the SMBData or SMBCLK lines are held low for 40 ms or more (t TIMEOUT ). The LM83 may or may not reset the state of DS101058-9 LM83 www.national.com11
the serial interface logic if either of the SMBData or SMBCLK lines are held low between 25 ms and 40 ms. TIMEOUT al- lows a clean recovery in cases where the master may be re- set while the LM83 is transmitting a low bit thus preventing possible bus lock up. Whenever the LM83 sees the start condition its serial inter- face will reset to the beginning of the communication, thus the LM83 will expect to see an address byte next. This sim- plifies recovery when the master is reset while the LM83 is transmitting a high. LM83 www.national.com 12
2.0 LM83 REGISTERS
2.1 COMMAND REGISTER
Selects which registers will be read from or written to. Data for this register should be transmitted during the Command Byte of the SMBus write communication. P7 P6 P5 P4 P3 P2 P1 P0
0 Command Select
P0-P7: Command Select Command Se- lect Address Power On Default State Register Name Register Function <P7:P0> hex <D7:D0 > binary <D7:D0 > deci- mal 00h 0000 0000 0 RLT Read Local Temperature 01h 0000 0000 0 RD2RT Read D2 Remote Temperature 02h 0000 0000 0 RSR1 Read Status Register 1 03h 0000 0000 0 RC Read Configuration 04h 0000 0000 0 Reserved 05h 0111 1111 127 RLHS Read Local HIGH Setpoint 06h Reserved 07h 0111 1111 127 RD2RHS Read D2 Remote HIGH Setpoint 08h Reserved 09h 0000 0000 WC Write Configuration 0Ah Reserved 0Bh 0111 1111 127 WD2LHS Write Local HIGH Setpoint 0Ch Reserved 0Dh 0111 1111 127 WD2RHS Write D2 Remote HIGH Setpoint 0Eh-2Fh Reserved for Future Use 30h 0000 0000 0 RD1RT Read D1 Remote Temperature 31h 0000 0000 0 RD3RT Read D3 Remote Temperature 32h-34h Reserved for Future Use 35h 0000 0000 0 RSR2 Read Status Register 2 36h-37h Reserved for Future Use 38h 0111 1111 127 RD1RHS Read D1 Remote HIGH Setpoint 39h Reserved for Future Use 3Ah 0111 1111 127 RD3RHS Read D3 Remote HIGH Setpoint 3Bh-41h Reserved for Future Use 42h 0111 1111 127 RTCS Read T_CRIT Setpoint 43h-4Fh Reserved for Future Use 50h 0111 1111 127 WD1RHS Write D1 Remote HIGH Setpoint 51h Reserved for Future Use 52h 0111 1111 127 WD3RHS Write D3 Remote HIGH Setpoint 53h-59h Reserved for Future Use 5Ah 0111 1111 127 WTCS Write T_CRIT Setpoint LM83 www.national.com13
Power On Default State Register Name Register Function <P7:P0> hex <D7:D0 > binary <D7:D0 > deci- mal 5Ch-6Fh and F0h-FDh Reserved for Future Use FEh 0000 0001 1 RMID Read Manufacturers ID FFh RSR Read Stepping or Die Revision Code
2.2 LOCAL and D1, D2 and D3 REMOTE TEMPERATURE REGISTERS (LT, D1RT, D2RT, and D3RT)
(Read Only Address 00h, 01h, 30h and 31h): D7 D6 D5 D4 D3 D2 D1 D0 MSB Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 LSB D7–D0: Temperature Data. One LSB = 1˚C. Two’s complement format.
2.3 STATUS REGISTERS 1 and 2
2.3.1 Status Register 1 (SR1)(Read Only Address 02h):
0 LHIGH 0 D2RHIGH 0 D2OPEN D2CRIT LCRIT
Power up default is with all bits “0” (zero). D0: LCRIT: When set to a 1 indicates an Local Critical Temperature alarm. D1: D2CRIT: When set to a 1 indicates a Remote Diode 2 Critical Temperature alarm. D2: D2OPEN: When set to 1 indicates a Remote Diode 2 disconnect. D4: D2RHIGH: When set to 1 indicates a Remote Diode 2 HIGH Temperature alarm. D6: LHIGH: When set to 1 indicates a Local HIGH Temperature alarm. D7, D5, and D3: These bits are always set to 0 and reserved for future use. Status Register 2
2.3.2 Status Register 2 (SR2)(Read Only Address 35h):
D1RHIGH 0 D1OPEN D3RHIGH 0 D3OPEN D3CRIT D1CRIT Power up default is with all bits “0” (zero). D0: D1CRIT, when set to 1 indicates a Remote Diode 1 Critical Temperature alarm. D1: D3CRIT, when set to 1 indicates a Remote Diode 3 Critical Temperature alarm. D2: D3OPEN, when set to 1 indicates a Remote Diode 3 disconnect. D4: D3RHIGH, when set to 1 indicates a Remote Diode 3 HIGH Temperature alarm. D5: D1OPEN, when set to 1 indicates a Remote Diode 1 disconnect. D7: D1RHIGH, when set to 1 indicates a Remote Diode 1 HIGH Temperature alarm. D6, and D3: These bits are always set to 0 and reserved for future use.
2.4 MANUFACTURERS ID REGISTER
(Read Address FEh) Default value 01h.
2.5 CONFIGURATION REGISTER
(Read Address 03h/Write Address 09h): D7 D6 D5 D4 D3 D2 D1 D0 INT mask 0D 1 T_CRIT_A mask T_CRIT_A mask T_CRIT_A mask Local T_CRIT_A mask INT Inversion 0 Power up default is with all bits “0” (zero). D7: INT mask: When set to 1 INT interrupts are masked. LM83 www.national.com 14
D5: T_CRIT mask for Diode 1, when set to 1 a Diode 1 temperature reading that exceeds T_CRIT setpoint will not activate the T_CRIT_A pin. D4: T_CRIT mask for Diode 2, when set to 1 a Diode 2 temperature reading that exceeds T_CRIT setpoint will not activate the T_CRIT_A pin. D3: T_CRIT mask for Diode 3, when set to 1 a Diode 3 temperature reading that exceeds T_CRIT setpoint will not activate the T_CRIT_A pin. D2: T_CRIT mask for Local reading, when set to 1 a Local temperature reading that exceeds T_CRIT setpoint will not activate the T_CRIT_A pin. D1: INT active state inversion. When INT Inversion is set to a 1 the active state of the INT output will be a logical high. A low would then select an active state of a logical low. D6 and D0: These bits are always set to 0 and reserved for future use. A write of 1 will return a 0 when read.
2.6 LOCAL, DIODE 1, DIODE 2 and DIODE 3 HIGH SETPOINT REGISTERS (LHS, D1RHS, D2RHS and D3RHS)
(Read Address 05h, 07h, 38h, 3Ah /Write Address 0Bh, 0Dh, 50h, 52h): D7 D6 D5 D4 D3 D2 D1 D0 MSB Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 LSB D7–D0: HIGH setpoint temperature data. Power up default is LHIGH = RD1HIGH=RD2HIGH=RD3HIGH = 127˚C.
2.7 T_CRIT REGISTER (TCS)
(Read Address 42h/Write Address 5Ah): D7 D6 D5 D4 D3 D2 D1 D0 MSB Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 LSB D7–D0: T_CRIT setpoint temperature data. Power up default is T_CRIT = 127˚C. LM83 www.national.com15
3.0 SMBus Timing Diagrams
(c) Serial Bus Read from a Register with the internal Command Register preset to desired value. FIGURE 8. Serial Bus Timing Diagrams
4.0 Application Hints
sensing capability allows it to be used in new ways as well. strongly than will the air temperature. Figure 9. A discrete diode can also be fected, and often dominated, by the temperature of its leads. emitter junction be used with the collector tied to the base.
3.1 ACCURACY EFFECTS OF DIODE NON-IDEALITY
- η is the non-ideality factor of the process the diode is manufactured on,
- q is the electron charge,
- k is the Boltzmann’s constant,
- N is the current ratio,
- T is the absolute temperature in ˚K. The temperature sensor then measuresΔVBE and converts to digital data. In this equation, k and q are well defined uni- versal constants, and N is a parameter controlled by the tem- perature sensor. The only other parameter isη, which de- pends on the diode that is used for measurement. Since ΔV BE is proportional to bothη and T, the variations inη can- not be distinguished from variations in temperature. Since the non-ideality factor is not controlled by the temperature sensor, it will directly add to the inaccuracy of the sensor. For the Pentium II Intel specifies a ±1% variation inη from part to part. As an example, assume a temperature sensor has an accuracy specification of ±3 ˚C at room temperature of 25 ˚C and the process used to manufacture the diode has a non-ideality variation of ±1%. The resulting accuracy of the temperature sensor at room temperature will be: The additional inaccuracy in the temperature measurement caused byη, can be eliminated if each temperature sensor is calibrated with the remote diode that it will be paired with.
3.2 PCB LAYOUT for MINIMIZING NOISE
sor and the LM83 can cause temperature conversion errors.
- Place a 0.1 µF power supply bypass capacitor as close
capacitor as close as possible to the D+ and D− pins.
- The recommended 2.2nF diode bypass capacitor actu-
- Ideally, the LM83 should be placed within 10cm of the
can cause as much as 1˚C of error.
- Diode traces should be surrounded by a GND guard ring
- Avoid routing diode traces in close proximity to power
supply switching or filtering inductors.
4.0 Application Hints(Continued)
- Avoid running diode traces close to or parallel to high
at least 2cm. apart from the high speed digital traces.
- If it is necessary to cross high speed digital traces, the
- The ideal place to connect the LM83’s GND pin is as
- Leakage current between D+ and GND should be kept
sible will minimize leakage current.
4.0 Typical Applications
FIGURE 10. Ideal Diode Trace Layout FIGURE 11. LM83 Demo Board Diode Layout
4.0 Typical Applications(Continued)
D+ inputs are tied as shown here, D1+, D2+ and D3+ temperature readings will be identical, unless affected by PCB D+ trace resistance differences. FIGURE 12. Connecting all Three LM83 Diode Inputs in Parallel will Increase the Number of HIGH Setpoints for a Single Temperature Reading to Three.
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www.ti.com 31-Oct-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) LM83CIMQA/NOPB Obsolete Production SSOP (DBQ) | 16 - - Call TI Call TI -40 to 125 83CI MQA LM83CIMQAX/NOPB Active Production SSOP (DBQ) | 16 2500 | LARGE T&R Yes NIPDAU | SN Level-1-260C-UNLIM -40 to 125 83CI MQA LM83CIMQAX/NOPB.A Active Production SSOP (DBQ) | 16 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 83CI MQA (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1
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