LM7705 Low-Noise Negative Bias Generator datasheet (Rev. D)
Document overview
- Manufacturer or author: Texas Instruments, Incorporated [SNVS420,D]
- PDF pages: 28
Technical content
+ In - In shutdown low voltage amplifier true zero output voltage-V -0.23V C F+ VSS SD VDD VSS VOUT C RES C F- Product Folder Order Now T echnical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LM7705 SNVS420D –NOVEMBER 2008–REVISED MAY 2018 LM7705Low-NoiseNegativeBiasGenerator
1 Features
1• Regulated Output Voltage −0.232 V
- Output Voltage Tolerance 5%
- Output Voltage Ripple 4 mVPP
- Supply Voltage 3 V to 5.25 V
- Conversion Efficiency Up to 98%
- Quiescent Current 78 µA
- Shutdown Current 20 nA
- Turnon Time 500 µs
- Operating Temperature Range −40°C to 125°C
- 8-Pin VSSOP Package
2 Applications
- True Zero Amplifier Outputs
- Portable Instrumentation
- Low-Voltage Split-Power Supplies
3 Description
The LM7705 device is a switched capacitor voltage inverter with a low noise, −0.23 V fixed negative voltage regulator. This device is designed to be used with low voltage amplifiers to enable the amplifiers output to swing to zero volts. The −0.23 V is used to supply the negative supply pin of an amplifier while maintaining less then 5.5 V across the amplifier. Rail- to-Rail output amplifiers cannot output zero volts when operating from a single-supply voltage and can result in error accumulation due to amplifier output saturation voltage being amplified by following gain stages. A small negative supply voltage will prevent the amplifiers output from saturating at zero volts and will help maintain an accurate zero through a signal processing chain. Additionally, when an amplifier is used to drive an input of the ADC, the amplifier can output a zero voltage signal and the full input range of an ADC can be used. The LM7705 device has a shutdown pin to minimize standby power consumption. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) LM7705 VSSOP (8) 3.00 mm × 3.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Typical Application
SNVS420D –NOVEMBER 2008–REVISED MAY 2018 www.ti.com Product Folder Links: LM7705 Submit Documentation Feedback Copyright © 2008–2018, Texas Instruments Incorporated Table of Contents
12 Mechanical, Packaging, and Orderable
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision C (September 2015) to Revision D Page Changes from Revision B (March 2013) to Revision C Page
- Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device Changes from Revision A (November 2008) to Revision B Page
www.ti.com SNVS420D –NOVEMBER 2008–REVISED MAY 2018 Product Folder Links: LM7705 Submit Documentation FeedbackCopyright © 2008–2018, Texas Instruments Incorporated
5 Pin Configuration and Functions
NAME NO. CF+ 1 Analog CFLY Positive Capacitor Connection VSS 2 Ground Power Ground SD 3 Input Shutdown Pin If SD pin is LOW, device is ON If SD pin is HIGH, device is OFF VDD 4 Power Positive Supply Voltage VSS 5 Ground Power Ground VOUT 6 Output Output Voltage CRES 7 Analog Reserve Capacitor Connection CF- 8 Analog CFLY Negative Capacitor Connection (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT Supply voltage VDD - VSS 5.75 V SD VDD + 0.3 VSS – 0.3 V Junction temperature(2) 150 °C Mounting temperature Infrared or Convection (20 sec) 260 °C Storage temperature, Tstg −65 150 °C (1) Human Body Model, applicable std. MIL-STD-883, Method 3015.7. (2) Field induced Charge-Device Model, applicable std. JESD22–C101–C. (ESD FICDM std of JEDEC). (3) Machine model, applicable std JESD22–A115–A (ESSD MM srd of JEDEC).
6.2 ESD Ratings
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 VCharged-device model (CDM), per JEDEC specification JESD22- C101(2) ±750 Machine model(3) ±200
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6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT Supply voltage (VDD to GND) 3 5.25 V Supply voltage (VDD wrt VOUT) 3.23 5.48 V Temperature range −40 125 °C (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
6.4 Thermal Information
THERMAL METRIC(1) LM77005 UNITDGK (VSSOP)
8 PINS
RθJA Junction-to-ambient thermal resistance 253 °C/W (1) All limits are specified by testing or statistical analysis. (2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not specified on shipped production material. 6.5 3.3-V Electrical Characteristics Unless otherwise specified, all limits are ensured for TA = 25°C, VDD = 3.3 V, VSS = 0 V, SD = 0 V, CFLY= 5 µF, CRES = 22 µF, COUT = 22 µF. PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT VOUT Output Voltage IOUT = 0 mA TA = 25°C −0.24 2 −0.232 −0.219 V −40°C to 125°C −0.25 1 −0.209 IOUT = −20 mA TA = 25°C −0.24 2 −0.226 −0.219 −40°C to 125°C −0.25 1 −0.209 VR Output Voltage Ripple IOUT = −20 mA 4 mVPP IS Supply Current No Load TA = 25°C 50 78 100 μA −40°C to 125°C 150 ISD Shutdown Supply Current SD = VDD 20 nA ηPOWER Current Conversion Efficiency −5 mA ≤ IOUT ≤ −20 mA 98% ηPOWER Current Conversion Efficiency IOUT = −5 mA 98% tON Turnon Time IOUT = −5 mA 500 μs t OFF Turnoff Time IOUT = −5 mA 700 μs tOFF CP Turnoff Time Charge Pump IOUT = −5 mA 11 μs ZOUT Output Impedance −1 mA ≤ IOUT ≤ −20 mA TA = 25°C 0.23 0.8 Ω −40°C to 125°C 1.3 fOSC Oscillator Frequency 92 kHz VIL Shutdown Input Low TA = 25°C 1.6 V −40°C to 125°C 1.25 VIH Shutdown Input High TA = 25°C 1.85 V −40°C to 125°C 2.15 IC Shutdown Pin Input Current SD = VDD 50 pA Load Regulation 0 mA ≤ IOUT ≤ −20 mA TA = 25°C 0.12 0.6 %/mA −40°C to 125°C 0.85
www.ti.com SNVS420D –NOVEMBER 2008–REVISED MAY 2018 Product Folder Links: LM7705 Submit Documentation FeedbackCopyright © 2008–2018, Texas Instruments Incorporated 3.3-V Electrical Characteristics (continued) Unless otherwise specified, all limits are ensured for TA = 25°C, VDD = 3.3 V, VSS = 0 V, SD = 0 V, CFLY= 5 µF, CRES = 22 µF, COUT = 22 µF. PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT Line Regulation 3 V ≤ VDD ≤ 5.25 V (No Load) %/V −40°C to 125°C 1.1 (1) All limits are specified by testing or statistical analysis. (2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not specified on shipped production material. 6.6 5-V Electrical Characteristics Unless otherwise specified, all limits are ensured for TA = 25°C, VDD = 5.0V, VSS = 0V, SD = 0V, CFLY = 5 µF, CRES = 22 µF, COUT = 22 µF. PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT VOUT Output Voltage IOUT = 0 mA TA = 25°C −0.24 2 −0.233 −0.219 V −40°C to 125°C −0.25 1 −0.209 IOUT = −20 mA TA = 25°C −0.24 2 −0.226 −0.219 −40°C to 125°C −0.25 1 −0.209 VR Output Voltage Ripple IOUT = −20 mA 4 mVPP IS Supply Current No Load TA = 25°C 60 103 135 μA −40°C to 125°C 240 ISD Shutdown Supply Current SD = VDD 20 nA ηPOWER Current Conversion Efficiency −5 mA ≤ IOUT ≤ −20 mA 98% ηPOWER Current Conversion Efficiency IOUT = −5 mA 98% tON Turnon Time IOUT = −5 mA 200 μs t OFF Turnoff Time IOUT = −5 mA 700 μs tOFF CP Turnoff Time Charge Pump IOUT = −5 mA 11 μs ZOUT Output Impedance −1 mA ≤ IOUT −20 mA TA = 25°C 0.26 0.8 Ω −40°C to 125°C 1.3 fOSC Oscillator Frequency 91 kHz VIL Shutdown Input Low TA = 25°C 2.55 V −40°C to 125°C 1.95 VIH Shutdown Input High TA = 25°C 2.8 V −40°C to 125°C 3.25 IC Shutdown Pin Input Current SD = VDD 50 pA Load Regulation 0 mA ≤ IOUT ≤ −20 mA TA = 25°C 0.14 0.6 %/mA −40°C to 125°C 0.85 Line Regulation
3 V ≤ VDD ≤
5.25 V (No
Load) %/V −40°C to 125°C 1.1
6.7 Typical Characteristics
VDD = 3.3 V and TA = 25°C unless otherwise noted. Figure 1. Output Voltage vs. Supply Voltage Figure 2. Supply Current vs. Supply Voltage Figure 3. Output Voltage vs. Output Current Figure 4. Output Voltage vs. Output Current Figure 5. Output Voltage Ripple vs. Temperature Figure 6. Output Voltage Ripple vs. Temperature
VCP,IN fosc VOUT VCP,OUT POST REGULATOR C out VDD VSS VSS VREF2 LM7705 SNVS420D –NOVEMBER 2008–REVISED MAY 2018 www.ti.com Product Folder Links: LM7705 Submit Documentation Feedback Copyright © 2008–2018, Texas Instruments Incorporated
7 Detailed Description
7.1 Overview
The LM7705 is a switched capacitor voltage inverter with a low-noise, −0.23-V fixed negative bias output. The part will operate over a supply voltage range of 3 V to 5.25 V. Applying a logical low level to the SD input will activate the part, and generate a fixed −0.23-V output voltage. The part can be disabled; the output is switched to ground level, by applying a logical high level to the SD input of the part.
7.2 Functional Block Diagram
7.3 Feature Description
7.3.1 Supply Voltage
The LM7705 will operate over a supply voltage range of 3 V to 5.25 V, and meet the specifications given in the 3.3-V Electrical Characteristics Table. Supply voltage lower than 3.3 V will decrease performance (The output voltage will shift towards zero, and the current sink capabilities will decrease) A voltage higher than 5.25 V will exceed the Absolute Maximum Ratings ratings and therefore damage the part.
7.3.2 Output Voltage and Line Regulation
The fixed and regulated output voltage of −0.23 V has tight limits, as indicated in the 3.3-V Electrical Characteristics table, to ensure a stable voltage level. The usage of the pre- and post regulator in combination with the charge pump inverter ensures good line regulation of 0.29%/V
7.3.3 Output Current and Load Regulation
The LM7705 can sink currents more than 26 mA, causing an output voltage shift to −200 mV. A specified load- regulation of 0.14% mA/V ensures a minor voltage deviation for load current up to 20 mA.
7.3.4 Quiescent Current
The LM7705 consumes a quiescent current less than 100 µA. Sinking a load current, will result in a current conversion efficiency better than 90%, even for load currents of 1 mA, increasing to 98% for a current of 5mA.
7.4 Device Functional Modes
7.4.1 General Amplifier Application
This section will discuss a general DC coupled amplifier application. First, one of the limitations of a DC coupled amplifier is discussed. This is illustrated with two application examples. A solution is a given for solving this limitation by using the LM7705. Due to the architecture of the output stage of general amplifiers, the output transistors will saturate. As a result, the output of a general purpose op amp can only swing to a few 100 mV of the supply rails. Amplifiers using CMOS technology do have a lower output saturation voltage. This is illustrated in Figure 22. For example, Texas Instruments' LM7332 can swing to 200 mV to the negative rail, for a 10-kΩ load, over all temperatures.
Figure 22. Limitation of the Output of an Amplifier temperatures for a 10-kΩ load resistance. This is close to the lower supply voltage rail. Figure 23. Output Limitation for Single-Supply True Zero Output Application
- A single stage true zero amplifier, with a 12-bit ADC back end.
- A dual stage true zero amplifier, with a 12-bit ADC back end.
7.4.1.1 One-Stage, Single-Supply True Zero Amplifier
basic set-up of this application. Figure 24. Sensor With DC Output and a Single-Supply Op Amp
the low side of the range cannot be adjusted and is affected by the output swing of the op amp. LM7701 and won’t go below 50 mV instead of the desired 0 V, causing a non-linearity in the sensor reading. output saturation results in a loss of the lower 40 quantization levels of the ADCs dynamic range.
7.4.1.2 Two-Stage, Single-Supply True Zero Amplifier
Figure 25. Sensor With DC Output and a 2-Stage, Single-Supply Op Amp the low side of the range can’t be adjusted and is affected by the output drive of the op amp.
- The high voltage swing is no problem; however the low voltage swing is limited by the output saturation
voltage of A2 from the LM7702 and will not go below 50 mV instead of the desired 0 V.
- Another effect has more impact. The output saturation voltage of the first stage will cause an offset for the
resulting in an output offset voltage of 500mV. This is significantly more that the 50 mV (VDSAT) of A2. cause a major non-linearity in the sensor reading.
7.4.1.3 Dual-Supply, True Zero Amplifiers
supply op amp. The output stage of the used op amp can then still swing from 50 mV of the supply rails. rail. Figure 26 shows the output drive of an amplifier in a true zero output voltage application. Figure 26. Amplifier Output Drive With a Dual-Supply
- The usage of a dual-supply instead of a simple single supply is more expensive.
- A dual supply voltage for the op amps requires parts that can handle a larger operating range for the supply voltage. If the op amps used in the current solution cannot handle this, a redesign can be required. A better solution is to use the LM7705. This low-noise negative bias generator has some major advantages with respect to a dual-supply solution:
- Operates with only a single positive supply, and is therefore a much cheaper solution.
- The LM7705 generates a negative supply voltage of only −0.23 V. This is more than enough to create a True- zero output for most op amps.
- In many applications, this small extension of the supply voltage range can be within the abs max rating for many op amps, so an expensive redesign is not necessary. In the Typical Application section, a typical amplifier application will be evaluated. The performance of an amplifier will be measured in a single supply configuration. The results will be compared with an amplifier using a LM7705 supplying a negative voltage to the bias pin.
8 Application and Implementation
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.1.1 Functional Description
while not exceeding the maximum supply voltage ratings of the amplifier. storage capacitors. This switched capacitor technique is given in Figure 27. Figure 27. Voltage Inverter voltage OUT is equal to –V+. ripple can be influenced by changing the values of the used capacitors.
8.1.2 Technical Description
given in Figure 28. The external power supply and load are added in this diagram as well. Figure 28. LM7705 Architecture
- Pre-regulator
- Charge pump inverter
- Post-regulator
- Controlling the power supplied from the power supply to the charge pump input by the pre-regulator
- The power supplied from the charge pump output to the load by the post-regulator. A more detailed block diagram of the negative bias generator is given in Figure 29. The control of the pre- regulator is based on measuring the output voltage of the charge pump. The goal of the post-regulator is to provide an accurate controlled negative voltage at the output, and acts as a lowpass filter to attenuate the output voltage ripple. The voltage ripple is a result of the switching behavior of the charge pump and is dependent of the output current and the values of the used capacitors.
Figure 29. Charge Pump Inverter With Input and Output Control
8.1.3 Charge Pump Theory
pump. The schematic is given in Figure 30. Figure 30. Charge Pump The switched capacitor network can be replaced by an equivalent resistor, as indicated in Figure 31.
Figure 31. Switched Capacitor Equivalent Circuit value for the used capacitor.
8.2 Typical Application
- A single supply configuration
- A single supply in combination with the LM7705, extending the negative supply from ground level to a fixed –0.23 Voltage.
Figure 32. Typical True Zero Output Voltage Application With or Without LM7705
8.2.1 Design Requirements
The key specifications of the used components are shown in Table 1. Table 1. Design Parameters
8.2.2 Detailed Design Procedure
8.2.2.1 Basic Setup
to demonstrate the VDSAT effect at the output voltage range. negative bias generator, to demonstrate the effect at the output voltage range of the op amp.
8.2.3 Application Curves
amps output level can reach the true zero output level.
- With a single supply, the output of the amplifier is limited by the VDSAT of the output stage.
- The amplifier can be used as a true zero output using a LM7705.
- The quantization error of the digitized output voltage is caused by the noise and the voltage ripple.
- Using the LM7705 does not increase the quantization error in this set up.
Figure 33. Digitized Output Voltage Without LM7705 Figure 34. Digitized Output Voltage With LM7705
9 Power Supply Recommendations
close to the pin as possible.
10 Layout
10.1 Layout Guidelines
CFLY, CRES and COUT in combination with short traces. The output voltage noise can be suppressed using a small RF capacitor, will a value of, for example, 100 nF.
10.2 Layout Examples
Figure 35 contains a layout example for the LM7705. Figure 35. Example PCB Layout: Top layer Figure 36. Schematics for Example PCB Layout
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11 Device and Documentation Support
11.1 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.
11.2 Trademarks
E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.
11.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
11.4 Glossary
SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
www.ti.com 31-Oct-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) LM7705MM/NOPB Active Production VSSOP (DGK) | 8 1000 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 F26A LM7705MM/NOPB.A Active Production VSSOP (DGK) | 8 1000 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 F26A LM7705MME/NOPB Active Production VSSOP (DGK) | 8 250 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 F26A LM7705MME/NOPB.A Active Production VSSOP (DGK) | 8 250 | SMALL T&R Yes SN Level-1-260C-UNLIM -40 to 125 F26A LM7705MMX/NOPB Active Production VSSOP (DGK) | 8 3500 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 F26A LM7705MMX/NOPB.A Active Production VSSOP (DGK) | 8 3500 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 F26A (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1
www.ti.com 31-Oct-2025 Addendum-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 31-Jul-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 31-Jul-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM7705MM/NOPB VSSOP DGK 8 1000 208.0 191.0 35.0 LM7705MME/NOPB VSSOP DGK 8 250 208.0 191.0 35.0 LM7705MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 Pack Materials-Page 2
www.ti.com PACKAGE OUTLINE C 6X 0.65 1.95 8X 0.38 0.25 5.05
4.75 TYP
0.15 0.05 0.25 GAGE PLANE 0 -8
1.1 MAX
0.23 0.13 B 3.1 2.9 NOTE 4 A 3.1 2.9 NOTE 3 0.7 0.4 VSSOP - 1.1 mm max heightDGK0008A SMALL OUTLINE PACKAGE 4214862/A 04/2023
0.13 C A B
0.1 C NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-187. PowerPAD is a trademark of Texas Instruments. A 20 DETAIL A TYPICAL SCALE 4.000
www.ti.com EXAMPLE BOARD LAYOUT
0.05 MAX
0.05 MIN
8X (1.4) 8X (0.45) 6X (0.65) (4.4) (R0.05) TYP VSSOP - 1.1 mm max heightDGK0008A SMALL OUTLINE PACKAGE 4214862/A 04/2023 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 8. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. 9. Size of metal pad may vary due to creepage requirement. TM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 15X SYMM SYMM SEE DETAILS 15.000 METALSOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METALEXPOSED METAL SOLDER MASK DETAILS NON-SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED
www.ti.com EXAMPLE STENCIL DESIGN 8X (1.4) 8X (0.45) 6X (0.65) (4.4) (R0.05) TYP VSSOP - 1.1 mm max heightDGK0008A SMALL OUTLINE PACKAGE 4214862/A 04/2023 NOTES: (continued) 11. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 12. Board assembly site may have different recommendations for stencil design. TM SOLDER PASTE EXAMPLE SCALE: 15X SYMM SYMM
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