LM111

LM111, LM211, LM311 Differential Comparators datasheet (Rev. K)

Document overview

• Manufacturer or author: Texas Instruments, Incorporated [SLCS007,K]
• PDF pages: 42

Technical content

IN− IN+ BALANCE EMIT OUT Copyright © 2016, Texas Instruments Incorporated Product Folder Order Now T echnical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LM111,LM211,LM311 SLCS007K – SEPTEMBER 1973– REVISED MARCH 2017 LM111,LM211,LM311DifferentialComparators

1 Features

1• Fast Response Time: 165 ns

• Strobe Capability
• Maximum Input Bias Current: 300 nA
• Maximum Input Offset Current: 70 nA
• Can Operate From Single 5-V Supply
• Available in Q-Temp Automotive – High-Reliability Automotive Applications – Configuration Control and Print Support – Qualification to Automotive Standards
• On Products Compliant to MIL-PRF-38535, All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters.

2 Applications

• Desktop PCs
• Body Control Modules
• White Goods
• Building Automation
• Oscillators
• Peak Detectors

3 Description

The LM111, LM211, and LM311 devices are single high-speed voltage comparators. These devices are designed to operate from a wide range of power- supply voltages, including ±15-V supplies for operational amplifiers and 5-V supplies for logic systems. The output levels are compatible with most TTL and MOS circuits. These comparators are capable of driving lamps or relays and switching voltages up to 50 V at 50 mA. All inputs and outputs can be isolated from system ground. The outputs can drive loads referenced to ground, VCC+ or VCC−. Offset balancing and strobe capabilities are available, and the outputs can be wire-OR connected. If the strobe is low, the output is in the off state, regardless of the differential input. Device Information(1) PART NUMBER PACKAGE BODY SIZE LM111FK LCCC (20) 8.89 mm × 8.89 mm LM111JG CDIP (8) 9.60 mm × 6.67 mm LM311PS SO (8) 6.20 mm × 5.30 mm LM211D SOIC (8) 4.90 mm × 3.91 mm LM311D LM211P PDIP (8) 9.81 mm × 6.35 mm LM311P LM211PW TSSOP (8) 3.00 mm × 4.40 mm LM311PW (1) For all available packages, see the orderable addendum at the end of the data sheet. SPACER Simplified Schematic

LM111,LM211,LM311 SLCS007K – SEPTEMBER 1973– REVISED MARCH 2017 www.ti.com Product Folder Links: LM111 LM211 LM311 Submit Documentation Feedback Copyright © 1973–2017, Texas Instruments Incorporated Table of Contents

12.2 Receiving Notification of Documentation Updates 23

13 Mechanical, Packaging, and Orderable

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision J (January 2017) to Revision K Page Changes from Revision I (June 2015) to Revision J Page

• Changed the data sheet title From: LMx11 Quad Differential Comparators To: LM111, LM211, LM311 Differential
• Changed text From: "over a −25°C to +85°C temperature range..." To: ""over a −40°C to +85°C temperature Changes from Revision H (August 2003) to Revision I Page
• Added Applications, Device Information table, Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical,

IN− NC NC EMIT OUT NC BALANCE NC NC NC NCCC−V CC+V EMIT OUT IN+ IN− VCC− VCC+ COL OUT BAL/STRB BALANCE LM111,LM211,LM311 www.ti.com SLCS007K – SEPTEMBER 1973– REVISED MARCH 2017 Product Folder Links: LM111 LM211 LM311 Submit Documentation FeedbackCopyright © 1973–2017, Texas Instruments Incorporated

5 Pin Configuration and Functions

LMx11 D, JG, P, PS, or PW Package 8-Pin SOIC, CDIP, PDIP, SO or TSSOP Top View 20-Pin LCCC(1) Top View (1) NC = No internal connection (1) I = Input, O = Output Pin Functions PIN I/O(1) DESCRIPTION NAME LM211, LM311 LM311 LM111 LM111 SOIC, PDIP, TSSOP SO CDIP LCCC IN+ 2 2 2 5 I Noninverting comparator IN– 3 3 3 7 I Inverting input comparator BALANCE 5 5 5 12 I Balance BAL/STRB 6 6 6 15 I Strobe COL OUT 7 7 7 17 O Output collector comparator EMIT OUT 1 1 1 2 O Output emitter comparator VCC– 4 4 4 10 — Negative supply VCC+ 8 8 8 20 — Positive supply NC — — — — No connect (No internal connection)

LM111,LM211,LM311 SLCS007K – SEPTEMBER 1973– REVISED MARCH 2017 www.ti.com Product Folder Links: LM111 LM211 LM311 Submit Documentation Feedback Copyright © 1973–2017, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values, unless otherwise noted, are with respect to the midpoint between VCC+ and VCC–. (3) Differential voltages are at IN+ with respect to IN–. (4) The magnitude of the input voltage must never exceed the magnitude of the supply voltage or ±15 V, whichever is less.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT Supply voltage VCC+(2) 18 VVCC– (2) –18 VCC+ – VCC– 36 VID Differential input voltage(3) ±30 V VI Input voltage (either input)(2)(4) ±15 V Voltage from emitter output to VCC– 30 V Voltage from collector output to VCC– LM111 50 V LM211 50 LM211Q 50 LM311 40 Duration of output short circuit to ground 10 s TJ Operating virtual-junction temperature 150 °C Case temperature for 60 s FK package 260 °C Lead temperature 1,6 mm (1/16 inch) from case, 10 s JG package 300 °C Lead temperature 1,6 mm (1/16 inch) from case, 60 s D, P, PS, or PW package 260 °C Tstg Storage temperature −65 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±500 V Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±750

6.3 Recommended Operating Conditions

VCC+ – VCC– Supply voltage 3.5 30 V VI Input voltage (|VCC+| ≤ 15 V) VCC– + 0.5 VCC+ – 1.5 V TA Operating free-air temperature range LM111 –55 125 LM211 –40 85 LM211Q –40 125 LM311 0 70

LM111,LM211,LM311 www.ti.com SLCS007K – SEPTEMBER 1973– REVISED MARCH 2017 Product Folder Links: LM111 LM211 LM311 Submit Documentation FeedbackCopyright © 1973–2017, Texas Instruments Incorporated (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.4 Thermal Information (8-Pin Packages)

THERMAL METRIC(1) LM211, LM311 LM311 LM111 UNITD (SOIC) P (PDIP) PW (TSSOP) PS (SO) JG (CDIP)

8 PINS 8 PINS 8 PINS 8 PINS 8 PINS

RθJA Junction-to-ambient thermal resistance 114.3 57.5 162 121.8 — °C/W RθJB Junction-to-board thermal resistance 54.5 34.6 93 66.5 — °C/W ψJT Junction-to-top characterization parameter 17.4 24.9 2.6 31.4 — °C/W ψJB Junction-to-board characterization parameter 54 34.5 90.8 65.8 — °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Thermal Information (20-Pin Package)

THERMAL METRIC(1) LM111 UNITFK (LCCC)

20 PINS

RθJC(top) Junction-to-case (top) thermal resistance 5.61 °C/W

LM111,LM211,LM311 SLCS007K – SEPTEMBER 1973– REVISED MARCH 2017 www.ti.com Product Folder Links: LM111 LM211 LM311 Submit Documentation Feedback Copyright © 1973–2017, Texas Instruments Incorporated (1) Unless otherwise noted, all characteristics are measured with BALANCE and BAL/STRB open and EMIT OUT grounded. Full range for LM111 is –55°C to 125°C, for LM211 is –40°C to 85°C, for LM211Q is –40°C to 125°C, and for LM311 is 0°C to 70°C. (2) All typical values are at TA = 25°C. (3) The offset voltages and offset currents given are the maximum values required to drive the collector output up to 14 V or down to 1 V with a pullup resistor of 7.5 kΩ to VCC+. These parameters actually define an error band and take into account the worst-case effects of voltage gain and input impedance. (4) The strobe must not be shorted to ground; it must be current driven at –3 mA to –5 mA (see Figure 18 and Figure 31).

6.6 Electrical Characteristics

at specified free-air temperature, VCC± = ±15 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA (1) LM111 LM211 LM211Q LM311 UNIT MIN TYP(2) MAX MIN TYP(2) MAX VIO Input offset voltage See(3) 25°C 0.7 3 2 7.5 mV Full range 4 10 IIO Input offset current See(3) 25°C 4 10 6 50 nA Full range 20 70 IIB Input bias current 1 V ≤ VO ≤ 14 V 25°C 75 100 100 250 nA Full range 150 300 IIL(S) Low-level strobe current(4) V(strobe) = 0.3 V, VID ≤ –10 mV 25°C –3 –3 mA VICR Common-mode input-voltage range(3) Lower range Full range V Upper range 13 13.8 13 13.8 AVD Large-signal differential-voltage amplification

5 V ≤ VO ≤ 35 V, RL = 1 kΩ 25°C 40 200 40 200 V/mV

(collector) output leakage current I(strobe) = –3 mA, VID = 5 mV VOH = 35 V 25°C 0.2 10 nA Full range 0.5 μA VID = 5 mV, VOH = 35 V 25°C 0.2 50 nA VOL Low-level (collector-to- emitter) output voltage IOL = 50 mA VID = –5 mV 25°C 0.75 1.5 V VID = –10 mV 25°C 0.75 1.5 VCC+ = 4.5 V, VCC– = 0 V, IOL = 8 mA VID = –6 mV Full range 0.23 0.4 VID = –10 mV Full range 0.23 0.4 ICC+ Supply current from VCC+ output low VID = –10 mV, No load 25°C 5.1 6 5.1 7.5 mA ICC– Supply current from VCC– output high VID = 10 mV, No load 25°C –4.1 –5 –4.1 –5 mA (1) The response time specified is for a 100-mV input step with 5-mV overdrive and is the interval between the input step function and the instant when the output crosses 1.4 V. (2) The package thermal impedance is calculated in accordance with MIL-STD-883.

6.7 Switching Characteristics

VCC± = ±15 V, TA = 25°C PARAMETER TEST CONDITIONS LM111 LM211 LM211Q LM311 UNIT TYP Response time, low-to-high-level outputSee(1) RC = 500 Ω to 5 V, CL = 5 pF, see (2) 115 ns Response time, high-to-low-level outputSee(1) 165 ns

6.8 Typical Characteristics

Condition 1 is with BALANCE and BAL/STRB open. Condition 2 is with BALANCE and BAL/STRB connected to VCC+. Figure 1. Input Offset Current vs Free-Air Temperature Condition 1 is with BALANCE and BAL/STRB open. Condition 2 is with BALANCE and BAL/STRB connected to VCC+. Figure 2. Input Bias Current vs Free-Air Temperature Figure 3. Output Response for Various Input Overdrives Figure 4. Output Response for Various Input Overdrives Figure 5. Output Current and Dissipation vs Output Voltage Figure 6. Positive Supply Current vs Positive Supply

40 V (LM311)

7 Parameter Measurement Information

Figure 9. Collector Output Transfer Characteristic Figure 10. Emitter Output Transfer Characteristic Figure 11. Test Circuit for Figure 3 and Figure 4 Figure 12. Test Circuit for Figure 14 and Figure 15

IN− 450 Ω 450 Ω 2.4 kΩ 1.2 kΩ 70 Ω 2.4 kΩ 1.2 kΩ 60 Ω 400 Ω 450 Ω 2 kΩ 200 Ω250 Ω 600 Ω 130 Ω 4 Ω 4 kΩ VCC+ VCC− EMIT OUT COL OUT 750 Ω 600 Ω Component Count Resistors 20 Diodes 2 EPI FET 1 Transistors 22 Copyright © 2016, Texas Instruments Incorporated LM111,LM211,LM311 SLCS007K – SEPTEMBER 1973– REVISED MARCH 2017 www.ti.com Product Folder Links: LM111 LM211 LM311 Submit Documentation Feedback Copyright © 1973–2017, Texas Instruments Incorporated

8 Detailed Description

8.1 Overview

The LM111, LM211 and LM311 are voltage comparators that have input currents nearly a thousand times lower than legacy standard devices. They are also designed to operate over a wider range of supply voltages: from standard ±15V op amp supplies down to the single 5-V supply used for IC logic. Their output is compatible with RTL, DTL and TTL as well as MOS circuits. Further, they can drive lamps or relays, switching voltages up to 50 V at currents as high as 50 mA. Both the inputs and the outputs of the LM111, LM211 or the LM311 can be isolated from system ground, and the output can drive loads referred to ground, the positive supply or the negative supply. Offset balancing and strobe capability are provided and outputs can be wire ORed. The LM211 is identical to the LM111, except that its performance is specified over a −40°C to +85°C temperature range instead of −55°C to +125°C. The LM311 has a temperature range of 0°C to +70°C. The LM211Q has a temperature range of −40°C to +125°C.

8.2 Functional Block Diagram

LM111,LM211,LM311 www.ti.com SLCS007K – SEPTEMBER 1973– REVISED MARCH 2017 Product Folder Links: LM111 LM211 LM311 Submit Documentation FeedbackCopyright © 1973–2017, Texas Instruments Incorporated

8.3 Feature Description

LMx11 consists of a PNP input stage to sense voltages near VCC–. It also contains balance and strobe pins for external offset adjustment or trimming. The input stage is followed by a very high gain stage for very fast response after a voltage difference on the input pins have been sensed. This is then followed by the output stage that consists of an open collector NPN (pulldown or low-side) transistor. Unlike most open drain comparators, this NPN output stage has an isolated emitter from VCC–, allowing this device to set the VOL output value for collector output.

8.4 Device Functional Modes

8.4.1 Voltage Comparison

The LMx11 operates solely as a voltage comparator, comparing the differential voltage between the positive and negative pins and outputting a logic low or high impedance (logic high with pullup) based on the input differential polarity.

9 Application and Implementation

the design implementation to confirm system functionality.

9.1 Application Information

9.2 Typical Application

Figure 13. Zero-Crossing Detector

9.2.1 Design Requirements

For this design example, use the parameters listed in Table 1 as the input parameters. Table 1. Design Parameters

9.2.2 Detailed Design Procedure

• Input voltage range
• Minimum overdrive voltage
• Output and drive current
• Response time

P PULLUP LR C/c116 /c64 /c180 LM111,LM211,LM311 www.ti.com SLCS007K – SEPTEMBER 1973– REVISED MARCH 2017 Product Folder Links: LM111 LM211 LM311 Submit Documentation FeedbackCopyright © 1973–2017, Texas Instruments Incorporated

9.2.2.1 Input Voltage Range

When choosing the input voltage range, consider the input common mode voltage range (VICR). Operation outside of this range can yield incorrect comparisons. The following list describes the outcomes of some input voltage situations.

• When both IN– and IN+ are both within the common-mode range: – If IN– is higher than IN+ and the offset voltage, the output is low and the output transistor is sinking current – If IN– is lower than IN+ and the offset voltage, the output is high impedance and the output transistor is not conducting
• When IN– is higher than common mode and IN+ is within common mode, the output is low and the output transistor is sinking current
• When IN+ is higher than common mode and IN– is within common mode, the output is high impedance and the output transistor is not conducting
• When IN– and IN+ are both higher than common mode, the output is undefined

9.2.2.2 Minimum Overdrive Voltage

Overdrive voltage is the differential voltage produced between the positive and negative inputs of the comparator over the offset voltage (VIO). To make an accurate comparison the Overdrive voltage (VOD) must be higher than the input offset voltage (VIO). Overdrive voltage can also determine the response time of the comparator, with the response time decreasing with increasing overdrive. Figure 14 and Figure 15 show positive and negative response times with respect to overdrive voltage.

9.2.2.3 Output and Drive Current

Output current is determined by the pullup resistance and pullup voltage. The output current produces a output low voltage (VOL) from the comparator, in which VOL is proportional to the output current. Use Figure 5 to determine VOL based on the output current. The output current can also effect the transient response.

9.2.2.4 Response Time

The load capacitance (CL), pullup resistance (RPULLUP), and equivalent collector-emitter resistance (RCE) levels determine the transient response. Equation 1 approximates the positive response time. Equation 2 approximates the negative response time. RCE can be determine by taking the slope of Figure 5 in the linear region at the desired temperature, or by Equation 3. (1) (2) where

• VOL is the low-level output voltage
• IOUT is the output current (3)

9.2.3 Application Curves

Figure 14. Output Response for Various Input Overdrives Figure 15. Output Response for Various Input Overdrives

9.3 System Examples

Figure 16 through Figure 33 show various applications for the LM111, LM211, and LM311 comparators. Figure 16. 100-kHz Free-Running Multivibrator

8 VCC+

7 COL OUT

6 BAL/STROB

5 BALANCE

10 Power Supply Recommendations

input and create an inaccurate comparison.

11 Layout

11.1 Layout Guidelines

supply and negative supply (if available).

11.2 Layout Example

Figure 34. LMx11 Layout Example

12 Device and Documentation Support

12.1 Related Links

resources, tools and software, and quick access to sample or buy. Table 2. Related Links

12.2 Receiving Notification of Documentation Updates

changed. For change details, review the revision history included in any revised document.

12.3 Community Resources

solve problems with fellow engineers. contact information for technical support.

12.4 Trademarks

E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.

12.5 Electrostatic Discharge Caution

during storage or handling to prevent electrostatic damage to the MOS gates.

12.6 Glossary

This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

this document. For browser based versions of this data sheet, refer to the left hand navigation.

www.ti.com 15-Jul-2026 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) JM38510/10304BPA Active Production CDIP (JG) | 8 50 | TUBE No SNPB N/A for Pkg Type -55 to 125 JM38510 /10304BPA JM38510/10304BPA.A Active Production CDIP (JG) | 8 50 | TUBE No SNPB N/A for Pkg Type -55 to 125 JM38510 /10304BPA LM111FKB Active Production LCCC (FK) | 20 55 | TUBE No SNPB N/A for Pkg Type -55 to 125 LM111FKB LM111FKB.A Active Production LCCC (FK) | 20 55 | TUBE No SNPB N/A for Pkg Type -55 to 125 LM111FKB LM111JG Active Production CDIP (JG) | 8 50 | TUBE No SNPB N/A for Pkg Type -55 to 125 LM111JG LM111JG.A Active Production CDIP (JG) | 8 50 | TUBE No SNPB N/A for Pkg Type -55 to 125 LM111JG LM111JGB Active Production CDIP (JG) | 8 50 | TUBE No SNPB N/A for Pkg Type -55 to 125 LM111JGB LM111JGB.A Active Production CDIP (JG) | 8 50 | TUBE No SNPB N/A for Pkg Type -55 to 125 LM111JGB LM211D Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 LM211 LM211D.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 LM211 LM211DR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 LM211 LM211DR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 LM211 LM211DRG4 Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 LM211 LM211DRG4.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 LM211 LM211P Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type -40 to 85 LM211P LM211P.A Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type -40 to 85 LM211P LM211PE4 Active Production PDIP (P) | 8 50 | TUBE - Call TI Call TI -40 to 85 LM211PW Active Production TSSOP (PW) | 8 150 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 L211 LM211PW.A Active Production TSSOP (PW) | 8 150 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 L211 LM211PWR Active Production TSSOP (PW) | 8 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 L211 LM211PWR.A Active Production TSSOP (PW) | 8 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 L211 LM211PWRE4 Active Production TSSOP (PW) | 8 2000 | LARGE T&R - Call TI Call TI -40 to 85 LM211QD Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 LM211Q LM211QD.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 LM211Q LM211QDG4 Obsolete Production SOIC (D) | 8 - - Call TI Call TI -40 to 125 LM211Q LM211QDR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 LM211Q LM211QDR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 LM211Q LM211QDRG4 Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 LM211Q Addendum-Page 1

www.ti.com 15-Jul-2026 Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) LM211QDRG4.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 LM211Q LM311D Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM 0 to 70 LM311 LM311D.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM 0 to 70 LM311 LM311DR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 70 LM311 LM311DR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 70 LM311 LM311DRG4 Obsolete Production SOIC (D) | 8 - - Call TI Call TI 0 to 70 LM311 LM311P Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type 0 to 70 LM311P LM311P.A Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type 0 to 70 LM311P LM311PE4 Active Production PDIP (P) | 8 50 | TUBE - Call TI Call TI 0 to 70 LM311PSR Active Production SO (PS) | 8 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 70 L311 LM311PSR.A Active Production SO (PS) | 8 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 70 L311 LM311PW Active Production TSSOP (PW) | 8 150 | TUBE Yes NIPDAU Level-1-260C-UNLIM 0 to 70 L311 LM311PW.A Active Production TSSOP (PW) | 8 150 | TUBE Yes NIPDAU Level-1-260C-UNLIM 0 to 70 L311 LM311PWG4 Active Production TSSOP (PW) | 8 150 | TUBE - Call TI Call TI 0 to 70 LM311PWR Active Production TSSOP (PW) | 8 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 70 L311 LM311PWR.A Active Production TSSOP (PW) | 8 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 70 L311 LM311PWRG4 Active Production TSSOP (PW) | 8 2000 | LARGE T&R - Call TI Call TI 0 to 70 M38510/10304BPA Active Production CDIP (JG) | 8 50 | TUBE No SNPB N/A for Pkg Type -55 to 125 JM38510 /10304BPA (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. Addendum-Page 2

www.ti.com 15-Jul-2026 (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF LM211 :

• Automotive : LM211-Q1
• Enhanced Product : LM211-EP NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
• Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 10-Aug-2026 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 10-Aug-2026 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM211DR SOIC D 8 2500 353.0 353.0 32.0 LM211DRG4 SOIC D 8 2500 353.0 353.0 32.0 LM211DRG4 SOIC D 8 2500 340.5 338.1 20.6 LM211PWR TSSOP PW 8 2000 353.0 353.0 32.0 LM211QDR SOIC D 8 2500 353.0 353.0 32.0 LM311DR SOIC D 8 2500 353.0 353.0 32.0 LM311DR SOIC D 8 2500 353.0 353.0 32.0 LM311PSR SO PS 8 2000 353.0 353.0 32.0 LM311PWR TSSOP PW 8 2000 353.0 353.0 32.0 Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 10-Aug-2026 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) LM111FKB FK LCCC 20 55 506.98 12.06 2030 NA LM111FKB.A FK LCCC 20 55 506.98 12.06 2030 NA LM211D D SOIC 8 75 507 8 3940 4.32 LM211D D SOIC 8 75 506.6 8 3940 4.32 LM211D.A D SOIC 8 75 507 8 3940 4.32 LM211D.A D SOIC 8 75 506.6 8 3940 4.32 LM211P P PDIP 8 50 506 13.97 11230 4.32 LM211P.A P PDIP 8 50 506 13.97 11230 4.32 LM211PW PW TSSOP 8 150 530 10.2 3600 3.5 LM211PW.A PW TSSOP 8 150 530 10.2 3600 3.5 LM211QD D SOIC 8 75 507 8 3940 4.32 LM211QD.A D SOIC 8 75 507 8 3940 4.32 LM311D D SOIC 8 75 507 8 3940 4.32 LM311D D SOIC 8 75 506.6 8 3940 4.32 LM311D.A D SOIC 8 75 506.6 8 3940 4.32 LM311D.A D SOIC 8 75 507 8 3940 4.32 LM311P P PDIP 8 50 506 13.97 11230 4.32 LM311P.A P PDIP 8 50 506 13.97 11230 4.32 LM311PW PW TSSOP 8 150 530 10.2 3600 3.5 LM311PW.A PW TSSOP 8 150 530 10.2 3600 3.5 Pack Materials-Page 3

www.ti.com GENERIC PACKAGE VIEW This image is a representation of the package family, actual package may vary. Refer to the product data sheet for package details. LCCC - 2.03 mm max heightFK 20 LEADLESS CERAMIC CHIP CARRIER8.89 x 8.89, 1.27 mm pitch 4229370\\/A\\

www.ti.com PACKAGE OUTLINE C .228-.244 TYP [5.80-6.19] .069 MAX [1.75] 6X .050 [1.27] 8X .012-.020 [0.31-0.51] .150 [3.81] .005-.010 TYP [0.13-0.25] 0 - 8 .004-.010 [0.11-0.25] .010 [0.25].016-.050 [0.41-1.27] 4X (0 -15 ) A .189-.197 [4.81-5.00] NOTE 3 B .150-.157 [3.81-3.98] NOTE 4 4X (0 -15 ) (.041) [1.04] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. 1 8 .010 [0.25] C A B PIN 1 ID AREA SEATING PLANE .004 [0.1] C SEE DETAIL A DETAIL A TYPICAL SCALE 2.800

www.ti.com EXAMPLE BOARD LAYOUT .0028 MAX [0.07] ALL AROUND .0028 MIN [0.07] ALL AROUND (.213) [5.4] 6X (.050 ) [1.27] 8X (.061 ) [1.55] 8X (.024) [0.6] (R.002 ) TYP [0.05] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METAL SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS EXPOSED METAL OPENING SOLDER MASK METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SYMM 4 5 SEE DETAILS SYMM

www.ti.com EXAMPLE STENCIL DESIGN 8X (.061 ) [1.55] 8X (.024) [0.6] 6X (.050 ) [1.27] (.213) [5.4] (R.002 ) TYP [0.05] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X SYMM SYMM 4 5

www.ti.com PACKAGE OUTLINE C TYP6.6 6.2

1.2 MAX

6X 0.65 8X 0.30 0.19 1.95 0.15 0.05 (0.15) TYP 0 - 8 0.25 GAGE PLANE 0.75 0.50 A NOTE 3 3.1 2.9 B NOTE 4 4.5 4.3 4221848/A 02/2015 TSSOP - 1.2 mm max heightPW0008A SMALL OUTLINE PACKAGE NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153, variation AA. 1 8

0.1 C A B

0.1 C SEE DETAIL A DETAIL A TYPICAL SCALE 2.800

www.ti.com EXAMPLE BOARD LAYOUT (5.8)

0.05 MAX

0.05 MIN

8X (1.5) 8X (0.45) 6X (0.65) (R ) TYP 0.05 4221848/A 02/2015 TSSOP - 1.2 mm max heightPW0008A SMALL OUTLINE PACKAGE SYMM SYMM LAND PATTERN EXAMPLE SCALE:10X 4 5 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METALSOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS NOT TO SCALE SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN (5.8) 6X (0.65) 8X (0.45) 8X (1.5) (R ) TYP0.05 4221848/A 02/2015 TSSOP - 1.2 mm max heightPW0008A SMALL OUTLINE PACKAGE NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SYMM SYMM 4 5 SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:10X

www.ti.com PACKAGE OUTLINE 10.16 9.00 7.11 6.22 1.60 0.38 6X 2.54 8X 0.58 0.38 4X 1.65 1.14 0.51 MIN 3.30 MIN

5.08 MAX

7.87 7.37 0.36

0.20 TYP

4X (0.94) CDIP - 5.08 mm max heightJG0008A CERAMIC DUAL IN-LINE PACKAGE 4230036/A 09/2023 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This package can be hermetically sealed with a ceramic lid using glass frit. 4. Index point is provided on cap for terminal identification. 5. Falls within MIL STD 1835 GDIP1-T8 SEATING PLANE

0.25 C A B

A B C

www.ti.com EXAMPLE BOARD LAYOUT (7.62) 6X (2.54) 8X ( 1) THRU 7X ( 1.6) (1.6) (R0.05) TYP CDIP - 5.08 mm max heightJG0008A CERAMIC DUAL IN-LINE PACKAGE 4230036/A 09/2023 LAND PATTERN EXAMPLE NON SOLDER MASK DEFINED SCALE: 9X SOLDER MASK OPENING TYP METAL TYP SYMM SYMM 4 5

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