LFDW

LT3682 LINER

Document overview

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Technical content

DESCRIPTION

The L T®3682 is an adjustable frequency (250kHz to 2.2MHz) monolithic buck switching regulator that accepts input voltages up to 36V . A high effi ciency 0.5Ω switch is included on the device along with a boost diode and the necessary oscillator , control, and logic circuitry. Current mode topology is used for fast transient response and good loop stability. A SYNC pin allows the user to synchronize the part to an external clock, and to choose between Low Ripple Burst Mode operation and standard PWM operation. The Low Ripple Burst Mode maintains high effi ciency at low output currents while keeping output ripple below 15mV in typical applications. Shutdown reduces input supply current to less than 1μA while a resistor and capacitor on the RUN/SS pin provide a controlled output voltage ramp (soft-start). A power good fl ag signals when V OUT reaches 90% of the programmed output voltage. Protection circuitry senses the current in the power switch and external Schottky catch diode to protect the L T3682 against short-circuit conditions. Frequency foldback and thermal shutdown provide additional protection. The L T3682 is available in a 12-Pin 3mm × 3mm DFN with exposed pad for low thermal resistance. 5V Step-Down Converter L, L T , L TC and L TM are registered trademarks of Linear Technology Corporation. Burst Mode is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners.

FEATURES

APPLICATIONS

n Automotive Battery Regulation n Automotive Entertainment Systems n Industrial Supplies n Power for Portable Products n Distributed Supply Regulation n Wide Input Range: Operation from 3.6V to 36V Overvoltage Lockout Protects Circuits through 60V T ransients n 1A Output Current n Low Ripple Burst Mode ® Operation I Q = 75μA at 12VIN to 3.3VOUT Output Ripple < 15mV P-P n Adjustable Switching Frequency: 250kHz to 2.2MHz n Short-Circuit Protected n Synchronizable Between 300kHz and 2.2MHz n 0.8V Feedback Reference Voltage n Output Voltage 0.8V to 20V n Soft-Start Capability n Power Good Flag n Small 12-Pin Thermally Enhanced 3mm × 3mm Effi ciency VIN 6.9V TO 36V TRANSIENT TO 60V VOUT 0.9A, VIN r 6.9V 1A, VIN r 12V 2.2μF 16.2k 40.2k 470pF 102k 10μF 536k 0.22μF 10μH

3682 TA01

f = 800kHz LOAD CURRENT (A) EFFICIENCY (%) 100 0.2 0.4 0.6 0.8 1 VOUT = 5V VOUT = 3.3V VIN = 12V L = 10µH f = 800 kHz

3682 TA01b

PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS FB, R Operating Junction Temperature Range (Notes 3 and 6) Storage Temperature Range ………….. −65°C to 150°C (Note 1) TOP VIEW DD PACKAGE 12-LEAD (3mm s 3mm) PLASTIC DFN

1 VIN

V C FB PG GND BD BOOST 6 7 θJA = 43°C/W EXPOSED PAD (PIN 13) IS PGND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE L T3682EDD#PBF L T3682EDD#TRPBF LFDW 12-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C L T3682IDD#PBF L T3682IDD#TRPBF LFDW 12-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C Consult L TC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container . Consult L TC Marketing for information on non-standard lead based fi nish parts. For more information on lead free part marking, go to: http://www.linear .com/leadfree/ For more information on tape and reel specifi cations, go to: http://www.linear .com/tapeandreel/

ELECTRICAL CHARACTERISTICS

PARAMETER CONDITIONS MIN TYP MAX UNITS Minimum Operating Voltage V BD = 3.3V VBD < 3.0V l l 3.4 3.4 3.6 4.3 V V VIN Overvoltage Lockout l 36 39 41 V Quiescent Current from VIN VRUN/SS = 0.2V VRUN/SS = 10V , VBD = 3.3V , Not Switching VRUN/SS = 10V , VBD = 0V , Not Switching l 0.01 0.5 160 μA μA μA Quiescent Current from BD Pin V RUN/SS = 0.2V VRUN/SS = 10V , VBD = 3.3V , Not Switching VRUN/SS = 10V , VBD = 0V , Not Switching l 0.01 0.5 100 μA μA μA Minimum BD Pin Voltage 2.8 3 V Feedback Voltage l 792 780 800 800 808 812 mV mV FB Pin Bias Current (Note 4) FB Pin Voltage = 800mV l 58 0 n A FB Voltage Line Regulation 3.6V < V IN < 36V 0.001 0.005 %/V Error Amp gm IVC = ±1.5μA 430 μS Error Amp Voltage Gain 1300 V/V The l denotes specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C, VIN = 10V, VRUN/SS = 10V, VBD = 3.3V unless otherwise noted. (Note 3)

Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect the device reliability and lifetime. Note 2: Absolute Maximum Voltage at V IN and RUN/SS pins is 60V for nonrepetitive 1 second transients, and 36V for continuous operation. Note 3: The L T3682E is guaranteed to meet performance specifi cations from 0°C to 125°C junction temperature. Specifi cations over the −40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The L T3682I is guaranteed over the full −40°C to 125°C operating junction temperature range. The l denotes specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C, VIN = 10V, VRUN/SS = 10V, VBD = 3.3V unless otherwise noted. (Note 3) PARAMETER CONDITIONS MIN TYP MAX UNITS VC Source Current 50 μA VC Sink Current 50 μA VC Pin to Switch Current Gain 1.25 A/V VC Switching Threshold 0.5 0.6 0.7 V VC Clamp Voltage 2V Switching Frequency R RT = 8.06kΩ RRT = 29.4kΩ RRT = 158kΩ 1.98 0.9 225 2.2 250 2.42 1.1 275 MHz MHz kHz Minimum Switch Off-Time l 130 210 ns Switch Current Limit (Note 7) SYNC = 0V SYNC = 3.3V or Clocked 1.45 1.18 1.7 1.4 1.66 A A Switch VCESAT ISW = 1A 460 mV DA Pin Current to Stop OSC 1.25 1.6 1.95 A Switch Leakage Current V SW = 0V , VIN = 60V 0.01 1 μA Boost Schottky Diode Voltage Drop I BSD = 50mA 720 850 mV Boost Schottky Diode Reverse Leakage V SW = 10V , VBD = 0 0.1 1 μA Minimum Boost Voltage (Note 5) l 1.7 2.5 V BOOST Pin Current I SW = 0.5A 10.5 17.5 mA RUN/SS Pin Current V RUN/SS = 10V 12 20 μA RUN/SS Input Voltage High 2.5 V RUN/SS Input Voltage Low 0.2 V PG Leakage Current V PG = 5V 0.1 1 μA PG Sink Current V PG = 0.4V l 100 1000 μA PG Threshold as % of VFB Measured at FB pin. FB Pin Voltage Rising 88% 90% 92% V PG Threshold Hysteresis Measured at FB Pin 12 mV SYNC Threshold Voltage 300 550 800 mV SYNC Input Frequency 0.3 2.2 MHz Note 4: Bias current fl ows out of the FB pin. Note 5: This is the minimum voltage across the boost capacitor needed to guarantee full saturation of the switch. Note 6: This IC includes over-temperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed the maximum operating junction temperature when over-temperature protection is active. Continuous operation above the specifi ed maximum operating junction temperature may impair device reliability. Note 7: Current limit guaranteed by design and/or correlation to static test. Slope compensation reduces current limit at higher duty cycles.

TYPICAL PERFORMANCE CHARACTERISTICS LOAD CURRENT (mA) 0.1 EFFICIENCY (%) 1000

3682 G01

VIN = 12V VIN = 34V VIN = 24V L = 10μH f = 800kHz LOAD CURRENT (mA) EFFICIENCY (%)

3682 G02

0.1 1000 1 10 100 VIN = 12V VIN = 34V VIN = 24V L = 10μH f = 800kHz LOAD CURRENT (mA) 0.1 EFFICIENCY (%) POWER LOSS(W) 1000

3682 G03

0.1 0.01 0.001 VIN = 12V VOUT = 3.3V L = 10μH f = 800kHz INPUT VOL TAGE(V) SUPPL Y CURRENT (μA) 100

3682 G04

VOUT = 3.3V TEMPERATURE(°C) SUPPL Y CURRENT (μA) 700 600 500 800 900

3682 G05

CATCH DIODE: DIODES, INC. B150 VIN = 12V VOUT = 3.3V INCREASED SUPPL Y CURRENT DUE TO CATCH DIODE LEAKAGE AT HIGH TEMPERATURE INPUT VOL TAGE (V) LOAD CURRENT (A) 1.25 0.75 1.5

3682 G06

0.5 0.25 10 15 20 30 3525 1.75 TYPICAL MINIMUM VOUT = 3.3V L = 10μH f = 800kHz SYNC = 0V SYNC = 3.3V INPUT VOL TAGE (V) LOAD CURRENT (A) 0.75 1.25

3682 G07

0.5 0.25 10 15 20 30 3525 1.5 TYPICAL MINIMUM VOUT = 5V L = 10μH f = 800kHz SYNC = 0V SYNC = 5V INPUT VOL TAGE (V) LOAD CURRENT (A) 1.25

3682 G08

0.5 0.75 0.25 10 12 14 16 18 1.5 TYPICAL MINIMUM VOUT = 5V L = 4.7μH f = 2MHz SYNC = 0V SYNC = 5V INPUT VOL TAGE (V) LOAD CURRENT (A) 1.5 1.25 1.75

3682 G09

0.75 0.50 0.25 5 10 15 20 30 3525 TYPICAL MINIMUM VOUT = 1.8V L = 10μH f = 500kHz SYNC = 0V SYNC = 3.3V No Load Supply Current No Load Supply Current Maximum Load Current Maximum Load Current Maximum Load Current Maximum Load Current Effi ciency (VOUT = 5V , SYNC = 0V) Effi ciency (V OUT = 3.3V , SYNC = 0V) Effi ciency (V OUT = 3.3V , SYNC = 0V) TA = 25°C, unless otherwise noted.

DUTY CYCLE (%) SWITCH CURRENT LIMIT (A) 1.3 1.1 1.5 1.7 100

3682 G10

0.7 0.9 0.5 20 40 60 80 1.9 SYNC < 0.3V SYNC > 0.8V OR CLOCKED TEMPERATURE (°C) SWITCH CURRENT LIMIT (A) 1.3 1.1 0.9 1.7 1.5 125

3682 G11

0.7 0.5 25 0 25 75 10050 1.9 DC = 90% DC = 10% SWITCH CURRENT (A) VOL TAGE DROP (mV) 400 500 300 600 1.25

3682 G12

0.25 0.5 0.75 1 700 SWITCH CURRENT (A) BOOST PIN CURRENT (mA) 1.25

3682 G13

0.25 0.5 0.75 1 TEMPERATURE(°C) FEEDBACK VOL TAGE (mV) 800

3682 G14

TEMPERATURE(°C) FREQUENCY (MHz) 1.05 1.10 1.15

3682 G15

0.95 0.90 0.85 0.80 25 0 25 50 100 125 75 1.20 RRT = 29.4k FB PIN VOL TAGE (mV) FREQUENCY (kHz) 1000 900

3682 G16

100 200 300 400 600 700 800500 1200 RRT = 29.4k TEMPERATURE (°C) MINIMUM SWITCH ON TIME (ns) 100 120

3682 G17

RUN/SS PIN VOL TAGE (V) SWITCH CURRENT LIMIT (A) 1.4 0.8 1.2 1.6 1.8 3.5

3682 G18

0.4 0.2 0.6 0.5 1 1.5 2 3 2.5 Boost Pin Current Feedback Voltage Switching Frequency Frequency Foldback Minimum Switch On-Time Soft-Start Switch Current Limit Switch Current Limit (SYNC Pin Grounded) Switch Voltage Drop TYPICAL PERFORMANCE CHARACTERISTICSTA = 25°C, unless otherwise noted.

RUN/SS PIN VOL TAGE (V) RUN/SS PIN CURRENT (μA) 35 40

3682 G19

BOOST DIODE CURRENT (A) BOOST DIODE Vf (V) 0.8 1.2

3682 G20

0.4 0.2 0.6 0.25 0.5 0.75 1.4 FB PIN ERROR VOL TAGE (mV) 200 VC PIN CURRENT (μA) 200

3682 G21

LOAD CURRENT (mA) INPUT VOL TAGE (V) 3.5 4.5 1000

3682 G22

2.5 10 100 VOUT = 3.3V L = 10μH f = 800kHz LOAD CURRENT (mA) INPUT VOL TAGE (V) 5.5 1000

3682 G23

4.5 10 100 6.5 VOUT = 5V L = 10μH f = 800kHz LOAD CURRENT(A) VIN (V)

3682 G24

TA = 85˚C TA = 25˚C VOUT = 3.3V L = 10μH f = 800kHz SYNC = 3.3V LOAD CURRENT(A) VIN (V)

3682 G25

TA = 85˚C TA = 25˚C VOUT = 5V L = 10μH f = 800kHz SYNC = 5V LOAD CURRENT(A) VIN (V)

3682 G26

TA = 85˚C TA = 25˚C VOUT = 5V L = 4.7μH f = 2MHz SYNC =5V TEMPERATURE(°C) VC VOL TAGE (V) 1.5

3682 G27

0.5 2.5 25 0 25 50 100 125 75 SWITCHING THRESHOLD CURRENT LIMIT CLAMP Minimum Input Voltage Minimum Input Voltage Maximum V IN for Full Frequency Maximum VIN for Full Frequency Maximum V IN for Full Frequency V C Voltages RUN/SS Pin Current Boost Diode Forward Voltage Error Amplifi er Output Current TYPICAL PERFORMANCE CHARACTERISTICSTA = 25°C, unless otherwise noted.

TEMPERATURE(°C)

3682 G28

THRESTHOLD VOL TAGE (%) 5μs/DIV VOUT 20mV/DIV IL 0.2A/DIV VSW 5V/DIV

3682 G29

VIN = 12V; FRONT PAGE APPLICATION ILOAD = 5mA 1μs/DIV VOUT 20mV/DIV IL 0.2A/DIV VSW 5V/DIV

3682 G30

VIN = 12V; FRONT PAGE APPLICATION ILOAD = 55mA 1μs/DIV VOUT 20mV/DIV IL 0.5A/DIV VSW 5V/DIV

3682 G31

VIN = 12V; FRONT PAGE APPLICATION ILOAD = 500mA Switching Waveforms; Burst Mode Switching Waveforms; T ransition from Burst Mode to Full Frequency Switching Waveforms; Full Frequency Continuous Operation Power Good Threshold TYPICAL PERFORMANCE CHARACTERISTICSTA = 25°C, unless otherwise noted.

VC (Pin 1): The VC pin is the output of the internal error amplifi er . The voltage on this pin controls the peak switch current. Tie an RC network from this pin to ground to compensate the control loop. FB (Pin 2): The L T3682 regulates the FB pin to 0.8V. Connect the feedback resistor divider tap to this pin. PG (Pin 3): The PG pin is the open collector output of an internal comparator . PG remains low until the FB pin is within 10% of the fi nal regulation voltage. PG output is valid when V IN is above the minimum input voltage and RUN/SS is high. GND (Pin 4): The GND pin is the ground of all the internal circuitry. Tie directly to the local GND plane. BD (Pin 5): This pin connects to the anode of the boost Schottky diode. BD also supplies current to the L T3682’s internal regulator . BOOST (Pin 6): This pin is used to provide a drive volt- age, higher than the input voltage, to the internal bipolar NPN power switch. Connect a capacitor (typically 0.22μF) between BOOST and SW . DA (Pin 7): Connect the anode of the catch diode (D1 in Block Diagram) to this pin. Internal circuitry senses the current through the catch diode providing frequency foldback in extreme situations. SW (Pin 8): The SW pin is the output of the internal power switch. Connect this pin to the inductor , catch diode and boost capacitor . RUN/SS (Pin 9): The RUN/SS pin is used to put the L T3682 in shutdown mode. Tie to ground to shut down the L T3682. Tie to 2.5V or more for normal operation. RUN/SS also provides a soft-start function; see the Applications Infor- mation section for more information. R T (Pin 10): Oscillator Resistor Input. Connect a resistor from this pin to ground to set the switching frequency. SYNC (Pin 11): This is the external clock synchronization input. Ground this pin for low ripple Burst Mode operation at low output loads. Tie to 0.8V or more for pulse skipping mode operation. Tie to a clock source for synchronization. Clock edges should have rise and fall times faster than 1μs. Note that the maximum load current depends on which mode is chosen. See the Applications Information section for more information. V IN (Pin 12): The VIN pin supplies current to the L T3682’s internal regulator and to the internal power switch. This pin must be locally bypassed. Exposed Pad (Pin 13): PGND. This is the power ground used by the catch diode (D1) when its anode is connected to the DA pin. The exposed pad must be soldered to the PCB.

INTERNAL 0.8V REF SOFT START 0.720V ERROR AMP OSCILLATOR 250kHz-2.2MHz DISABLESYNC OUT OUTB BURST MODE DETECT THERMAL SHUTDOWN VC CLAMP R1R2 FBGND OVLO SLOPE COMP R S Q DA PGND SW BOOST BD VC CC CFRC 3682 BD 134

The L T3682 is a constant frequency, current mode step-down regulator . An oscillator , with frequency set by R T, enables an RS fl ip-fl op, turning on the internal power switch. An amplifi er and comparator monitor the current fl owing between the VIN and SW pins, turning the switch off when this current reaches a level determined by the voltage at V C. An error amplifi er measures the output voltage through an external resistor divider tied to the FB pin and servos the V C pin. If the error amplifi er’s output increases, more current is delivered to the output; if it decreases, less current is delivered. An active clamp on the V C pin provides current limit. The VC pin is also clamped to the voltage on the RUN/SS pin; soft-start is implemented by generating a voltage ramp at the RUN/SS pin using an external resistor and capacitor . An internal regulator provides power to the control circuitry. The bias regulator normally draws power from the V IN pin, but if the BD pin is connected to an external voltage higher than 3V, bias power will be drawn from the external source (typically the regulated output voltage). This improves effi ciency. The RUN/SS pin is used to place the L T3682 in shutdown, disconnecting the output and reducing the input current to less than 1μA. The switch driver operates from either the input or from the BOOST pin. An external capacitor and the internal boost diode are used to generate a voltage at the BOOST pin that is higher than the input supply. This allows the driver to fully saturate the internal bipolar NPN power switch for effi cient operation. To further optimize effi ciency, the L T3682 automatically switches to Burst Mode operation in light load situations. Between bursts, all circuitry associated with controlling the output switch is shut down, reducing the input supply current to 75μA in a typical application. The oscillator reduces the L T3682’s operating frequency when the voltage at the FB pin is low. This frequency foldback helps to control the output current during startup and overload conditions. Internal circuitry monitors the current fl owing through the catch diode via the DA pin and delays the generation of new switch pulses if this current is too high (above 1.6A nominal). This mechanism also protects the part during short-circuit and overload conditions by keeping the cur- rent through the inductor under control. The L T3682 contains a power good comparator which trips when the FB pin is at 90% of its regulated value. The PG output is an open-collector transistor that is off when the output is in regulation, allowing an external resistor to pull the PG pin high. Power good is valid when the L T3682 is enabled and V IN is above the minimum input voltage. The L T3682 has an overvoltage protection feature which disables switching action when the V IN goes above 39V typical (36V minimum) during transients. When switching is disabled, the L T3682 can safely sustain transient input voltages up to 60V.

Figure 1. Switching Frequency vs. RT Value keep the inductor and capacitor values small.

Frequency T radeoffs section). The minimum input voltage due to duty cycle is: V VV ft VVIN MIN OUT D SW OFF MIN DS W() = + − −+1 where VIN(MIN) is the minimum input voltage, and tOFF(MIN) is the minimum switch off time (210ns). Note that higher switching frequency will increase the minimum input voltage. If a lower dropout voltage is desired, a lower switching frequency should be used. The maximum input voltage for L T3682 applications depends on switching frequency, the Absolute Maximum Ratings of the V IN and BOOST pins, and the operating mode. The L T3682 can operate from continuous input voltages up to 36V. Input voltage transients of up to 60V are also safely withstood. However , note that while V IN>VOVLO (39V typical), the L T3682 will stop switching, allowing the output to fall out of regulation. For a given application where the switching frequency and the output voltage are already fi xed, the maximum input voltage that guarantees optimum output voltage ripple for that application can be found by applying the following expression: V VV ft VVIN MAX D OUT SW ON MIN DS W() = + −+ where VIN(MAX) is the maximum operating input voltage, VOUT is the output voltage, V D is the catch diode drop (~0.5V), VSW is the internal switch drop (~0.5V at max load), fSW is the switching frequency (set by RT), and tON(MIN) is the minimum switch on time (~150ns). Note that a higher switching frequency will reduce the maximum operating input voltage. Conversely, a lower switching frequency will be necessary to achieve optimum operation at high input voltages. Special attention must be paid when the output is in start- up, short-circuit, or other overload conditions. In these cases, the L T3682 tries to bring the output in regulation by driving lots of current into the output load. During these events, the inductor peak current might easily reach and even exceed the maximum current limit of the L T3682, especially in those cases where the switch already operates at minimum on time. The circuitry monitoring the current through the catch diode via the DA pin prevents the switch from turning on again if the inductor valley current is above 1.6A nominal. In these cases, the inductor peak current is therefore the maximum current limit of the L T3682 plus the additional current overshoot during the turn off delay due to minimum on time: IA VV L tLP E A K IN MAX OUTOL ON MIN() ()=+ where IL(PEAK) is the peak inductor current, V IN(MAX) is the maximum expected input voltage, L is the inductor value, t ON(MIN) is the minimum on time and VOUTOL is the output voltage under the overload condition. The part is robust enough to survive prolonged operation under these conditions as long as the peak inductor current does not exceed 3.5A. Inductor current saturation and excessive junction temperature may further limit performance. If the output is in regulation and no short-circuit, startup, or overload events are expected, then input voltage tran- sients of up to V OVLO are acceptable regardless of the switching frequency. In this case, the L T3682 may enter pulse skipping operation where some switching pulses are skipped to maintain output regulation. In this mode the output voltage ripple and inductor current ripple will be higher than in normal operation. Input voltage transients above V OVLO and up to 60V can be tolerated. However , since the part will stop switching during these transients, the output will fall out of regulation and the output capacitor may eventually be completely discharged. This case must be treated then as a start-up condition as soon as V IN returns to values below V OVLO and the part starts switching again. Inductor Selection and Maximum Output Current A good fi rst choice for the inductor value is: LV V fOUT D SW =+()  .1 8

where fSW is the switching frequency in MHz, VOUT is the output voltage, VD is the catch diode drop (~0.5V) and L is the inductor value in μH. The inductor’s RMS current rating must be greater than the maximum load current and its saturation current should be about 30% higher . To keep the effi ciency high, the series resistance (DCR) should be less than 0.1Ω, and the core material should be intended for high frequency applications. Table 1 lists several vendors and suitable types. For robust operation in fault conditions (start-up or short circuit) and high input voltage (>30V), the saturation current should be chosen high enough to ensure that the inductor peak current does not exceed 3.5A. For example, an application running from an input voltage of 36V us- ing a 10μH inductor with a saturation current of 2.5A will tolerate the mentioned fault conditions. The optimum inductor for a given application may differ from the one indicated by this simple design guide. A larger value inductor provides a higher maximum load current and reduces the output voltage ripple. If your load is lower than the maximum load current, then you can relax the value of the inductor and operate with higher ripple current. This allows you to use a physically smaller inductor , or one with a lower DCR resulting in higher effi ciency. Be aware that if the inductance differs from the simple rule above, then the maximum load current will depend on input voltage. In addition, low inductance may result in discontinuous mode operation, which further reduces maximum load current. For details of maximum output current and discontinuous mode operation, see Linear Technology’s Application Note 44. Finally, for duty cycles greater than 50% (V OUT/VIN > 0.5), a minimum inductance is required to avoid sub-harmonic oscillations: LV V fMIN OUT D SW =+()  .12 The current in the inductor is a triangle wave with an av- erage value equal to the load current. The peak inductor and switch current is: II I I SW PEAK L PEAK OUT MAX L () () ( ) == + Δ where IL(PEAK) is the peak inductor current, I OUT(MAX) is the maximum output load current, and ΔIL is the induc- tor ripple current. The L T3682 limits its switch current in order to protect itself and the system from overload faults. Therefore, the maximum output current that the L T3682 will deliver depends on the switch current limit, the inductor value and the input and output voltages. When the switch is off, the potential across the inductor is the output voltage plus the catch diode drop. This gives the peak-to-peak ripple current in the inductor: ΔI DC V V LfL OUT D SW = −+()  ( ) where fSW is the switching frequency of the L T3682, DC is the duty cycle and L is the value of the inductor . To maintain output regulation, the inductor peak current must be less than the L T3682’s switch current limit ILIM. If SYNC pin is grounded ILIM is at least 1.45A at low duty cycles and decreases to 1.1A at DC = 90%. If SYNC pin is tied to 0.8V or more or if it is tied to a clock source for synchronization I LIM is at least 1.18A at low duty cycles and decreases to 0.85A at DC = 90%. The maximum output current is also a function of the chosen inductor value and can be approximated by the following expressions depending on the SYNC pin confi guration: For SYNC pin grounded: II I AD C I OUT MAX LIM LL 2 14 5 1 02 4 2 APPLICATIONS INFORMATION

Table 1. Inductor Vendors equations assume that the inductor current is continuous. bypass the L T3682 and will easily handle the ripple current. switching current into a tight local loop, minimizing EMI. rating. For details see Application Note 88.

Table 2. Capacitor Vendors operating conditions (applied voltage and temperature). electrolytic capacitors can be used for the output capacitor . a Schottky with low reverse leakage. capacitor at audio frequencies, generating audible noise. electrolytic capacitor at the output.

Figure 2. Model for Loop Response

3682 F02

Table 3. Schottky Diodes shows an equivalent circuit for the L T3682 control loop. if the output capacitor has high ESR.

3682 F04

Figure 4. Burst Mode Operation

3682 F03

Figure 3. Transient Load Response of the L T3682. Load Current is Stepped from 300mA to 650mA. pin. See the Synchronization section for more information.

BOOST and BD Pin Considerations Capacitor C3 and the internal boost Schottky diode (see the Block Diagram) are used to generate a boost volt- age that is higher than the input voltage. In most cases a 0.22μF capacitor will work well. Figure 5 shows three ways to arrange the boost circuit. The BOOST pin must be more than 2.3V above the SW pin for best effi ciency. For outputs of between 3V and 8V , the standard circuit (Figure 5a) is best. For outputs between 2.8V and 3V , use a 1μF boost capacitor . A 2.5V output presents a special case because it is marginally adequate to support the boosted drive stage while using the internal boost diode. For reliable BOOST pin operation with 2.5V outputs use a good external Schottky diode (such as the ON Semi MBR0540), and a 1μF boost capacitor (see Figure 5b). For lower output voltages the boost diode can be tied to the input (Figure 5c), or to another supply greater than 2.8V . Keep in mind that a minimum input voltage of 4.3V is required if the voltage at the BD pin is smaller than 3V . Tying BD to V IN reduces the maximum input voltage to 25V . The circuit in Figure 5a is more effi cient because the BOOST pin current and BD pin quiescent current come from a lower voltage source. You must also be sure that the maximum voltage ratings of the BOOST and BD pins are not exceeded. As mentioned, a minimum of 2.5V across the BOOST capacitor is required for proper operation of the internal BOOST circuitry to provide the base current for the power NPN switch. For BD pin voltages higher than 3V , the excess voltage across the BOOST capacitor does not bring an increase in performance but dissipates additional power in the internal BOOST circuitry instead. The BOOST circuitry tolerates reasonable amounts of power , however excessive power dissipation on this circuitry may impair reliability. For reliable operation, use no more than 8V on the BD pin for the circuit in Figure 5a. For higher output voltages, make sure that there is no more than 8V at the BD pin either by connecting it to another available supply higher than 3V or by using a Zener diode between V OUT and BD to maintain the BD pin voltage between 3V and 8V . Figure 5. Three Circuits For Generating The Boost Voltage (5a) For VOUT > 2.8V; VIN(MIN) = 4.3V if VOUT < 3V L T3682VIN VOUT VIN BD GND SW DA BOOST PGND (5b) For 2.5V < VOUT < 2.8V; VIN(MIN) = 4.3V (5c) For VOUT < 2.5V; VIN(MAX) = 25V L T3682VIN VOUT VIN BD GND SW DA BOOST PGND L T3682VIN VOUT VIN BD GND SW DA BOOST PGND

3682 F05

The minimum operating voltage of an L T3682 applica- tion is limited by the minimum input voltage and by the maximum duty cycle as outlined previously. For proper startup, the minimum input voltage is also limited by the boost circuit. If the input voltage is ramped slowly, or the L T3682 is turned on with its RUN/SS pin when the output

3682 F07

Figure 7. To Soft-Start the L T3682, Add a

3682 F06

Figure 6. The Minimum Input Voltage Depends on

pin below 0.3V (this can be ground or a logic output). peaks that are above 0.8V (up to 6V). skip pulses to maintain regulation. reduced when a clock signal is applied to SYNC. Figure 9. Diode D4 Prevents a Shorted Input from Discharging a Backup Battery Tied to the Output. It Also Protects the Circuit from a Reversed Input.

3682 F09

Figure 8. The L T3682 Reduces its Frequency to

3682 F08

protects against a shorted or reversed input.

board, and their connections should be made on that layer . traces will shield them from the SW and BOOST nodes. 100 LFPM airfl ow, this resistance can fall by another 25%. Figure 10. A Good PCB Layout Ensures Proper , Low EMI Operation resistance from junction to ambient.

3682 F10

3682 TA02

0.22μF B150 10μF 536k 102k L 10μH VOUT 0.9A, VIN 6.9V 1A, VIN 12V VIN 6.9V TO 36V TRANSIENT TO 60V 2.2μF 16.2k 40.2k f = 800kHz 470pF BD SW DA FB RUN/SS BOOSTOFFON GND PGND 5V Step-Down Converter

3682 TA03

0.22μF 10μF 316k 102k L 10μH VOUT 3.3V 0.9A, VIN 4.8V 1A, VIN 6.5V VIN 4.8V TO 28.5V TRANSIENT TO 60V 2.2μF 14k 40.2k 470pF BD SW RUN/SS BOOSTOFFON RT PG SYNC DA FB GND PGND B150 f = 800kHz 3.3V Step-Down Converter

3682 TA04

0.22μF 22μF 127k 102k L 6.8μH VOUT 1.8V VIN 3.6V TO 25V 4.7μF 17.4k 71.5k 330pF BD SW RUN/SS BOOSTOFFON RT PG SYNC B140 DA FB GND PGND f = 500kHz 1.8V Step-Down Converter

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However , no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. PACKAGE DESCRIPTION 12-Lead Plastic DFN (3mm × 3mm) (Reference L TC DWG # 05-08-1725 Rev A) 3.00 p0.10 (4 SIDES) NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD AND TIE BARS SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0.40 p 0.10 BOTTOM VIEW—EXPOSED PAD 1.65 p 0.10 0.75 p0.05 R = 0.115 TYP 127 PIN 1 TOP MARK (SEE NOTE 6)

0.200 REF

0.00 – 0.05 (DD12) DFN 0106 REV A RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 0.23 p 0.05 0.25 p 0.05

2.25 REF

2.38 p0.05 1.65 p0.052.10 p0.05 0.70 p0.05 3.50 p0.05 PACKAGE OUTLINE PIN 1 NOTCH R = 0.20 OR 0.25 s 45o CHAMFER 2.38 p0.10

0.45 BSC

Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear .com © LINEAR TECHNOLOGY CORPORATION 2008 LT 1208 • PRINTED IN USA RELATED PARTS PART NUMBER DESCRIPTION COMMENTS L T1766 60V , 1.2A (I OUT), 200kHz, High Effi ciency Step-Down DC/DC Converter VIN = 5.5V to 60V , VOUT(MIN) = 1.2V , IQ = 2.5mA, ISD = 25μA, L T1767 25V , 1.2A (I OUT), 1.2MHz High Effi ciency Step-Down DC/DC Converter VIN = 3V to 25V , VOUT(MIN) = 1.2V , IQ = 1mA, ISD < 6μA, L T1933 500mA (I OUT), 500kHz Step-Down DC/DC Converter V IN = 3.6V to 36V , VOUT(MIN) = 1.2V , IQ = 1.6mA, ISD < 1μA, ThinSOT TM Package L T1936 36V , 1.4A (I OUT), 500kHz High Effi ciency Step-Down DC/DC Converter VIN = 3.6V to 36V , VOUT(MIN) = 1.2V , IQ = 1.9mA, ISD < 1μA, L T1940 Dual 25A, 1.4A (I OUT), 1.1MHz, High Effi ciency Step-Down DC/DC Converter VIN = 3.6V to 25V , VOUT(MIN) = 1.2V , IQ = 3.8mA, ISD < 30μA, L T1976/L T1967 60V , 1.2A (I OUT), 200kHz/500kHz, High Effi ciency Step-Down DC/DC Converters with Burst Mode Operation VIN = 3.3V to 60V , VOUT(MIN) = 1.2V , IQ = 100μA, ISD < 1μA, L T3434/L T3435 60V , 2.4A (I OUT), 200kHz/500kHz, High Effi ciency Step-Down DC/DC Converters with Burst Mode Operation VIN = 3.3V to 60V , VOUT(MIN) = 1.2V , IQ = 100μA, ISD < 1μA, L T3437 60V , 400mA (I OUT), Micropower Step-Down DC/DC Converter with Burst Mode Operation VIN = 3.3V to 60V , VOUT(MIN) = 1.25V , IQ = 100μA, ISD < 1μA, 3mm × 3mm DFN10 and TSSOP16E Packages L T3480 36V with T ransient Protection to 60V , 2A (I OUT), 2.4MHz, High Effi ciency Step-Down DC/DC Converter with Burst Mode Operation VIN = 3.6V to 38V , VOUT(MIN) = 0.78V , IQ = 70μA, ISD < 1μA, 3mm × 3mm DFN10 and MSOP10E Packages L T3481 34V with T ransient Protection to 36V , 2A (I OUT), 2.8MHz, High Effi ciency Step-Down DC/DC Converter with Burst Mode Operation VIN = 3.6V to 34V , VOUT(MIN) = 1.26V , IQ = 50μA, ISD < 1μA, 3mm × 3mm DFN10 and MSOP10E Packages L T3493 36V , 1.4A (I OUT), 750kHz High Effi ciency Step-Down DC/DC Converter VIN = 3.6V to 36V , VOUT(MIN) = 0.8V , IQ = 1.9mA, ISD < 1μA, 2mm × 3mm DFN8 and MSOP8E Packages L T3505 36V with T ransient Protection to 40V , 1.4A (I OUT), 3MHz, High Effi ciency Step-Down DC/DC Converter VIN = 3.6V to 34V , VOUT(MIN) = 0.78V , IQ = 2mA, ISD = 2μA, 3mm × 3mm DFN6 Package L T3508 36V with T ransient Protection to 40V , Dual 1.4A (I OUT), 3MHz, High Effi ciency Step-Down DC/DC Converter VIN = 3.7V to 37V , VOUT(MIN) = 0.8V , IQ = 4.6mA, ISD = 1μA, 4mm × 4mm QFN24 and TSSOP16E Packages L T3684 34V with T ransient Protection to 36V , 2A (I OUT), 2.8MHz, High Effi ciency Step-Down DC/DC Converter VIN = 3.6V to 34V , VOUT(MIN) = 1.26V , IQ = 850mA, ISD < 1μA, 3mm × 3mm DFN10 and MSOP10E Packages L T3685 36V with T ransient Protection to 60V , Dual 2A (I OUT), 2.4MHz, High Effi ciency Step-Down DC/DC Converter VIN = 3.6V to 38V , VOUT(MIN) = 0.78V , IQ = 70mA, ISD < 1μA, 3mm × 3mm DFN10 and MSOP10E Packages ThinSOT is a trademark of Linear Technology Corporation.

3682 TA05

0.22μF 10μF 536k 102k L 4.7μH VOUT 0.9A VIN 10V TO 16.5V TRANSIENT TO 36V 2.2μF 13.3k 9.76k 680pF BD SW RUN/SS BOOSTOFFON RT PG SYNC DA FB GND PGND B140 f = 2MHz 5V , 2MHz Step-Down Converter TYPICAL APPLICATIONS