LDSY

LT1468-2 LINER

Document overview

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Technical content

FEATURES

APPLICATIONS

DESCRIPTION

200MHz, 30V/µs 16-Bit Accurate AV ≥ 2 Op Amp The L T®1468-2 is a precision high speed operational ampli- fi er with 16-bit accuracy, decompensated to be stable in a gain of 2 or greater . The combination of precision and AC performance makes the L T1468-2 the optimum choice for high accuracy applications such as DAC current-to-voltage conversion and ADC buffers. The initial accuracy and drift characteristics of the input offset voltage and inverting input bias current are tailored for inverting applications. The 200MHz gain bandwidth ensures high open-loop gain at frequency for reducing distortion. In noninverting ap- plications such as an ADC buffer , the low distortion and DC accuracy allow full 16-bit AC and DC performance. The high slew rate of the L T1468-2 improves large-signal performance in applications such as active fi lters and instrumentation amplifi ers compared to other precision op amps. The L T1468-2 is specifi ed on power supply voltages of ±5V and ±15V and from –40°C to 85°C. For a unity-gain stable op amp with same DC performance, see the L T1468 datasheet. 16-Bit DAC I-to-V Converter n Stable in Gain AV ≥ 2 (AV = –1) n 200MHz Gain Bandwidth Product n 30V/μs Slew Rate n Settling Time: 800ns (10V Step, 150μV) n Specifi ed at ±5V and ±15V Supplies n Low Distortion, – 96.5dB for 100kHz, 10V P-P n Maximum Input Offset Voltage: 75μV n Maximum Input Offset Voltage Drift: 2μV/°C n Maximum (–) Input Bias Current: 10nA n Minimum DC Gain: 1000V/mV n Minimum Output Swing into 2k: ±12.8V n Input Noise Voltage: 5nV/√ Hz n Input Noise Current: 0.6pA/√ Hz n Total Input Noise Optimized for 1k < R S < 20k n Available in an 8-Lead Plastic SO Package and 8-Lead DFN Package n 16-Bit DAC Current-to-Voltage Converter n Precision Instrumentation n ADC Buffer n Low Distortion Active Filters n High Accuracy Data Acquisition Systems n Photodiode Amplifi ers L, L T , L TC and L TM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Large Signal T ransient, AV = –1 20pF LTC®1597 LT1468-2 16DAC INPUTS OFFSET: VOS + IB (6kΩ) < 1LSB SETTLING TIME TO 150μV = 1.6μs SETTLING LIMITED BY 6k AND 20pF TO COMPENSATE DAC OUTPUT CAPACITANCE V OUT 50pF OPTIONAL NOISE FILTER

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14682 TA02

VS = ±15V AV = –1 RF = RG = 2k CF = 22pF 2V/DIV

(Note 1) ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING * PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE L T1468CS8-2#PBF L T1468CS8-2#TRPBF 14682 8-Lead Plastic Small Outline 0°C to 70°C L T1468IS8-2#PBF L T1468IS8-2#TRPBF 14682 8-Lead Plastic Small Outline –40°C to 85°C L T1468ACDD-2#PBF L T1468ACDD-2#TRPBF LDSY 8-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C L T1468AIDD-2#PBF L T1468AIDD-2#TRPBF LDSY 8-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C L T1468CDD-2#PBF L T1468CDD-2#TRPBF LDSY 8-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C L T1468IDD-2#PBF L T1468IDD-2#TRPBF LDSY 8-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C Consult L TC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container . For more information on lead free part marking, go to: http://www.linear .com/leadfree/ For more information on tape and reel specifi cations, go to: http://www.linear .com/tapeandreel/ SYMBOL PARAMETER CONDITIONS V SUPPL Y MIN TYP MAX UNITS VOS Input Offset Voltage S8 Package ±15V ±5 V 175 μV μV ±5 V 175 μV μV ±5 V 100 150 200 300 μV μV IOS Input Offset Current ±5V to ±15V 13 50 nA ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. VCM = 0V unless otherwise noted. TOP VIEW DD PACKAGE 8-LEAD (3mm × 3mm) PLASTIC DFN 1NULL –IN +IN V DNC* V OUT NULL TJMAX = 150°C, θJA = 43°C/W EXPOSED PAD IS INTERNALL Y CONNECTED TO V– TOP VIEW *DO NOT CONNECT S8 PACKAGE 8-LEAD PLASTIC SO NULL –IN +IN V DNC* V VOUT NULL TJMAX = 150°C, θJA = 190°C/W PIN CONFIGURATION Specifi ed Temperature Range (Note 4) .... –40°C to 85°C Lead Temperature (Soldering, 10 sec)

ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. VCM = 0V unless otherwise noted. SYMBOL PARAMETER CONDITIONS V SUPPL Y MIN TYP MAX UNITS IB– Inverting Input Bias Current ±5V to ±15V 3 ±10 nA IB+ Noninverting Input Bias Current ±5V to ±15V –10 ±40 nA Input Noise Voltage 0.1Hz to 10Hz ±5V to ±15V 0.3 μV P-P en Input Noise Voltage f = 10kHz ±5V to ±15V 5 nV/√ Hz in Input Noise Voltage f = 10kHz ±5V to ±15V 0.6 pA/√ Hz RIN Input Resistance V CM = ±12.5V Differential ±15V ±15V 100 240 150 MΩ kΩ CIN Input Capacitance ±15V 4 pF Input Voltage Range + ±15V ±5V 12.5 2.5 13.5 3.5 V V Input Voltage Range – ±15V ±5V –14.3 –4.3 –12.5 –2.5 V V CMRR Common Mode Rejection Ratio V CM = ±12.5V VCM = ±2.5V ±15V ±5V 110 112 dB dB PSRR Power Supply Rejection Ratio V S = ±4.5V to ±15V 100 112 dB AVOL Large-Signal Voltage Gain V OUT = ±12.5V , RL = 10k VOUT = ±12.5V , RL = 2k VOUT = ±2.5V , RL = 10k VOUT = ±2.5V , RL = 2k ±15V ±15V ±5V ±5V 1000 500 1000 500 9000 5000 6000 3000 V/mV V/mV V/mV V/mV V OUT Output Swing R L = 10k RL = 2k RL = 10k RL = 2k ±15V ±15V ±5 V ±5V ±13.0 ±12.8 ±3.0 ±2.8 ±13.6 ±13.5 ±3.6 ±3.5 V V V V I OUT Output Current V OUT = ±12.5V VOUT = ±2.5V ±15V ±5V ±15 ±15 ±22 ±22 mA mA ISC Short-Circuit Current V OUT = 0V , VIN = ±0.2V ±15V ±25 ±40 mA SR Slew Rate R L = 2k (Note 5) ±15V ±5 V V/μs V/μs Full-Power Bandwidth 10V Peak, (Note 6) 3V Peak, (Note 6) ±15V ±5V 475 1160 kHz kHz GBW Gain Bandwidth f = 100kHz, R L = 2k ±15V ±5V 140 130 200 190 MHz MHz ts Settling Time 10V Step, 0.01%, A V = –1 10V Step, 150μV , AV = –1 5V Step, 0.01%, AV = –1 ±15V ±15V ±5V 650 800 550 ns ns ns R O Output Resistance A V = –1, f = 100kHz ±15V 0.02 Ω IS Supply Current ±15V ±5V 3.9 3.6 5.2 5.0 mA mA The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. 0°C ≤ TA ≤ 70°C, VCM = 0V unless otherwise noted. SYMBOL PARAMETER CONDITIONS V SUPPL Y MIN TYP MAX UNITS VOS Input Offset Voltage S8 Package ±15V ±5 V 150 250 μV μV ±5 V 150 250 μV μV ±5 V 300 400 μV μV

ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. 0°C ≤ TA ≤ 70°C, VCM = 0V unless otherwise noted. SYMBOL PARAMETER CONDITIONS V SUPPL Y MIN TYP MAX UNITS VOS Input Offset Voltage S8 Package ±15V ±5 V 230 330 μV μV ±5 V 230 330 μV μV ±5 V 400 500 μV μV Input VOS Drift (Note 7) ±5V to ±15V ● 0.7 2.5 μV/°C IOS Input Offset Current ±5V to ±15V ● 80 nA Input Offset Current Drift ±5V to ±15V 120 pA/°C IB– Inverting Input Bias Current ±5V to ±15V ● ±30 nA Negative Input Current Drift ±5V to ±15V 80 pA/°C IB+ Noninverting Input Bias Current ±5V to ±15V ● ±60 nA CMRR Common Mode Rejection Ratio V CM = ±12.5V VCM = ±2.5V ±15V ±5V dB dB PSRR Power Supply Rejection Ratio V S = ±4.5V to ±15V ● 96 dB SYMBOL PARAMETER CONDITIONS V SUPPL Y MIN TYP MAX UNITS Input VOS Drift (Note 7) ±5V to ±15V ● 0.7 2.0 μV/°C IOS Input Offset Current ±5V to ±15V ● 65 nA Input Offset Current Drift ±5V to ±15V 60 pA/°C IB– Inverting Input Bias Current ±5V to ±15V ● ±15 nA Negative Input Current Drift ±5 V t o ±15V 40 pA/°C IB+ Noninverting Input Bias Current ±5V to ±15V ● ±50 nA CMRR Common Mode Rejection Ratio V CM = ±12.5V VCM = ±2.5V ±15V ±5V dB dB PSRR Power Supply Rejection Ratio V S = ±4.5V to ±15V ● 98 dB AVOL Large-Signal Voltage Gain V OUT = ±12.5V , RL = 10k VOUT = ±12.5V , RL = 2k VOUT = ±2.5V , RL = 10k VOUT = ±2.5V , RL = 2k ±15V ±15V ±5V ±5V 500 250 500 250 V/mV V/mV V/mV V/mV V OUT Output Swing R L = 10k RL = 2k RL = 10k RL = 2k ±15V ±15V ±5V ±5V ±12.9 ±12.7 ±2.9 ±2.7 V V V V I OUT Output Current V OUT = ±12.5V VOUT = ±2.5V ±15V ±5V ±12.5 ±12.5 mA mA ISC Short-Circuit Current V OUT = 0V , VIN = ±0.2V ±15V ● ±17 mA SR Slew Rate R L = 2k (Note 5) ±15V ±5V V/μs V/μs GBW Gain Bandwidth f = 100kHz, R L = 2k ±15V ±5 V 130 120 200 190 MHz MHz IS Supply Current ±15V ±5V 6.5 6.3 mA mA The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. –40°C ≤ TA ≤ 85°C, VCM = 0V unless otherwise noted.

ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. –40°C ≤ TA ≤ 85°C, VCM = 0V unless otherwise noted. Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The inputs are protected by back-to-back diodes and two 100Ω series resistors. If the differential input voltage exceeds 0.7V , the input current should be limited to 10mA. Input voltages outside the supplies will be clamped by ESD protection devices and input currents should also be limited to 10mA. Note 3: A heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted indefi nitely. Note 4: The L T1468C-2 is guaranteed to meet specifi ed performance from 0°C to 70°C and is designed, characterized and expected to meet these extended temperature limits, but is not tested at – 40°C and at 85°C. The L T1468I-2 is guaranteed to meet the extended temperature limits. Note 5: Slew rate is measured between ±8V on the output with ±12V input for ±15V supplies and ±2V on the output with ±3V input for ±5V supplies. Note 6: Full power bandwidth is calculated from the slew rate measurement: FPBW = SR/2πV P Note 7: This parameter is not 100% tested. SYMBOL PARAMETER CONDITIONS V SUPPL Y MIN TYP MAX UNITS AVOL Large-Signal Voltage Gain V OUT = ±12V , RL = 10k VOUT = ±10V , RL = 2k VOUT = ±2.5V , RL = 10k VOUT = ±2.5V , RL = 2k ±15V ±15V ±5V ±5V 300 150 300 150 V/mV V/mV V/mV V/mV V OUT Output Swing R L = 10k RL = 2k RL = 10k RL = 2k ±15V ±15V ±5V ±5V ±12.8 ±12.6 ±2.8 ±2.6 V V V V I OUT Output Current V OUT = ±12.5V VOUT = ±2.5V ±15V ±5V mA mA ISC Short-Circuit Current V OUT = 0V , VIN = ±0.2V ±15V ● ±12 mA SR Slew Rate R L = 2k (Note 5) ±15V ±5V V/μs V/μs GBW Gain Bandwidth f = 100kHz, R L = 2k ±15V ±5V 110 100 200 190 MHz MHz IS Supply Current ±15V ±5V 7.0 6.8 mA mA TYPICAL PERFORMANCE CHARACTERISTICS Supply Current vs Supply Voltage and Temperature Input Common Mode Range vs Supply Voltage Input Bias Current vs Input Common Mode Voltage SUPPL Y VOL TAGE (±V) SUPPLY CURRENT (mA) 125°C 25°C –55°C 51 01 5 2 0

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SUPPLY VOLTAGE (±V) COMMON MODE RANGE (V)1.0 2.0 –2.0 3 6 91 2

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–1.0 0.5 1.5 –1.5 –0.5 TA = 25°C ΔVOS < 100μV INPUT COMMON MODE VOLTAGE (V) –15 INPUT BIAS CURRENT (nA) –20 0 10

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–40 –60 –80 –10 –5 5 IB– IB+ VS = ±15V TA = 25°C

TYPICAL PERFORMANCE CHARACTERISTICS Input Bias Current vs Temperature Input Noise Spectral Density 0.1Hz to 10Hz Voltage Noise Warm-Up Drift vs Time Open-Loop Gain vs Resistive Load Open-Loop Gain vs Temperature Output Voltage Swing vs Supply Voltage Output Voltage Swing vs Load Current Output Short-Circuit Current vs Temperature TEMPERATURE (°C) –50 IB– IB+ 25 75

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–10 –20 –25 0 50 100 125 –30 –40 INPUT BIAS CURRENT (nA) VS = ±15V FREQUENCY (Hz) INPUT VOLTAGE NOISE (nV/√Hz) INPUT CURRENT NOISE (pA/√Hz) 100 1000 10 100 1k 10k 100k

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0.01 1in en 0.1 VS = ±15V TA = 25°C AV = 101 RS = 100k FOR in TIME (1s/DIV) VOLTAGE NOISE (100nV/DIV)

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VS = ±15V TIME AFTER POWER UP (s) 0 20 40 60 80 100 120 140 –40 OFFSET VOLTAGE DRIFT (μV) –35 –25 –20 –15

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–30 –10 S0-8 ±5V S0-8 ±15V LOAD RESISTANCE (Ω)

110 OPEN-LOOP GAIN (dB)

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TA = 25°C VS = ±15V VS = ±5V TEMPERATURE (°C) –50 130 140 160 25 75

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–25 0 50 100 125 100 150OPEN-LOOP GAIN (dB) RL = 2k VS = ±15V VS = ±5V SUPPLY VOLTAGE (±V) OUTPUT VOLTAGE SWING (V) V

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RL = 2k RL = 10k RL = 2k TA = 25°C RL = 10k OUTPUT CURRENT (mA) –20 V– 0.5 OUTPUT VOLTAGE SWING (V) 1.0 2.0 2.5 V+ –0.5 –2.0 –10 0 5

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1.5 –1.5 –1.0 –2.5 –15 –5 10 15 20 VS = ±15V 85°C 85°C 40°C 25°C 25°C –40°C TEMPERATURE (°C) –50 OUTPUT SHORT-CIRCUIT CURRENT (mA)15 0 50 75

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–25 25 100 125 VS = ±15V VIN = ±0.2V SOURCE SINK

TYPICAL PERFORMANCE CHARACTERISTICS Undistorted Output Swing vs Frequency, VS = ±15V Output Impedance vs Frequency Undistorted Output Swing vs Frequency, VS = ±5V Large-Signal T ransient, AV = –1Small-Signal T ransient, AV = –1 Open-Loop Gain and Phase vs Frequency Gain vs Frequency, A V = –1 FREQUENCY (Hz) GAIN (dB) PHASE (DEG) 10k 1M 10M 100M

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–10 100k –40 –20 –60 100 TA = 25°C AV = –1 RF = RG = 5.1k CF = 5pF RL = 2k PHASE GAIN FREQUENCY (Hz) GAIN (dB)

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CL = 100pF CL = 47pF CL = 22pF NO CL TA = 25°C AV = –1 RF = RG = 2k CF = 6.8pF RL = 500Ω FREQUENCY (Hz) 0.01OUTPUT IMPEDANCE (Ω) 0.1 10k 1M 10M 100M

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0.001 100k 100 VS = ±15V TA = 25°C AV = 100 AV = 10 AV = –1 FREQUENCY (kHz) OUTPUT VOL TAGE SWING (VP-P)

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VS = ±15V TA = 25°C RL = 2k THD<1% AV = –1 FREQUENCY (kHz) OUTPUT VOL TAGE SWING (VP-P)

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VS = ±5V TA = 25°C RL = 2k THD<1% AV = –1 50ns/DIV

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VS = ±15V 20mV/DIV 200ns/DIV

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VS = ±15V AV = –1 RF = RG = 2k CL = 22pF2V/DIV 10V Settling Time vs Output Step SETTLING TIME (ns) OUTPUT STEP (V) –10 400 800200 600

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VS = ±15V TA = 25°C RF = RG = 2.5k RL = 5k CF = 8pF AV = –1 0.1% 0.01% 150μV 0.01% 0.1% 150μV Settling Time vs Output Step SETTLING TIME (ns) OUTPUT STEP (V) –10 400 800200 600

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VS = ±15V TA = 25°C RF = RG = 1k RL = 5k INTO DIODES CF = 22pF AV = 2 RL = 511Ω/30pF 0.01% 0.01%

The L T1468-2 may be inserted directly into many operational amplifi er applications improving both DC and AC perfor- mance, provided that the nulling circuitry is removed. The suggested nulling circuit for the L T1468-2 is shown below. Offset Nulling LT1468-2 100k 2.2μF0.1μF 2.2μF0.1μF 7 6

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and minimize leakage (i.e., 1.5GΩ of leakage between an input and a 15V supply will generate 10nA—equal to the maximum I B– specifi cation.) Board leakage can be minimized by encircling the input circuitry with a guard ring operated at a potential close to that of the inputs. For inverting confi gurations tie the ring to ground, in noninverting connections tie the ring to the inverting input (note the input capacitance will increase which may require a compensating capacitor as discussed below.) Microvolt level error voltages can also be generated in the external circuitry. Thermocouple effects caused by temperature gradients across dissimilar metals at the contacts to the inputs can exceed the inherent drift of the amplifi er . Air currents over device leads should be minimized, package leads should be short, and the two input leads should be as close together as possible and maintained at the same temperature. Make no connection to Pin 8. This pin is used for factory trim of the inverting input current. The parallel combination of the feedback resistor and gain setting resistor on the inverting input can combine with the input capacitance to form a pole that can cause peaking or even oscillations. A feedback capacitor of the value: C F = (RG)(CIN/RF) may be used to cancel the input pole and optimize dynamic performance. For applications where the DC noise gain is one, and a large feedback resistor is used, C F should be less than or equal to one half of C IN. An example would be a DAC I-to-V converter as shown on the front page of this data sheet where the DAC can have many tens of pF of output capacitance. Gain of 2 Stable The L T1468-2 is a decompensated version of the L T1468. The precision DC performance is identical, but the internal compensation capacitors have been reduced to a point where the op amp needs a gain of 2 or greater in order to be stable. In general, for applications where the gain around the op amp is ≥ 2, the decompensated version should be used, because it will give the best AC performance. In applica- tions where the gain is < 2, the unity-gain stable version should be used. The appropriate way to defi ne the ‘gain’ is as the inverse of the feedback ratio from output to differential input, including all relevant parasitics. Moreover , as with all feedback loops, the stability of the loop depends on the value of that feedback ratio at frequencies where the total loop-gain would cross unity. Therefore, it is possible to have circuits in which the gain at DC is lower than the gain at high frequency, and these circuits can be stable even with a non unity-gain stable op amp. An example is many current-output DAC buffer applications. Layout and Passive Components The L T1468 requires attention to detail in board layout in order to maximize DC and AC performance. For best AC results (for example fast settling time) use a ground plane, short lead lengths, and RF-quality bypass capacitors (0.01μF to 0.1μF) in parallel with low ESR bypass capaci- tors (1μF to 10μF tantalum). For best DC performance, use “star” grounding techniques, equalize input trace lengths Nulling Input Capacitance LT1468-2

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Each input of the L T1468-2 is protected with a 100Ω series resistor and back-to-back diodes across the bases of the input devices. If the inputs can be pulled apart, the input current should be limited to less than 10mA with an external series resistor . Each input also has two ESD clamp diodes—one to each supply. If an input is driven above the supply, limit the current with an external resistor to less than 10mA. The L T1468-2 employs bias current cancellation at the in- puts. The inverting input current is trimmed at zero common mode voltage to minimize errors in inverting applications such as I-to-V converters. The noninverting input current is not trimmed and has a wider variation and therefore a larger maximum value. As the input offset current can be greater than either input current, the use of balanced source resistance is NOT recommended as it actually degrades DC accuracy and also increases noise. The input bias currents vary with common mode voltage as shown in the Typical Performance Characteristics. The cancellation circuitry was not designed to track this common mode voltage because the settling time would have been adversely affected. The L T1468 inputs can be driven to the negative supply and to within 0.5V of the positive supply without phase reversal. As the input moves closer than 0.5V to the posi- tive supply, the output reverses phase. Total Input Noise The curve of Total Noise vs Unmatched Source Resistance in the Typical Performance Characteristics shows that with source resistance below 1k, the voltage noise of the amplifi er dominates. In the 1k to 20k region the increase in noise is due to the source resistance. Above 20k the input current noise component is larger than the resistor noise. Input Stage Protection 100Ω 100Ω +IN –IN

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Q6Q1 –IN+IN Q5Q2 Q4 CBIASQ3

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However , no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. PACKAGE DESCRIPTION 8-Lead Plastic Small Outline (Narrow 0.150) (L TC DWG # 05-08-1610) .016 – .050 (0.406 – 1.270) .010 – .020 0°– 8 ° TYP .008 – .010 (0.203 – 0.254) SO8 0303 .053 – .069 (1.346 – 1.752) .014 – .019 (0.355 – 0.483) TYP .004 – .010 (0.101 – 0.254) .050 (1.270) BSC 1 2 3 4 .150 – .157 (3.810 – 3.988) NOTE 3 8 7 6 5 .189 – .197 (4.801 – 5.004) NOTE 3 .228 – .244 (5.791 – 6.197) .245 MIN .160 ±.005 RECOMMENDED SOLDER PAD LAYOUT .045 ±.005 .050 BSC .030 ±.005 TYP INCHES (MILLIMETERS) NOTE: 1. DIMENSIONS IN 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) 8-Lead (3mm × 3mm) Plastic DFN (L TC DWG # 05-08-1210) D8 0801 .290 (7.366) TYP .520 (13.208) MAX.005 (0.127) MIN PIN NO. 1 IDENT .008 – .015 (0.203 – 0.381) .300 (7.620) REF .485 (12.319) MAX .100 (2.54) BSC .125 (3.175) MIN .020 – .060 (0.508 – 1.524) .165 (4.191) MAX .015 – .023 (0.381 – 0.584) .054 (1.372) TYP

Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear .com © LINEAR TECHNOLOGY CORPORATION 2008 LT 0808 • PRINTED IN USA RELATED PARTS TYPICAL APPLICATION 16-Bit ADC Buffer PART NUMBER DESCRIPTION COMMENTS L T1167 Precision Instrumentation Amplifi er Single Resistor Gain Set, 0.04% Max Gain Error , 10ppm Max Gain Nonlinearity L T1468 Single 200MHz, 30V/μs, 16-Bit Accurate A V ≥ 2 Op Amp 75μV V OS(MAX) L T1468-2 Single 90MHz, 22V/μs, 16-Bit Accurate Op Amp 75μV V OS(MAX) L T1469 Dual 200MHz, 30V/μs, 16-Bit Accurate A V ≥ 2 Op Amp 75μV V OS(MAX) L T1469-2 Dual 90MHz, 22V/μs, 16-Bit Accurate Op Amp 75μV V OS(MAX) L TC1595/L TC1596 16-Bit Serial Multiplying IOUT DACs ±1LSB Max INL/DNL, Low Glitch, DAC8043 16-Bit Upgrade L TC1597 16-Bit Parallel Multiplying I OUT DAC ±1LSB Max INL/DNL, Low Glitch, On-Chip Bipolar Resistors L TC1604 16-Bit, 333ksps Sampling ADC ± 2.5V Input, SINAD = 90dB, THD = –100dB L TC1605 Single 5V , 16-Bit, 100ksps Sampling ADC Low Power , ±10V Inputs, Parallel/Byte Interface LT1468-2

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200Ω 33.2k 22pF 1000pFVIN 2.2μF LTC1605 CAP

16 BITS