L4964

High current switching regulator

Document overview

• Manufacturer or author: STMICROELECTRONICS
• PDF pages: 13

Technical content

HIGH CURRENT SWITCHING REGULATOR .4 A OUTPUT CURRENT .5.1 V TO 28 V OUTPUT VOLTAGE RANGE .0 TO 100 % DUTY CYCLE RANGE .PRECISE (± 3 %) ON-CHIP REFERENCE .SWITCHING FREQUENCY UP TO 120 KHz .VERY HIGH EFFICIENCY (UP TO 90 %) .VERY FEW EXTERNAL COMPONENTS .SOFT START .RESET OUTPUT .CURRENT LIMITING .INPUT FOR REMOTE INHIBIT AND SYN- CHRONUS PWM .THERMAL SHUTDOWN

DESCRIPTION

The L4964 is a stepdown power switching regulator delivering 4A at a voltage variable from 5.1V to 28V. Features of the device include overload protection, soft start, remote inhibit, thermal protection, a reset output for microprocessors and a PWM comparator input for synchronization in multichip configurations. The L4964 is mounted in a 15-lead Multiwatt plas- tic power package and requires very few external components. Efficient operation at switching frequencies up to 120kHz allows a reduction in the size and cost of ex- ternal filter components. MULTIWATT15 Vertical (Plastic Package) ORDERING NUMBER : L4964 MULTIWATT15 Horizontal (Plastic Package) ORDERING NUMBER : L4964HT Pins 1, 4, 15 must not be connected. Leave open circuit. PIN CONNECTION (top view)

N ° Name Function 1 N.C. Must not be connected. Leave open circuit. 2 Output Regulator Output. 3 Supply Voltage Unregulated Voltage Input. An internal regulator powers the L4964’s internal logic. 4 N.C. Must not be connected. Leave open circuit. 5 Soft Start Soft Start Time Constant. A capacitor is connected between this terminal and ground to define the soft start time constant. This capacitor also determines the average short circuit output current. 6 Inhibit Input TTL - Level Remote Inhibit. A logic high level on this input disables the L4964.

7 Sync Input Multiple L4964’s are synchronized by connecting the pin 7 inputs together and omitting

the oscillator RC network on all but one device. 8 Ground Common Ground Terminal.

9 Frequency

A series RC network connected between this terminal and ground determines the regulation loop gain characteristics.

10 Feedback

The Feedback Terminal of the Regulation Loop. The output is connected directly to this terminal for 5.1 V operation ; it is connected via a divider for higher voltages. 11 Oscillator A parallel RC network connected to this terminal determines the switching frequency. The pin must be connected to pin 7 input when the internal oscillator is used. 12 Reset Input Input of the Reset Circuit. The threshold is roughly 5 V. It may be connected to the beedback point or via a divider to the input.

13 Reset Delay A capacitor connected between this terminal and ground determines the reset signal

delay time. 14 Reset Output Open Collector Reset Signal Output. This output is high when the supply is safe. 15 N.C. Must not be connected. Leave open circuit. BLOCK DIAGRAM L4964

CIRCUIT OPERATION (refer to the block diagram) The L4964 is a monolithic stepdown switching regu- lator providing output voltages from 5.1 V to 28 V and delivering 4A. The regulation loop consists of a sawtooth oscillator, error amplifier, comparator and the output stage. An error signal is produced by comparing the output voltage with a precise 5.1 V on-chip reference (zener zap trimmed to ± 3 %). This error signal is then compared with the sawtooth signal to generate the fixed frequency pulse width modulated pulses which drive the output stage. The gain and fre- quency stability of the loop can be ajusted by an ex- ternal RC network connected to pin 9. Closing the loop directly gives an output voltage of 5.1 V. Higher voltages are obtained by inserting a voltage divider. Output overcurrents at switch on are prevented by the soft start function. The error amplifier output is initially clamped by the external capacitor C ss and al- lowed to rise, linearly, as this capacitor is charged by a constant current source. Output overload protection is provided in the form of a current limiter. The load current is sensed by an internal metal resistor connected to a comparator. When the load current exceeds a preset threshold this comparator sets a flip flop which disables the output stage and discharges the soft start capacitor. A second comparator resets the flip flop when the voltage across the soft start capacitor has fallen to 0.4 V. The output stage is thus re-enable and the output voltage rises under contro of the soft start net- work. If the overload condition is still present the limiter will trigger again when the thershold current is reached. The average short circuit current is lim- ited to a safe value by the dead time introduced by the soft start network. The reset circuit generates an output signal when the supply voltage exceeds a threshold pro- grammed by an external divider. The reset signal is generated with a delay time programmed by an ex- ternal capacitor. When the supply falls below the threshold the reset output goes low immediately. The reset output is an open collector. A TTL - level input is provided for applications such as remote on/off control. This input is activated by high level and disables circuit operation. After an in- hibit the L4964 restarts under control of the soft start network. The thermal overload circuit disables circuit opera- tion when the junction temperature reaches about 150 and has hysteresis to prevent unstable condi- tions. Figure 1 : Reset Output Waveforms L4964

ELECTRICAL CHARACTERISTICS

(refer to the test circuits Tj = 25oC, Vi = 25V, unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Unit Fig. DYNAMIC CHARACTERISTICS (pin 6 to GND unless otherwise specified) Vo Output Voltage Range V i = 36V, Io = 1A V ref 2 8V4 Vi Input Voltage Range V o = Vref to 28V, Io = 3A 9 36 V 4 ΔVo Line Regulation V i = 10V to 30V, Vo = Vref, Io = 2A 15 70 mV 4 ΔVo Load Regulation I o = 1A to 2A Io = 0.5A to 3A, Vo = Vref mV mV V ref Internal Reference Voltage (Pin 10) Vi = 9V to 36V, Io = 2A 4.95 5.1 5.25 V 4 ΔVref ΔT Average Temperature Coefficient of Reference Voltage Tj = 0°C to 125°C, Io = 2A 0.4 mV/ °C Vd Dropout Voltage between Pin 2 and Pin 3 Io = 3A Io = 2A 1.5 3.2 2.4 V V Iom Maximum Operating Load Current VI = 9V to 36V, Vo = Vref to 28V 4 A 4 I2L Current Limiting Threshold (Pin 2) Vi = 9V to 36V, Vo = Vref to 28V 4.5 8 A 4 ISH Input Average Current V i = 36V, Output Short-circuited 80 140 mA 4 η Efficiency I o = 3A V o = Vref Vo = 12V SVR Supply Voltage Ripple Rejection ΔVI = 2Vrms, fripple = 100Hz Vo = Vref, Io = 2A 46 56 – dB 4 f Switching Frequency 40 50 60 kHz 4 Δf ΔVi Voltage Stability of Switching Frequency Vi = 9V to 36V 0.5 % 4 Δf ΔTj Temperature Stability of Switching Frequency Tj = 0°C to 125°C1 % 4 fmax Maximum Operating Switching Frequency Vo = Vref, Io = 1A 120 kHz – Tsd Thermal Shutdown Junction Temperature 135 145 °C– DC CHARACTERISTICS I3Q Quiescent Drain Current V i = 36V, V7 = 0V, S1 : B, S2 : B V6 = 0V V6 = 3V 100 mA 6a –I2L Output Leakage Current V i = 36V, V6 = 3 V, V7 = 0V S1 : B, S2 : A 2m A 6 a SOFT START I5so Source Current V 6 = 0V, V5 = 3V 80 130 180 µA6 b I5si Sink Current V 6 = 3V, V5 = 3V 40 70 140 µA6 b INHIBIT V6L Low Input Voltage V i = 9V to 36V, V7 = 0V S1 : B, S2 : B - 0.3 0.8 V 6a V6H High Input Voltage 2 5.5 V 6a – I6L –I6H Input Current with Input Voltage Low Level High Level Vi = 9V to 36V, V7 = 0V S1 : B, S2 : B V6 = 0.8V V6 = 2V µA6 a ERROR AMPLIFIER V9H High Level Output Voltage V 10 = 4.7V, I9 = 100µA, S1 : A, S2 : A

3.4 V 6c

V9L Low Level Output Voltage V 10 = 5.3V, I9 = 100µA, S1 : A, S2 : E

0.6 V 6c

I9 si Sink Output Current V 10 = 5.3V, S1 : A, S2 : B 100 150 µA6 c –I9 so Source Output Current V 10 = 4.7V, S1 : A, S2 : D 100 150 µA6 c L4964

ELECTRICAL CHARACTERISTICS (continued) (refer to the test circuits Tj = 25oC, Vi = 25V, unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Unit Fig. ERROR AMPLIFIER (continued) I10 Input Bias Current V 10 = 5.2V, S1 : B 2 20 µA6 c G v DC Open Loop Gain V 9 = 1V to 3V, S1 : A, S2 : C 40 55 dB 6c OSCILLATOR AND PWM COMPARATOR –I7 Input Bias Current of PWM Comparator V7 = 0.5V to 3.5V 10 µA6 a –I11 Oscillator Source Current V11 = 2V, S1 : A, S2 : B 4 – mA 6a RESET V12R Rising Threshold Voltage Vi = 9 V to 36 V, S1 : B, S2 : B Vref - 150mV Vref - 100mV Vref - 50mV V6 d V12F Falling Threshold Voltage 4.75 V ref - 150mV Vref - 100mV V6 d V13D Delay Threshold Voltage V12 = 5.3 V, S1 : A, S2 : B 4.3 4.5 4.7 V 6d V13H Delay Threshold Voltage Hysteresis 100 mV 6d V14S Output Saturation Volt. I14 = 5mA, V12 = 4.7V - S1, S2 : B 0.4 V 6d I12 Input Bias Current V 12 = 0V to Vref, S1 : B, S2 : B 1 10 µA6 d –I13 so I13 si Delay Source Current Delay Sink Current V13 = 3V, S1 : A, S2 : B V12 = 5.3V V12 = 4.7V 110 150 µA mA I14 Output Leakage Current Vi = 36V, V12 = 5.3V, S1 : B, S2 : A 100 µA6 d C7, C8 : EKR (ROE) L1 : L = 300 µH at 8 A R = 500 mΩ Core type : MAGNETICS 58930 - A2 MPP N° turns : 43 Wire Gauge : 1 mm (18 AWG) Figure 4 : Dynamic Test Circuit L4964

Figure 5 : PC. Board and Component Layout of the Circuit of Fig. 4 (1:1 scale) L4964

Multiwatt15 H (Short Leads) A CB E L1L2 F G S Diam 1 MW15HME V V V V V N R1 P R R DIM. mm inch A 5 0.197 B 2.65 0.104 C 1.6 0.063 E 0.49 0.55 0.019 0.022 F 0.66 0.75 0.026 0.030 H1 19.6 20.2 0.772 0.795 H2 19.6 20.2 0.772 0.795 L7 2.65 2.9 0.104 0.114 R 1.5 0.059 S 1.9 2.6 0.075 0.102 S1 1.9 2.6 0.075 0.102 Dia1 3.65 3.85 0.144 0.152 OUTLINE AND MECHANICAL DATA MUL15V.TBL L4964

DIM. mm inch A 5 0.197 B 2.65 0.104 C 1.6 0.063 D 1 0.039 E 0.49 0.55 0.019 0.022 F 0.66 0.75 0.026 0.030 H1 19.6 0.772 H2 20.2 0.795 L2 17.65 18.1 0.695 0.713 L7 2.65 2.9 0.104 0.114 S 1.9 2.6 0.075 0.102 S1 1.9 2.6 0.075 0.102 Dia1 3.65 3.85 0.144 0.152 OUTLINE AND MECHANICAL DATA MUL15H.TBL L4964

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