Overview
ICS91305I is listed in the Driver IC category. Available datasheets include documents from Renesas Technology Corp.
Summary
HIGH PERFORMANCE COMMUNICATION BUFFER Zero input - output delay
Description
The ICS91305I is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in communication systems operating at speeds from 10 to 133 MHz.
Source title
ICS91305I Datasheet(PDF) - Integrated Device Technology