HD7407 HITACHI
Document overview
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Technical content
PERFORMANCE (per gate) HMAIN CHARACTERISTICS(Ta——20-~+75°C) Performance HDVT4 Series |HD745 Series Series HD?4 Series HD74S Series bee hee ns ns Parameter | min, max, min, | max - . sane Vi (Pow max) ov | O.5V Drecieation 10-mW 20 mit! “Vout —000A) | RAV [aw fT Speed-Power | Va 0.8 : 0.8V Product Wind 60p Vw av - 2 | th = l6ma | — | —2mA Fig(¥iw min) = a i WSELECTION GUIDE @NAND,/NOR/AND/OR GATES Function HD?4Series HDS Series Quad, 2-input Positive NAND Gates woe OO - Quad, 2-input Positive WAND Gates (with Open Collector Qutput) ol - | - Quad, Z-input Positive NOR Gates | oz o2 Quad. Positive NAND Gates (with Open Collector Qutpat) | og” 03 ~ Hex Inverters _ Od _ Me Hex Inverters (with Open Collector Output] | 05 = 05 -- Hex Inverter Buffers/Drivers iwith Open Collector High-voltage Chtpat} | 06 = Hex Buffers/Drivers iwith Open Cotlector High-valtage Output) \\ oT 2 | Quad. 2-input Positive AND Gates OB = Quad. 2-input Positive AND Gates (with Open Collector Output} 0g | = Triple S-input Positive NAND Gates — a | 10- | 10 - Triple 3-input Positive AND Gates | - | ay Triple 3-input Positive NAND Gates iwith Open Collector Output) | 1 12 Dal 4-input Schmitt NANT Gates | 13° Hex Sehmitt-trigger Inverters 14 - . Triple J-input Positive AND Gates (with Open Collector Output) T = 1b Hex Inverter Bulfers/Drivers {with Open Collector High-voltage Output) | 16. Hex Buffers/Drivers (with Open Collector High-voltage Qutput) VW - Dual 4-inpat Positive NAND Gates 0 20 - Dual 4-inpot Positive NAND Gates (with Open Collector Output} Be L_ av Expandable Dual 4-input Positive NOR Gates (with Strobe) | “23° | - Dual 4-input Positive NOR Gates | 25 ~ | - Quad. 2-input High-veltage Interface MAND Gates | 26 | - Triple d-input Positive NOR Gates | a? | S&input Positive NAND Gave a | [| ee Quad. 2-input Positive OR Gates | 32 - - Quad, 2-input Positive NAND Buffers | F. - Quad. 2-input Positive NAND Buffers (with Opea Collector Output) | Be Dual 4-input Positive NAND Buffers | 40-7 rr Quad. Bus Buffer Gates with d-state Output (Inverting!) ' 12h -" - “Quad. Bus Buffer Gates with 3-state Output (Noninverting) : i = 7 Quad. 2-input Powitive NAND Schmite Triggers 132 - 13-input Positive NAND Gate - hs 12-input Positive NAND Gate (with d-state Out.) 1H Dual 4-input Positive NAND Line Drivers i — 140 “ (to be continued) 268 @ HITACHI
@AND-OR-INVERT GATES Funetion HD?4 Series HDTMS Series Expandable Qual 2-wide 2-input AND-OR-INVERT Gates 50 > = Dual 2-wide 2-input AND-OR-INVERT Gates SL - Expandable 4-wide 2-input AND-OR-INVERT Gate 53 - 4-wide 2-input AND-OR-INVERT Gate | 54 - 4-2-3-2input AND-OR-INVERT Gate - ae 4-2-3-2-input AND-OR-INVERT Gate (with Open Collector Output) - ed EXPANDER Function HDT4 Series | HDM4S Series Dual 4-inpat Expanders ab | _ FLIP FLOPS rl rll Funetion HDT Series HDS Series J-K Master-Flip Flop (AND Inputs) 72 = Dual J-K Flip Flops \\ 3° - Dual D-type Edge-triggered Elip Flaps | mo mM! Dual J-K Flip Flops (with PR and CLR) i Te - “Dual J-K Flip Flops OO re ne = Dual J-K Negative-edge-triggered Flip Flops (with PR and CLR) | - ug — Twal J-K Negative-edge-triggered Flip Flops (with PR - | Mg a Dual JeK Negative-edge-triggered Flip Flops {with PR, Common CLR. and Common CK) = id Monostable Multivibrator ne = ~ Thal Retriggerable Monostable Multivibrators wo — Hex D-type Flip Flops (with CLR} 174° ; ie Quad. D-type Flip Flops {with CLR} 175 175. Dual Monostable Multivibrators {with Schmitt Trigger | 221 - «COUNTERS Funetion HDi4 Series | HDT4S Series . Decade Counter oA = - Divide-by-Twelve Counter 924 - 4-bit Binary Counter 3A - Presettable Decade Counter,‘Latch | 176 | = A-bit Binary Counter/Lateh WT | Syachronous Decade Counter — — a —T 160 — a Synchronous 4-bit Binary Counter | 161 \\ - Fully Synchronous Decade Counter 162 | - Fully Synchronous 4-bit Binary Counter | 163. - - Synchronous Decade Decimal Hate Multiplier 167 - Synchronous Decade Up/Down Counter 190 - Synchronous 4-bit Binary Up/Down Counter — tT 191 rr Synchronous Derade Up/Down Counter ie “| - Syochronous 4-bit Binary Up/Down Counter | 9307 _ Decade Counter | mo" | - d-bit Binary Counter | aa | = to be continaed | @ HITACHI 269
e4-BiT, 5-BIT SHIFT/STORAGE REGISTERS Function I HD4 Series | _HDTM45 Series 4-bit Right-shift, Left-sbilt Register | 54 i - S-bit Shift Register (Dual Parallel-in, Parallel-out } 96 - 4-bit D-type Register (with d-state Output) 113° _ 4-bit Parallel-in, Parallel-out Bidirectional Shift Register 194.7 - d-bit Parallel-in, Parallel-out Shift Register (J-K Inputs for First Stage} 195 =" | #8-BIT SHIFT REGISTERS Function HDi4 Series HDT45 Series &-bit Shift Register | fA _- B-bit Parallel-out Shift Register i ee | — Parallel-load &-bit Shift Register i 166 | — 8-bit Parallel-in, Parallel-out Bidirectional Shift Register { 198 . i 8-bit Parallelin, Parallel-out Shift Register (J-K Inputs for Firat Stage) | 199 # ENCODERS Function HD?d Series HDTMdS Series 10-line-to-d-line Priority Encoder a7 - &-line-to-3-line Priority Eneoder 148 _ ®DECODERS,/DEMULTIPLEXERS Funetion | Hb?4 Series HD?45 Series BCD-to-Decimal Decoder Qa - Exeess 3-to-Decimal Decoder | 4A - | = Exeess 4-Gray-te-Decimal Decoder WA” | - d-line-to-16-line Decoder/Demultiplexer | 154" i - Dual 2-line-to-d-line Decoders/Demultiplexers 185° 7 Dual 2-line-to-d-line Decoders/Temultiplexers (with Open Collector Output} 156 d-line-to-16-line Decoder/Demultiplexer (with Open Collector Output} 189 = @DECODERS/LAMP DAIVERS/BUFFERS Function HD?4 Series HDS Series BCD-to-Decimal Decoder/Drivers with MV Out, 1 f 45 | — BCE-o-Decimal Decoder/Driver (with 15V Cut, ) M5 - BCIMo-Seven Segment Decoder/Driver (with 30V Gutpur) 46A _— BCD+to-Seven Segment Decoder/Driver (with 15V Output] 47a BCD-to-Decimal Decoder/Driver (with BV Out. | M41 = @LATCHES Function HD?d Series HDS Series Quad, Bistable Latches OT = Quad, 5-R Latches am — ®RANDOM ACCESS MEMORIES (less than 256-bit} Function HD¥4 Series Hb45 Series 64-bit Random Access Memory (16w by 4b) | = ° {to be continued) 270 @HITACHI
@ ARITHMETIC ELEMENTS eaet"r'r'rF'_ —umm TT Function HD74 Series HD74S Series 4-bit Binary Full Adder 83A { - 4-bit Magnitude Comparator 85 - Quad. 2-input Exclusive-OR Gates | 86 86 Quad. Exclusive-OR/NOR Gates | _ 135 Quad. 2-input Exclusive-OR Gates (with Open Collector Output) —o _ 136 i = _ 8-bit Odd/Even Parity Generator/Checker | 180 -~ _ 4-bit Arithmetic Logic Unit/Function Generator _ | 181 Look-Ahead Carry Generator (for ALU) 182 182 Dual Carry Save Full Adders ee ee Hs 9-bit Odd/Even Parity Generator/Checker _ | 280 ~ 4-bit Binary Full Adder (with Fast Carry) i 283 —-~ _ @DATA SELECTORS/MULTIPLEXERS Function HD74 Series HD74S Series 16-bit Data Selector/Multiplexer 150 --" - 8-bit Data Selector/Multiplexer (with Strobe) 15tA ~ 151 — 8-bit Data Selector/Multiplexer - - Dual 4-line-to-1-line Data Selectors/Multiplexers 153 - | - Quad, 2-line-to-1-line Data Selectors/Multiplexers ; wr Quad. 2-line-to-1-line Data Selectors/Multiplexers _ 158 8-bit Data Selector/Multiplexer (with Stobe and 3-state Output) 251 251° Quad. 2-line-to-l-line Data Selectors/Multiplexers (with 3-state Output) _ 257/ Quad, 2-line-to-1-line Data Selectors/Multiplexers (with 3-state Output) i - | 258 WMOUTLINE [pp-16 DP-20 {pp-24 |
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