HD26LS31

HD26LS31 RENESAS

Document overview

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• PDF pages: 12

Technical content

Features

• Ordering Information Part Name Package Type Package Code Package Abbreviation Taping Abbreviation (Quantity) HD26LS31P DILP-16 pin DP-16E, -16FV P — Logic Diagram Enable G Enable G

Rev.2.00, Jul.16.2004, page 2 of 11 Pin Arrangement (Top view) GND Enable G

16 VCC

H : High level L : Low level X : Irrelevant Z : High impedance (Off) Absolute Maximum Ratings Item Symbol Ratings Unit Supply Voltage V CC 7.0 V Input Voltage V IN 7.0 V Output Voltage V OUT 5.5 V Power Dissipation P T 1W Storage Temperature Range Topr 0 to +70 °C Lead Temperature Range Tstg –65 to +150 °C Note: 1. The absolute maximum ratings are values which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Recommended Operating Conditions Item Symbol Min Typ Max Unit Application Terminal Supply Voltage V CC 4.75 5.0 5.25 V V CC Output Current I OH — — –40 mA All Output Output Current I OL ——4 0m A A l l O u t p u t Operating Temperature Topr 0 25 70 — —

Rev.2.00, Jul.16.2004, page 3 of 11 Electrical Characteristics (Ta = 0 to +70°C) Item Symbol Min Typ *1 Max Unit Application Terminal Conditions Input Voltage V IH 2.0 — — V All Inputs VIL ——0 . 8 Input Clamp Voltage V IK — — –1.5 V CC = 4.75 V, II = –18 mA Output Voltage V OH 2.5 — — All Outputs V CC = 4.75 V I OH = –20 mA VOH ——2 . 4 I OH = –40 mA VOL ——0 . 5 I OL = 40 mA Output Current I OZL — — –20 mA V CC = 5.25 V V O = 0.5 V IOZH ——2 0 V CC = 5.25 V V O = 2.5 V Input Current I I — — 0.1 mA All Inputs V CC = 5.25 V V I = 7 V IIH ——2 0µ A V I = 2.7 V IIL — — –0.36 mA V I = 0.4 V Short Circuit Output Current I OS*2 –30 — –150 All Outputs V CC = 5.25 V Supply Current I CC —3 28 0 V CC VCC = 5.25 V Notes: 1. All typical values are at V CC = 5 V, Ta = 25°C 2. Not more than one output should be shorted at a time and duration of the short circuit should not exceed one second. Switching Characteristics (VCC = 5 V, Ta = 25°C) Item Symbol Min Typ Max Unit Application terminal Test circuit Conditions Propagation Delay Time t PLH — 14 20 ns All Outputs 1 CL = 30 pF tPHL —1 42 0n s Output Enable Time t ZH —2 54 0n s 2 C L = 30 pF, RL = 75 Ω tZL —3 74 5n s 3 C L = 30 pF, RL = 180 Ω Output Disable Time t HZ —2 13 0n s 2 C L = 10 pF tLZ —2 33 5n s 3 C L = 10 pF Complementary Output To Output S k e w — 16n s 1 C L = 30 pF

Rev.2.00, Jul.16.2004, page 4 of 11 Test Circuit 1 Output Output A Z Y Pulse Generator PRR = 1MHz Duty Cycle 50% Zout = 50Ω Input G G 4.5 V C = 30 pF L C = 30 pF L Note: 1. C L includes probe and jig capacitance. Waveforms Input 0.3 V 2.7 V 1.3 V 0 V 3 V 1.3 V Output Y OH VOL V tPHL tPLH tPHL 1.5 V 1.5 V 1.5 V 1.5 V VOH VOL Output Z 2.7 V 0.3 V tr tf Skew tPLH Skew

Rev.2.00, Jul.16.2004, page 5 of 11 Test Circuit 2 VCC G A Y Z Pulse Generator PRR = 1 MHz Duty Cycle 50% Zout = 50Ω G Input

4.5 V Output

Output 180 Ω 180 Ω 75 Ω CL 75 ΩCL Note: 1. C L includes probe and jig capacitance. Waveforms Enable G 0.3 V 2.7 V 1.5 V 2.7 V 0 V 3 V 1.5 V 0.3 V Enable G Output tZH OHV 1.5 V tHZ 0.5 V S1 Open S1 : Closed 0 V 1.5 V tr tf S1 : Open

Rev.2.00, Jul.16.2004, page 6 of 11 Test Circuit 3 VCC G A Y Z Pulse Generator PRR = 1 MHz Duty Cycle 50% Zout = 50Ω G Input 180 Ω 75 ΩCL 75 ΩCL 180 Ω Note: 1. C L includes probe and jig capacitance. Waveforms Enable G 0.3 V 2.7 V 1.5 V 2.7 V 0 V 3 V 1.5 V 0.3 V Enable G Output tZL OLV 1.5 V tLZ 0.5 V S2 : Open 4.5 V 1.5 V tr tf S2 : Closed

Rev.2.00, Jul.16.2004, page 11 of 11 Package Dimensions 19.2

20.32 Max

6.3 7.4 Max5.06 Max2.54 Min

0.51 Min

(reference value) DP-16E Conforms Conforms 1.05 g 0.89 1.3 7.62 0.25 + 0.1 – 0.05 0˚ – 15˚ As of January, 2003 Unit: mm 19.2 6.3 7.4 Max5.06 Max2.54 Min (reference value) DP-16FV Conforms Conforms 1.05 g 2.54 ± 0.25 *NI/Pd/AU Plating *0.48 ± 0.08 0.89 1.3 7.62 *0.25 ± 0.06 0˚ – 15˚ Unit: mm

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