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Generalplus Technology Inc. reserves the right to change this documentation without prior notice. Information provided by Generalplus Technology Inc. is believed to be accurate and reliable. However, Generalplus Technology Inc. makes no warranty for any errors which may appear i n this document. Contact Generalplus Technology Inc. to obtain the latest version of devic e specifications before placing your order. No responsibility is assumed by Generalplus Technology Inc. for any infringement of patent or other rights of third parties which may result from its use. In addition, Ge neralplus products are not GGPPRR2233LL33220000EE AUG. 16, 2010 Version 1.7 3322MM--BBIITT MMAASSKK RROOMM authorized for use as critical components in life support devices/systems or aviation devices/systems, where a malfunction or f ailure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of Generalplus.

© Generalplus Technology Inc. Proprietary & Confidential 2 Aug. 16, 2010 Version: 1.7 Table of Contents PAGE

© Generalplus Technology Inc. Proprietary & Confidential 3 Aug. 16, 2010 Version: 1.7 32M-BIT MASK ROM 1. GENERAL DESCRIPTION This device is a fully static mask programmable ROM fabricated by advance technology. It is or ganized either as 4M x 8 (byte mode) or as 2M x 16 (word mode) depending on the voltage level of BYTE pin. (See mode selection table). This device operates with low power supply voltage, 2.7V - 3.6V. It requires no external clock, which assure extremely easy operation. 2. FEATURES „ Bit organization – 4M x 8 (byte mode) – 2M x 16 (word mode) „ Fast access time – Random access: 70ns „ Current – Operating: 40mA – Standby: 15μA „ Supply voltage – 2.7V ~ 3.6V 3. SIGNAL DESCRIPTIONS Symbol PIN Function A0 ~ A20 Address Inputs D0 ~ D14 Data Outputs D15 / A-1 D15 (Word Mode) / LSB Address (Byte Mode) CE Chip Enable Input OE Output Enable Input BYTE Word / Byte Mode Selection VDD Power Supply Pin(For Internal Core) VDDQ Power Supply Pin(For I/O) VSS Ground Pin(For Internal Core) VSSQ Ground Pin(For I/O) NC No Connection

© Generalplus Technology Inc. Proprietary & Confidential 4 Aug. 16, 2010 Version: 1.7 3.1. PAD Assignment

© Generalplus Technology Inc. Proprietary & Confidential 5 Aug. 16, 2010 Version: 1.7 4. MODE SELECTION CE OE BYTE D15/A-1 D0~D7 D8~D15 Mode Power H X X X High Z High Z - Stand-by L H X X High Z High Z - Active L L H Output D0~D7 D8~D15 Word Active L L L Input D0~D7 High Z Byte Active 5. ELECTRICAL SPECIFICATIONS 5.1. Absolute Maximum Ratings Item Symbol Ratings Voltage on any Pin Relative to VSS VIN -0.3V to 3.9V 0℃ to 70 ℃ Ambient Operating Temperature TOPR -65℃ to 125 ℃ Storage Temperature TSTG 5.2. DC Characteristics (VDD = 2.7V ~ 3.6V, TA = 0℃ ~ 70℃) Item Symbol Min. Max. Conditions Output High Voltage VOH 2.3V - IOH = -400μA Output Low Voltage VOL - 0.4V IOL = 1.6mA Input High Voltage VIH 2.1V VDD + 0.3V - Input Low Voltage VIL -0.3V 0.2XVDD - Input Leakage Current ILI - 5.0μA 0V, VDD Output Leakage Current ILO - 5.0μA 0V, VDD f = 5.0MHz, CE = VIL, OE = VIH, all output open Operating Current ICC - 40mA CE = VIH Standby Current (TTC) ISTB1 - 1.0mA CE > VDD-0.2V Standby Current (CMOS) ISTB2 - 15μA Input Capacitance CIN - 10pF TA = 25°C, f = 1.0MHZ Output Capacitance COUT - 10pF TA = 25°C, f = 1.0MHZ 5.3. AC Characteristics (VDD = 2.7V ~ 3.6V, TA = 0℃ ~ 70℃) Item Symbol Min. Max. Read Cycle Time tRC 70ns - Address Access Time tAA - 70ns Chip Enable Access Time tACE - 70ns Output Enable Time tOE - 35ns Output Hold After Address tOH 0ns - Output High Z Delay tHZ - 20ns Note: Output high-impedance delay (tHZ) is measured from OE or CE going high, and this parameter guar-anteed by design over the full voltage and temperature operating range - not tested.

© Generalplus Technology Inc. Proprietary & Confidential 6 Aug. 16, 2010 Version: 1.7 5.4. AC Test Conditions Input Pulse Levels 0.4V~ 2.4V Input Rise and Fall Times 10ns Input Timing Level 1.4V Output Timing Level 1.4V Output Load See Figure Note: 30pF output load capacitance for 70ns speed grade Note: No output loading is present in tester load board. Active loading is used and under software programming control. Output loading capacitance includes load board's and all stray capacitance. 5.5. Timing Diagram 5.5.1. Random read *Important Note: It will fail to read 1st data from GPR23L3200E after power on if CE is always set to ground level. Please refer the application note for further details.

© Generalplus Technology Inc. Proprietary & Confidential 8 Aug. 16, 2010 Version: 1.7 7. ORDERING INFORMATION Product Number Package Type GPR23L3200E - NnnV - C Chip form Note1: Code number is assigned for customer. Note2: Code number (N = A - Z or 0 - 9, nn = 00 - 99); version (V = A - Z).

© Generalplus Technology Inc. Proprietary & Confidential 9 Aug. 16, 2010 Version: 1.7 8. DISCLAIMER The information appearing in this publication is believed to be accurate. Integrated circuits sold by Generalplus Technology are covered by the warranty and patent indemnification provisions stipulated in the terms of sale only. GENERALPLUS makes no warranty, express, statutory implied or by description regarding the information in this publication or regarding the freedom of the described chip(s) from patent infringem ent. FURTHERMORE, GENERALPLUS MAKES NO WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. GENERALPLUS reserves the right to halt production or alter the specifications and prices at any time without notice. Acco rdingly, the reader is cautioned to verify that the data sheets and other information in this publication are current before placing orders. Products described herein are intended for use in normal co mmercial applications. Applications involving unus ual environmental or reliabili ty requirements, e.g. milit ary equipment or medical lif e support equipment, are specifically not recommended without additional processing by GENERALPLUS for such applications. Please note that application circuits illustrated in this document are for reference purposes only.

© Generalplus Technology Inc. Proprietary & Confidential 10 Aug. 16, 2010 Version: 1.7 9. REVISION HISTORY Date Revision # Description Page AUG. 16, 2010 1.7 Modify 3.1 Pad Assignment. 4 DEC. 25, 2009 1.6 1. Modify 2. SIGNAL DESCRIPTION. 2. Modify 3. PIN DESCRIPTION. 3. Modify 3.1. Pad Assignment. 4. Modify 5.2. DC Characteristics. 5. Add section 6. APPLICATION NOTE. JAN. 03, 2008 1.5 1. Delete section 3.1.1 “48 TSOP”. 2. Delete section 5 “PACKAGE INFORMATION”. 3. Modify “Ordering information” in section 6. AUG. 21, 2007 1.4 1. Modify the “PIN Configuration” in section 3.1. 2. Add footnote to section 4.5.1. MAR. 29, 2007 1.3 Modify the “Ordering Information” in section 3.2. 4 JAN. 10, 2006 1.1 2. Add the “GENERAL DESCRIPTION” to section 1. 3. Add the “PIN Configuration” to section 3.1. 4. Modify the “Ordering Information” and “Mode Selection” in section 3.2 and 3.3. 5. Modify the “48-PIN plastic TSOP” in section 5.1. APR. 28, 2005 1.0 Original Note: The GPR23L3200E data sheet v1.0 is a continued version of SPR23L3200E data sheet v1.0.