GF9103

GF9103 GENNUM

Document overview

• PDF pages: 9

Technical content

Page 1

FEATURES

• 4:2:2 to over-sampled RGB or YCBCR conversion in a single device
• single 10 bit 4:2:2 input
• internal 4:2:2 de-multiplexer
• 4:2:2 to 8:8:8 interpolation filters
• internal YCBCR to RGB color space conversion
• optional YCBCR (8:8:8) output mode
• setup insertion in Luminance channel under user control
• user selectable digital SIN X/X correction
• rounding to 10/8 bit resolution per output channel
• 40 MHz maximum clock rate
• single +5 V power supply

APPLICATIONS

• Over-Sampling 4:2:2 to Analog RGB Conversions for video monitoring
• Over-Sampling 4:2:2 to Analog YCBCR Conversions for video monitoring

ORDERING INFORMATION

MultiGEN ™ GF9103 Over-Sampling

Color Space Converter for Video

Monitoring

DATA SHEET

DEVICE DESCRIPTION

The GF9103 is specifically designed to simplify conversions from 4:2:2 component digital video to analog RGB or analog YCBCR component video. The GF9103 simplifies this process by performing 4:2:2 to 8:8:8 interpolation, digital color space conversion and digital SIN X/X correction in a single device. Immediately following the GF9103, three over-sampled channels of RGB or YCBCR data may be passed through Digital to Analog converters and simplified analog reconstruction filters.

The GF9103 accepts a single 10 bit stream of 4:2:2 data and internally de-multiplexes it into three 10 bit channels of YCBCR data. The YCBCR data is then passed through three linear phase FIR filters that over-sample the Y data by a factor of 2 and the CBand CR data by a factor of 4.

While operating in an over-sampled RGB output mode, the interpolated YCBCR data is passed through the internal color space converter to convert the YCBCR data to RGB data according to CCIR-601. Alternatively, the color space converter may be bypassed to obtain over-sampled YCBCR (8:8:8) output data. While operating in YCBCR output mode, setup may be dynamically inserted into the Luminance channel.

Prior to output rounding, over-sampled YCBCR or RGB data may be corrected for SIN X/X characteristics of D/A conversion. Output data may be rounded to 10 or 8 bit resolution per channel. CB and CR may be presented as signed or unsigned data.

The GF9103 is packaged in a 68 pin PLCC package, operates with a single +5 V power supply and typically consumes only 85 mA of current when operated at 27 MHz.

FUNCTIONAL BLOCK DIAGRAM

Revision Date: August 1997

Document No. 521 - 33 - 04

GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3 Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: info@gennum.com

www.gennum.com

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PIN DESCRIPTION

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Fig. 1 GF9103 Pin Connections

Fig. 2a Equivalent Input Circuit

Fig. 2b Equivalent Output Circuit

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DEVICE DESCRIPTION

The GF9103 is composed of five main sections:

1. 4:2:2 De-Multiplexer 2. FIR Filtering and Setup Insertion 3. Color Space Conversion 4. Digital SIN X/X Correction 5. Output Processing

4:2:2 DE-MULTIPLEXER

The de-multiplexer accepts data multiplexed in a SMPTE 125M compliant format from the SI9..0 input data port. SI9 is the Most Significant Bit and SI0 is the Least Significant Bit. The input data stream is assumed to be a multiplexed stream of CB Y CR [Y] CB..., where the three words CB Y CR refer to cosited samples and where [Y] refers to an isolated Luminance sample. When operating the GF9103 with 8 bit input data, SI9..2 should be used to present data to the device and SI1..0 should be set low.

At least once during a power cycle, the GF9103 must be synchronized to the incoming data stream. The GF9103 is synchronized by holding SYNC high on clock period N and low on clock period N+1 when the first CB sample is presented to the SI9..0 inputs. SYNC may be held low until re-synchronization is desired, or it may be toggled at every occurrence of a CB sample. Refer to the timing diagram in Figure 9 for required operation of the SYNC control signal.

The internal de-multiplexer will de-multiplex all data in the input data stream including any ancillary, EDH,VITC, and EAV/SAV ... signals that may be present. Since this data is passed directly to the interpolation filters in the same way that active video would be, it is recommended that such data be replaced with appropriate blanking levels prior to entering the GF9103.

The output of the 4:2:2 de-multiplexer consists of three 10 bit channels of YCBCR data. All three channels are then fed to their respective interpolation filter.

INTERPOLATION FILTERS

Within the interpolation stage, the Luminance data is oversampled by a factor of two and the CB and CR data is oversampled by a factor of four so that the 4:2:2 data is converted to 8:8:8 data. By over-sampling the 4:2:2 data to 8:8:8 data, the size, cost and complexity of the analog reconstruction filters following Digital to Analog converters are reduced.

The Luminance data is over-sampled by a linear phase FIR filter providing 0.0 dB DC gain, +0.038/-0.025 pass- band ripple [0.0 ƒs to 0.21 ƒs], 6 dB attenuation at ƒs/4, and 47 dB stopband attenuation [0.30 ƒs to 0.50 ƒs]. Figure 3 and Figure 4 present the frequency response of the Luminance interpolation filter.

The CB and CR data is over-sampled by a linear phase FIR filter providing 0.0 dB DC gain, passband ripple of +0.2 dB/- 0.2 dB [0.0 to 0.07 ƒs], 6 dB attenuation at ƒs/8 and a stopband attenuation of 28 dB [ 0.17ƒs to 0.50 ƒs].

Figure 5 and Figure 6 present the frequency response of the CB and CR interpolation filters.

Following the interpolation process, a DC offset may be introduced into the Luminance channel. Setup insertion is enabled and disabled by the SETUP control signal. While SETUP is high, the Luminance data is scaled by a factor of +947/1024 and an offset of +71 (decimal) is added. While SETUP is low, no scaling or offset is applied and the data passes through the stage unmodified. The timing diagram in Figure 10 demonstrates the operation of the SETUP control signal.

COLOR SPACE CONVERSION

Two operating modes exist for the color space converter section. These two modes are controlled by the SELECT_MATRIX control signal. While SELECT_MATRIX is low, the de-matrixing 3 x 3 multiplier is bypassed so that over-sampled Y CB CR data is passed through the stage unmodified. While SELECT_MATRIX is high, the 3 x 3 multiplier implements the following color space conversion:

Y

G 1 -689/2048 -1430/2048 =

CB

B 1 3548/2048

0

R 1 0 2807/2048

CR

SIN X/X CORRECTION

While BYPASS is high, SIN X/X correction is enabled on each of the three output channels. SIN X/X correction is implemented by passing the data through a FIR filter with the frequency response shown in Figure 7. While BYPASS is low, the FIR filter is bypassed and each channel is passed directly to the output processing section. Total latency through the device is 22 clock cycles when BYPASS is low and 24 clock cycles when BYPASS is high.

OUTPUT PROCESSING

Output data may be rounded to 10 or 8 bit accuracy. RND10/8 should be set high for 10 bit output rounding and set low for 8 bit output rounding. Rounding to 8 bit accuracy is accomplished by adding a rounding bit to SO1 and then zeroing both SO0 and SO1.

CB and CR data may be output as signed (two’s complement) or unsigned (offset binary) data depending on the state of the CONVERT control signal. When CONVERT is set high, the CB and CR channels are output as signed (two’s complement) data. When CONVERT is set low, CB and CR are output as unsigned (offset binary) data, obtained by inverting the sign bit of the two's complement number. When operating in RGB output mode, the CONVERT pin is over-ridden and RGB data is always output as unsigned (offset binary) data.

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CONTROL SIGNAL/OPERATING MODE SUMMARY

SYNC

The SYNC control signal provides synchronization for the internal 4:2:2 de-multiplexer. SYNC should be held high on clock period N and low on clock period N+1 when the first CB sample is presented to the SI9..0 inputs. SYNC may be held low until re-synchronization is desired or may be toggled at every occurrence of a CB sample.

SELECT_MATRIX AND SETUP

SELECT_MATRIX and SETUP select the color space conversion and offset insertions which the GF9103 is to perform. The following chart presents the available color space conversions and the corresponding states of the SELECT_MATRIX and SETUP control pins. SETUP is a dynamic pin that may be modified every clock cycle.

SIN X/X CORRECTION

OUTPUT ROUNDING

TWO’S COMPLEMENT OUTPUT CONVERSION

OUTPUT ENABLE

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Fig. 3 Frequency Response of Luminance Interpolation Filter (Sampling at ƒs=27MHz)

Fig. 5 Frequency Response of Chrominance Interpolation Filter (Sampling at ƒs=27MHz)

Fig. 7 SIN X/X Compensation Filter Frequency Response (Sampling at ƒs=27MHz)

Fig. 4 Frequency Response of Luminance Interpolation Filter (Sampling at ƒs=27MHz)

Fig. 6 Frequency Response of Chrominance Interpolation Filter (Sampling at ƒs=27MHz)

fig. 8 luminance and chrominance filter characteristics

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ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

VDD = 5V, TA = 0°C, RL = 150 Ω to GND and 144 Ω AC coupled unless otherwise shown.

Fig. 9 Operation of SYNC Control Signal

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SWITCHING CHARACTERISTICS

TA from 0°C to 70°C unless otherwise specified.

Fig. 10 Operation of SETUP Control Signal

Fig. 11 Input/Output Timing, BYPASS = 1

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Fig. 12 Input/Output Timing, BYPASS = 0

GENNUM CORPORATION

MAILING ADDRESS: P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3 Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946

SHIPPING ADDRESS: 970 Fraser Drive, Burlington, Ontario, Canada L7L 5P5

GENNUM JAPAN CORPORATION C-101, Miyamae Village, 2-10-42 Miyamae, Suginami-ku Tokyo 168-0081, Japan Tel. +81 (03) 3334-7700 Fax. +81 (03) 3247-8839

GENNUM UK LIMITED Centaur House, Ancells Bus. Park, Ancells Rd, Fleet, Hants, England GU13 8UJ Tel. +44 (0)1252 761 039 Fax +44 (0)1252 761 114

Gennum Corporation assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement.

© Copyright March 1995 Gennum Corporation. All rights reserved. Printed in Canada.