Overview
GAL20V8C-10LP is listed in the Logic IC category. Available datasheets include documents from Lattice Semiconductor.
Summary
High Performance E2CMOS PLD Generic Array Logic
Description
The GAL20V8C, at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (<100ms) allow the devices to be reprogrammed quickly and efficiently.
Source title
GAL20V8C-10LP Datasheet(PDF) - Lattice Semiconductor