STR-G6651 ALLEGRO
Document overview
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Technical content
The STR-G6651 is specifically designed to satisfy the requirements for increased integration and reliability in off-line quasi-resonant flyback converters. This device incorporates the primary control and drive circuit with a discrete avalanche-rated power MOSFET. Cycle-by-cycle current limiting, under-voltage lockout with hyster- esis, over-voltage protection, and thermal shutdown protects the power supply during the normal overload and fault conditions. Over-voltage protection and thermal shutdown are latched after a short delay. The latch may be reset by cycling the input supply. Low-current startup and a low-power standby mode selected from the secondary circuit completes a comprehensive suite of features. The device is provided in a five-pin over-molded TO-220 style package, affording dielectric isolation without compromising thermal characteristics. Two lead forms are available (with and without the suffix ‘-LF’) to accommodate printed wiring board layout or mechanical constraints. Proven in substantial volumes, the STR-G6651 is a robust low-risk solution for off-line power supplies particularly where management of EMI at the source is a significant element of the system design.
FEATURES
I Quasi-Resonant Operation I Output Power to 66 W I Low-Loss, Pulse-Ratio-Control Standby Mode I Temperature-Compensated Pulse-by-Pulse Over-Current Protection I Latched Over-Voltage and Thermal Protection I Under-Voltage Lockout with Hysteresis I Active Low-Pass Filter for Enhanced Light-Load Stability I Switched Attenuation of Leading-Edge Current-Sensing Signal I Regulated Soft Gate Drive I Adjustable Switching Speed for EMI Control I Overmolded Five-Pin Package OFF-LINE QUASI-RESONANT FLYBACK SWITCHING REGULATOR Always order by complete part number: STR-G6651 . Data Sheet 28102.9A STR-G6651 ABSOLUTE MAXIMUM RATINGS at TA = +25°C Drain Current, ID Avalanche Energy, EAS Over-Current Protection Voltage Range, Insulation RMS Voltage, Package Power Dissipation, PD FET Channel Temperature, TJ . . . +150°C Internal Frame Temperature, TF . . +125°C Operating Temperature Range, Storage Temperature Range, SOURCE DRAIN OVERCURRENT & FEEDBACK GROUND Dwg. PK-011 VIN UVLO OVP TSD LATCH OSC. OCP FDBK SUPPLY
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 1999, 2000 Allegro MicroSystems, Inc. FUNCTIONAL BLOCK DIAGRAM FEEDBACK & OVER-CURRENT PROTECTION GROUND V IN SOURCE DRAIN Dwg. FK-002-5 0.73 V TSD OVER-VOLT. PROTECT R S Q REF. FAULT LATCH 1.45 V UVLO 1.35 mA DRIVE REG. OSC ALLOWABLE PACKAGE POWER DISSIPATION MAXIMUM SAFE OPERATING AREA 100 1.5 W 140 LIMITED BY FRAME TEMP. = +125°C MAX. FREE AIR 27 W TEMPERATURE in °C ALLOWABLE PACKAGE POWER DISSIPATION in WATTS MOUNTING SURFACE TEMPERATURE Dwg. GK-003-4 0.8 W CONTROLLER 0.5 0.05 DRAIN-SOURCE VOLTAGE in VOLTS DRAIN CURRENT in AMPERES Dwg. GK-004-5 0.15 1.5 3.0 100 300 NO HEAT SINK NATURAL COOLING TA = +25°C tw = 1 ms SINGLE PULSE 1000 tw = 0.1 ms SINGLE PULSE LIMITED BY VDS max LIMITED BY rDS(on)
www.allegromicro.com ELECTRICAL CHARACTERISTICS at TA = +25°C, VIN = 18 V, VDD = 10 V, VS = 0, voltage mea- surements are referenced to ground terminal (unless otherwise specified). Limits Characteristic Symbol Test Conditions Min. Typ. Max. Units On-State Voltage VINT Turn-on, increasing VIN 14.4 17.6 V Under-Voltage Lockout VINQ Turn-off, decreasing VIN 9.0 V Over-Voltage Threshold VOVP(th) Turn-off, increasing VIN 20.5 22.5 24.5 V Drain-Source Breakdown Voltage V(BR)DSS ID = 300 µA 650 V Drain Leakage Current IDSS VDS = 650 V 300 µA On-State Resistance rDS(on) VS = 10 V, ID = 0.9 A, TJ = +25°C 3.95 Ω Maximum OFF Time toff Drain waveform high µs Minimum Pulse Duration for Input of Quasi-Resonant Signals tw(th) Drain waveform high1 1.0 µs Minimum OFF Time toff Drain waveform high1 1.5 µs Feedback Threshold Voltage VFDBK Drain waveform low to high1 0.68 0.73 0.78 V Oscillation synchronized2 1.3 1.45 1.6 V Over-Current Protection/Feedback Sink Current IOCP/FB VOCP/FB = 1.0 V 1.2 1.35 1.5 mA Latch Holding Current IIN(OVP) VIN reduced from 24.5 V to 8.5 V 400 mA Latch Release Voltage VIN IIN ≤ 20 µA, VIN reduced from 24.5 V 6.6 8.4 V Switching Time tf VDD = 200 V, ID = 0.9 A 250 ns Supply Current IIN(ON) Operating3 mA IIN(OFF) Increasing VIN prior to oscillation 100 µA Insulation RMS Voltage VWM(RMS) All terminals simultaneous refer- 2000 V ence metal plate against backside Thermal Shutdown TJ 140 Thermal Resistance RθJM Output junction-to-mounting frame 1.63 °C/W Notes: Typical Data is for design information only. 1. Feedback is square wave, VIM = 2.2 V, th = 1 µs, tl = 35 µs 2. For quasi-resonant operation, the input signal must be longer than tw(th) and greater than VFDBK 3. Feedback is square wave, VIM = 2.2 V, th = 4 µs, tl = 1 µs
Worcester, Massachusetts 01615-0036 (508) 853-5000 ALLOWABLE AVALANCHE ENERGY 200 100 100 140 STARTING CHANNEL TEMPERATURE in °C ALLOWABLE AVALANCHE ENERGY in mJ Dwg. GK-009-2 150 120 160 SINGLE PULSE DRAIN CURRENT = 1.8 A STR-G6600 Series Drain-Source Drain-Source Output Breakdown Voltage ON Resistance at ID = 300 µA at ID = 0.9 A Part Number V(BR)DS, Minimum rDS(on), Maximum Output Power For 100/120 V AC Input STR-G6622 450 V 2.18 Ω
44 W – 60 W
0.92 Ω
98 W – 130 W
2.62 Ω
36 W – 50 W
3.95 Ω 66 W STR-G6652 650 V 2.80 Ω 86 W STR-G6653 650 V 1.95 Ω 120 W
www.allegromicro.com WARNING — These devices are designed to be operated at lethal voltages and energy levels. Circuit designs that embody these components must conform with applicable safety requirements. Precau- tions must be taken to prevent accidental contact with power-line potentials. Do not connect grounded test equipment. The use of an isolation transformer is recommended during circuit development and breadboarding. TYPICAL QUASI-RESONANT FLYBACK CONVERSION USING STR-G6651 WARNING: lethal potentials are present. See text. Recommended mounting hardware torque: Recommended silicone grease: Dow Corning SC102, Toshiba YG6260, Shin-Etsu G746., or equivalent VOLTAGE SENSE + OUTPUT – OUTPUT Dwg. EK-003-4A 0.73 V TSD OVER-VOLT. PROTECT R S Q REF. FAULT LATCH 1.45 V UVLO OSC 1.35 mA DRIVE REG. FULL-BRIDGE RECTIFIER AC INPUT
Worcester, Massachusetts 01615-0036 (508) 853-5000 Dimensions in Inches (for reference only) Dwg. MK-003-5 in 0.018 +0.008 –0.004 0.200 ±0.024 AT TIPS 0.394 ± 0.008 0.126 ± 0.008 ø 0.665 ± 0.012 0.067 ± 0.004 0.110 ± 0.008 0.102 ± 0.004 0.033 +0.008 –0.004 0.165 ± 0.008 0.311 ± 0.008 0.343 ± 0.020 0.157 ± 0.008 0.161 ± 0.020
0.181 REF
(controlling dimensions) 4.1 ± 0.5 Dwg. MK-003-5 mm 0.45 +0.2 –0.1 5.08 ±0.6 AT TIPS ± 0.2 3.2 ± 0.2 ø 16.9 ± 0.3 1.7 ± 0.1 2.8 ± 0.2
4.6 REF
2.6 ± 0.1 0.85 +0.2 –0.1 4.2 ± 0.2 4.0 ± 0.2 7.9 ± 0.2 8.7 ± 0.5 STR-G6651 (LF1129)
www.allegromicro.com Dimensions in Inches (for reference only) Dimensions in Millimeters (controlling dimensions) STR-G6651-LF (LF1128) 0.217 ± 0.020
0.224 REF
Dwg. MK-003-51 in 0.018 +0.008 –0.004 0.157 ±0.020 0.394 ± 0.008 0.126 ± 0.008 ø 0.665 ± 0.012 0.067 ± 0.004 0.110 ± 0.008 0.102 ± 0.004 0.033 +0.008 –0.004 0.165 ± 0.008 0.311 ± 0.008 0.531 REF 0.157 ± 0.008
0.291 REF
0.079 ±0.020 5.5 ± 0.5
5.7 REF
Dwg. MK-003-51 mm 0.45 +0.2 –0.1 4.0 ±0.5 10.0 ± 0.2 3.2 ± 0.2 ø 16.9 ± 0.3 1.7 ± 0.1 2.8 ± 0.2 2.6 ± 0.1 0.85 +0.2 –0.1 4.2 ± 0.2 7.9 ± 0.2 13.5 REF 4.0 ± 0.2
7.4 REF
2.0 ±0.5
Worcester, Massachusetts 01615-0036 (508) 853-5000 The products described here are manufactured in Japan by Sanken Electric Co., Ltd. for sale by Allegro MicroSystems, Inc. Sanken Electric Co., Ltd. and Allegro MicroSystems, Inc. reserve the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of their products. Therefore, the user is cautioned to verify that the information in this publication is current before placing any order. These products are not authorized for use as critical compo- nents in life-support appliances, devices, or systems without express written approval. The information included herein is believed to be accurate and reliable. However, Sanken Electric Co., Ltd. and Allegro MicroSystems, Inc. assume no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.