DS91M040

DS91M040 125 MHz Quad M-LVDS Transceiver datasheet (Rev. M)

Document overview

• Manufacturer or author: Texas Instruments, Incorporated [SNLS283,M]
• PDF pages: 23

Technical content

R T = ZLOADED Line Card in SLOT N M-LVDS Receivers DS91M040 www.ti.com SNLS283M –FEBRUARY 2008–REVISED APRIL 2013 DS91M040125MHzQuadM-LVDSTransceiver Check forSamples: DS91M040 1FEATURES DESCRIPTION The DS91M040 is a quad M-LVDS transceiver 2• DC -125 MHz /250 Mbps Low Jitter,Low designedfordriving/receivingclockor datasignalsSkew, Low Power Operation to/fromup tofourmultipointnetworks.• Wide InputCommon Mode VoltageRange M-LVDS (MultipointLVDS) is a new familyof busAllows up to±1V ofGND Noise interfacedevices based on LVDS technology• Conforms toTIA/EIA-899M-LVDS Standard specificallydesigned for multipointand multidrop

• Pin SelectableM-LVDS ReceiverType (1or 2) cable and backplane applications.It differsfrom standardLVDS inprovidingincreaseddrivecurrentto• ControlledTransitionTimes (2.0ns typ) handledoubleterminationsthatarerequiredinmulti-MinimizeReflections point applications.Controlled transitiontimes• 8 kV ESD on M-LVDS I/Opinsprotects minimizereflectionsthatare common in multipointadjoiningcomponents configurationsdue to unterminatedstubs.M-LVDS
• Flow-Through PinoutSimplifiesPCB Layout devicesalsohave a verylargeinputcommon mode voltagerange foradditionalnoisemargin in heavily• Small 5 mm x 5 mm WQFN-32 Space Saving loadedand noisybackplaneenvironments.Package A single DS91M040 channel is a half-duplex APPLICATIONS transceiverthatacceptsLVTTL/LVCMOS signalsat thedriverinputsand convertsthem todifferentialM-• Multidrop/MultipointClock and Data LVDS signallevels.The receiverinputsacceptlowDistribution voltagedifferentialsignals(LVDS, BLVDS, M-LVDS,
• High-Speed,Low Power, Short-Reach LVPECL and CML) and convertthem to3V LVCMOS AlternativetoTIA/EIA-485/422 signals.The DS91M040 supportsbothM-LVDS type 1 and type2 receiverinputs.• Clock DistributioninAdvancedTCA (ATCA) and MicroTCA (μTCA, uTCA) Backplanes System Diagram Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2008–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

(GND) DAP RO2 DI2 RO3 DI3 FSEN2 MDE VDD VDD RE2 DE2 RE3 DE3 FSEN1 GND VDD VDD RE1 DE1 RE0 DE0 DS91M040 SNLS283M –FEBRUARY 2008–REVISED APRIL 2013 www.ti.com Connection Diagram Logic Diagram

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2.4 V -2.4 V 50 mV -50 mV 150 mV Transition Region Type 1 Type 2 VID DS91M040 www.ti.com SNLS283M –FEBRUARY 2008–REVISED APRIL 2013 PIN DESCRIPTIONS Number Name I/O,Type Description 1,3,5,7 RO O, LVCMOS Receiveroutputpin. 26,28,13,15 RE I,LVCMOS Receiverenablepin:When RE ishigh,thereceiverisdisabled.When RE is low,thereceiverisenabled.Thereisa 300 kΩ pullupresistoron thispin. 25,27,14,16 DE I,LVCMOS Driverenablepin:When DE islow,thedriverisdisabled.When DE ishigh,the driverisenabled.Thereisa 300 kΩ pulldownresistoron thispin. 2,4,6,8 DI I,LVCMOS Driverinputpin. 31,DAP GND Power Ground pinand pad. 17,19,21,23 A I/O,M-LVDS Non-invertingdriveroutputpin/Non-invertingreceiverinputpin 18,20,22,24 B I/O,M-LVDS Invertingdriveroutputpin/Invertingreceiverinputpin 11,12,29,30 VDD Power Power supplypin,+3.3V ± 0.3V 32 FSEN1 I,LVCMOS Failsafeenablepinwitha 300 kΩ pullupresistor.ThispinenablesType 2 receiveron inputs0 and 2. FSEN1 = L --> Type 1 receiverinputs FSEN1 = H --> Type 2 receiverinputs 9 FSEN2 I,LVCMOS Failsafeenablepinwitha 300 kΩ pullupresistor.ThispinenablesType 2 receiveron inputs1 and 3. FSEN2 = L --> Type 1 receiverinputs FSEN2 = H --> Type 2 receiverinputs 10 MDE I,LVCMOS Masterenablepin.When MDE isH, thedeviceispowered up.When MDE isL, thedeviceoverridesallothercontroland powers down. M-LVDS ReceiverTypes The EIA/TIA-899M-LVDS standardspecifiestwo differenttypesofreceiverinputstages.A type1 receiverhas a conventionalthresholdthatiscenteredatthemidpointoftheinputamplitude,VID/2.A type2 receiverhas a built inoffsetthatis100mV greaterthenVID/2.The type2 receiveroffsetactsas a failsafecircuitwhere open orshort circuitsattheinputwillalwaysresultintheoutputstagebeingdriventoa lowlogicstate. Figure1. M-LVDS ReceiverInputThresholds These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates. Copyright© 2008–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:DS91M040

SNLS283M –FEBRUARY 2008–REVISED APRIL 2013 www.ti.com AbsoluteMaximum Ratings(1)(2) Power SupplyVoltage −0.3Vto+4V LVCMOS InputVoltage −0.3Vto(VDD + 0.3V) LVCMOS OutputVoltage −0.3Vto(VDD + 0.3V) M-LVDS I/OVoltage −1.9Vto+5.5V M-LVDS OutputShortCircuitCurrentDuration Continuous JunctionTemperature +140°C StorageTemperatureRange −65°C to+150°C Lead TemperatureRange Soldering(4sec.) +260°C Maximum Package Power Dissipation@ +25°C RTV Package 3.91W DerateRTV Package 34 mW/ °C above +25°C Package ThermalResistance(4-Layer,2 oz.Cu, θJA +29.4°C/W JEDEC) θJC +2.8°C/W ESD Susceptibility HBM (3) ≥8 kV MM (4) ≥250V CDM (5) ≥1250V (1) “AbsoluteMaximum Ratings”indicatelimitsbeyond whichdamage tothedevicemay occur,includinginoperabilityand degradationof devicereliabilityand/orperformance.Functionaloperationofthedeviceand/ornon-degradationattheAbsoluteMaximum Ratingsor otherconditionsbeyond thoseindicatedintheRecommended OperatingConditionsisnotimplied.The Recommended Operating Conditionsindicateconditionsatwhichthedeviceisfunctionaland thedeviceshouldnotbe operatedbeyond such conditions. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTISalesOffice/Distributorsforavailabilityand specifications. (3) Human Body Model,applicablestd.JESD22-A114C (4) Machine Model,applicablestd.JESD22-A115-A (5) FieldInducedCharge DeviceModel,applicablestd.JESD22-C101-C Recommended OperatingConditions Min Typ Max Units SupplyVoltage,VDD 3.0 3.3 3.6 V VoltageatAny Bus Terminal(SeparateorCommon-Mode) −1.4 +3.8 V DifferentialInputVoltageVID 2.4 V LVTTL InputVoltageHighVIH 2.0 VDD V LVTTL InputVoltageLow VIL 0 0.8 V OperatingFreeAirTemperatureTA −40 +25 +85 °C

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www.ti.com SNLS283M –FEBRUARY 2008–REVISED APRIL 2013 DC ElectricalCharacteristics(1)(2)(3)(4) Over recommended operatingsupplyand temperaturerangesunlessotherwisespecified. Symbol Parameter Conditions Min Typ Max Units M-LVDS Driver |VAB | Differentialoutputvoltagemagnitude R L = 50Ω,C L = 5 pF 480 650 mV ΔVAB Change indifferentialoutputvoltagemagnitude Figure2 −50 0 +50 mVbetween logicstates Figure4 VOS(SS) Steady-statecommon-mode outputvoltage R L = 50Ω,C L = 5 pF 0.3 1.6 2.1 V |ΔVOS(SS)| Change insteady-statecommon-mode outputvoltage Figure2 0 +50 mVbetween logicstates Figure3 VA(OC) Maximum steady-stateopen-circuitoutputvoltage Figure5 0 2.4 V VB(OC) Maximum steady-stateopen-circuitoutputvoltage 0 2.4 V VP(H) Voltageovershoot,low-to-highleveloutput(5) R L = 50Ω,C L = 5pF,CD = 0.5pF 1.2VSS V Figure7VP(L) Voltageovershoot,high-to-lowleveloutput(5) −0.2V VFigure8 SS IIH High-levelinputcurrent(LVTTL inputs) VIH = 3.6V -15 15 μA IIL Low-levelinputcurrent(LVTTL inputs) VIL= 0.0V -15 15 μA VCL InputClamp Voltage(LVTTL inputs) IIN = -18mA -1.5 V IOS Differentialshort-circuitoutputcurrent(6) Figure6 -43 43 mA M-LVDS Receiver VIT+ Positive-goingdifferentialinputvoltagethreshold See TruthTables Type 1 16 50 mV Type 2 100 150 mV VIT− Negative-goingdifferentialinputvoltagethreshold See TruthTables Type 1 −50 20 mV Type 2 50 94 mV VOH High-leveloutputvoltage(LVTTL output) IOH = −8mA 2.4 2.7 V VOL Low-leveloutputvoltage(LVTTL output) IOL = 8mA 0.28 0.4 V IOZ TRI-STATE outputcurrent VO = 0V or3.6V −10 10 μA IOSR Short-circuitreceiveroutputcurrent(LVTTL output) VO = 0V -50 -90 mA (1) The ElectricalCharacteristicstableslistensuredspecificationsunderthelistedRecommended OperatingConditionsexceptas otherwisemodifiedorspecifiedby theElectricalCharacteristicsConditionsand/orNotes.Typicalspecificationsareestimationsonlyand arenotensured. (2) Currentintodevicepinsisdefinedas positive.Currentoutofdevicepinsisdefinedas negative.Allvoltagesarereferencedtoground exceptVOD and ΔVOD . (3) Typicalvaluesrepresentmost likelyparametricnorms forVDD = +3.3V and TA = +25°C, and attheRecommended OperationConditions atthetimeofproductcharacterizationand arenotspecified. (4) C L includesfixturecapacitanceand C D includesprobecapacitance. (5) Specificationisensuredby characterizationand isnottestedinproduction. (6) Outputshortcircuitcurrent(IOS )isspecifiedas magnitudeonly,minus signindicatesdirectiononly. Copyright© 2008–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:DS91M040

SNLS283M –FEBRUARY 2008–REVISED APRIL 2013 www.ti.com DC ElectricalCharacteristics(1)(2)(3)(4)(continued) Over recommended operatingsupplyand temperaturerangesunlessotherwisespecified. Symbol Parameter Conditions Min Typ Max Units M-LVDS Bus (Inputand Output)Pins IA Transceiverinput/outputcurrent VA = 3.8V,VB = 1.2V 32 µA VA = 0V or2.4V,VB = 1.2V −20 +20 µA VA = −1.4V,VB = 1.2V −32 µA IB Transceiverinput/outputcurrent VB = 3.8V,VA = 1.2V 32 µA VB = 0V or2.4V,VA = 1.2V −20 +20 µA VB = −1.4V,VA = 1.2V −32 µA IAB Transceiverinput/outputdifferentialcurrent(IA − IB) VA = VB,−1.4V≤ V ≤ 3.8V −4 +4 µA IA(OFF) Transceiverinput/outputpower-offcurrent VA = 3.8V,VB = 1.2V, DE = 0V 32 µA 0V ≤ VDD ≤ 1.5V VA = 0V or2.4V,VB = 1.2V, DE = 0V −20 +20 µA 0V ≤ VDD ≤ 1.5V VA = −1.4V,VB = 1.2V, DE = 0V −32 µA 0V ≤ VDD ≤ 1.5V IB(OFF) Transceiverinput/outputpower-offcurrent VB = 3.8V,VA = 1.2V, DE = 0V 32 µA 0V ≤ VDD ≤ 1.5V VB = 0V or2.4V,VA = 1.2V, DE = 0V −20 +20 µA 0V ≤ VDD ≤ 1.5V VB = −1.4V,VA = 1.2V, DE = 0V −32 µA 0V ≤ VDD ≤ 1.5V IAB(OFF) Transceiverinput/outputpower-offdifferentialcurrent VA = VB,−1.4V≤ V ≤ 3.8V, (IA(OFF) − IB(OFF)) DE = 0V −4 +4 µA 0V ≤ VDD ≤ 1.5V C A Transceiverinput/outputcapacitance VDD = OPEN 7.8 pF C B Transceiverinput/outputcapacitance 7.8 pF C AB Transceiverinput/outputdifferentialcapacitance 3 pF C A/B Transceiverinput/outputcapacitancebalance(CA/CB) 1 SUPPLY CURRENT (VCC ) ICCD DriverSupplyCurrent R L = 50Ω,DE = H, RE = H 67 75 mA ICCZ TRI-STATE SupplyCurrent DE = L,RE = H 22 26 mA ICCR ReceiverSupplyCurrent DE = L,RE = L 32 38 mA ICCPD Power Down SupplyCurrent MDE = L 3 5 mA

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www.ti.com SNLS283M –FEBRUARY 2008–REVISED APRIL 2013 SwitchingCharacteristics(1)(2)(3) Over recommended operatingsupplyand temperaturerangesunlessotherwisespecified. Symbol Parameter Conditions Min Typ Max Units DRIVER AC SPECIFICATIONS tPLH DifferentialPropagationDelayLow toHigh R L = 50Ω,C L = 5 pF, 1.5 3.3 5.5 ns tPHL DifferentialPropagationDelayHightoLow C D = 0.5pF 1.5 3.3 5.5 ns tSKD1 PulseSkew (4)(5) Figure7 30 125 ps Figure8 tSKD2 Channel-to-ChannelSkew (4)(6) 100 200 ps tSKD3 Part-to-PartSkew (4)(7) 0.8 1.6 ns tSKD4 Part-to-PartSkew (4)(8) 4 ns tTLH RiseTime(4) 1.2 2.0 3.0 ns tTHL FallTime(4) 1.2 2.0 3.0 ns tPZH EnableTime (ZtoActiveHigh) R L = 50Ω,C L = 5 pF, 7.5 11.5 ns tPZL EnableTime (ZtoActiveLow ) C D = 0.5pF 8.0 11.5 ns tPLZ DisableTime (ActiveLow toZ) Figure9 7.0 11.5 ns Figure10 tPHZ DisableTime (ActiveHightoZ) 7.0 11.5 ns RECEIVER AC SPECIFICATIONS tPLH PropagationDelayLow toHigh C L = 15 pF 1.5 3.0 4.5 ns tPHL PropagationDelayHightoLow Figure11 1.5 3.1 4.5 ns Figure12 Figure13 tSKD1A PulseSkew (ReceiverType 1)(4)(5) 55 325 ps tSKD1B PulseSkew (ReceiverType 2)(4)(5) 475 800 ps tSKD2 Channel-to-ChannelSkew (4)(6) 60 300 ps tSKD3 Part-to-PartSkew (4)(7) 0.6 1.2 ns tSKD4 Part-to-PartSkew (8) 3 ns tTLH RiseTime(4) 0.3 1.1 1.6 ns tTHL FallTime(4) 0.3 0.65 1.6 ns tPZH EnableTime (ZtoActiveHigh) R L = 500Ω,C L = 15 pF 3 5.5 ns tPZL EnableTime (ZtoActiveLow) Figure14 3 5.5 ns Figure15 tPLZ DisableTime (ActiveLow toZ) 3.5 5.5 ns tPHZ DisableTime (ActiveHightoZ) 3.5 5.5 ns GENERIC AC SPECIFICATIONS tWKUP Wake Up Time(4) 500 ms (MasterDeviceEnable(MDE) time) fMAX Maximum OperatingFrequency(4) 125 MHz (1) The ElectricalCharacteristicstableslistensuredspecificationsunderthelistedRecommended OperatingConditionsexceptas otherwisemodifiedorspecifiedby theElectricalCharacteristicsConditionsand/orNotes.Typicalspecificationsareestimationsonlyand arenotensured. (2) Typicalvaluesrepresentmost likelyparametricnorms forVDD = +3.3V and TA = +25°C, and attheRecommended OperationConditions atthetimeofproductcharacterizationand arenotspecified. (3) C L includesfixturecapacitanceand C D includesprobecapacitance. (4) Specificationisensuredby characterizationand isnottestedinproduction. (5) tSKD1 ,|tPLHD − tPHLD |,PulseSkew, isthemagnitudedifferenceindifferentialpropagationdelaytimebetween thepositivegoingedge and thenegativegoingedge ofthesame channel. (6) tSKD2 ,Channel-to-ChannelSkew, isthedifferenceinpropagationdelay(tPLHD ortPHLD )among alloutputchannels. (7) tSKD3 ,Part-to-PartSkew, isdefinedas thedifferencebetween theminimum and maximum differentialpropagationdelays.This specificationappliestodevicesatthesame VDD and within5°C ofeach otherwithintheoperatingtemperaturerange. (8) tSKD4 ,Part-to-PartSkew, isthedifferentialchannel-to-channelskew ofany eventbetween devices.Thisspecificationappliestodevices overrecommended operatingtemperatureand voltageranges,and acrossprocessdistribution.tSKD4 isdefinedas |Max − Min| differentialpropagationdelay. Copyright© 2008–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:DS91M040

A B ~ 1.9V ~ 1.3V 'VOS(SS) VOS(PP)VOS DS91M040 SNLS283M –FEBRUARY 2008–REVISED APRIL 2013 www.ti.com TestCircuitsand Waveforms Figure2. DifferentialDriverTestCircuit Figure3. DifferentialDriverWaveforms Figure4. DifferentialDriverFullLoad TestCircuit Figure5. DifferentialDriverDC Open TestCircuit

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www.ti.com SNLS283M –FEBRUARY 2008–REVISED APRIL 2013 Figure6. DifferentialDriverShort-CircuitTestCircuit Figure7. DriverPropagationDelay and TransitionTime TestCircuit Figure8. DriverPropagationDelays and TransitionTime Waveforms Figure9. DriverTRI-STATE Delay TestCircuit Copyright© 2008–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:DS91M040

SNLS283M –FEBRUARY 2008–REVISED APRIL 2013 www.ti.com Figure10. DriverTRI-STATE Delay Waveforms Figure11. ReceiverPropagationDelay and TransitionTime TestCircuit Figure12. Type 1 ReceiverPropagationDelay and TransitionTime Waveforms

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www.ti.com SNLS283M –FEBRUARY 2008–REVISED APRIL 2013 Figure13. Type 2 ReceiverPropagationDelay and TransitionTime Waveforms Figure14. ReceiverTRI-STATE Delay TestCircuit Figure15. ReceiverTRI-STATE Delay Waveforms TRUTH TABLES DS91M040 Transmitting(1) Inputs Outputs RE DE DI B A X H H L H X H L H L X L X Z Z (1) X — Don 'tcarecondition Z — Highimpedance state Copyright© 2008–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:DS91M040

SNLS283M –FEBRUARY 2008–REVISED APRIL 2013 www.ti.com DS91M040 as Type 1 Receiving(1) Inputs Output FSEN RE DE A − B RO L L X ≥ +0.05V H L L X ≤ −0.05V L L L X −0.05V Undefined ≤ A-B ≤ +0.05V L H X X Z (1) X — Don 'tcarecondition Z — Highimpedance state DS91M040 as Type 2 Receiving(1) Inputs Output FSEN RE DE A − B RO H L X ≥ +0.15V H H L X ≤ +0.05V L H L X +0.05V Undefined ≤ A-B ≤ +0.15V H H X X Z (1) X — Don 'tcarecondition Z — Highimpedance state DS91M040 Type 1 ReceiverInputThresholdTestVoltages(1) AppliedVoltages ResultingDifferentialInputVoltage ResultingCommon-Mode Input ReceiverOutput Voltage VIA VIB VID VICM R 2.400V 0.000V 2.400V 1.200V H 0.000V 2.400V −2.400V 1.200V L 3.800V 3.750V 0.050V 3.775V H 3.750V 3.800V −0.050V 3.775V L −1.350V −1.400V 0.050V −1.375V H −1.400V −1.350V −0.050V −1.375V L (1) H — HighLevel L — Low Level Outputstateassumes thatthereceiverisenabled(RE = L) DS91M040 Type 2 ReceiverInputThresholdTestVoltages(1) AppliedVoltages ResultingDifferentialInputVoltage ResultingCommon-Mode Input ReceiverOutput Voltage VIA VIB VID VIC R 2.400V 0.000V 2.400V 1.200V H 0.000V 2.400V −2.400V 1.200V L 3.800V 3.650V 0.150V 3.725V H 3.800V 3.750V 0.050V 3.775V L −1.250V −1.400V 0.150V −1.325V H −1.350V −1.400V 0.050V −1.375V L (1) H — HighLevel L — Low Level Outputstateassumes thatthereceiverisenabled(RE = L)

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4.5 4.0 3.5 3.0 2.5 2.0 1.5 -50 -10 30 70 110 150 f = 125 MHz DRIVER PROPAGATION DELAY (tPHLD) (ns) TEMPERATURE (° C) VCC = 3.0 V VCC = 3.3 V VCC = 3.6 V 180 150 120 0 25 50 75 100 125 f = 125 MHz VCC = 3.3V TA = 25° C R L = 50: On all CH) DE 0,1,2,3 = H RE*0,1,2,3 = H DRIVER POWER SUPPLY CURRENT (mA) FREQUENCY (MHz) 900 750 600 450 300 150 0 25 50 75 100 125 f = 1 MHz VCC = 3.3V TA = 25° C VOD - DRIVER OUTPUT AMPLITUDE (mV) RESISTIVE LOAD (:) 4.5 4.0 3.5 3.0 2.5 2.0 1.5 -50 -10 30 70 110 150 f = 125 MHz DRIVER PROPAGATION DELAY (tPLHD) (ns) TEMPERATURE (° C) VCC = 3.0 V VCC = 3.3 V VCC = 3.6 V 2.8 2.5 2.2 1.9 1.6 1.3 1.0 -50 -10 30 70 110 150 f = 125 MHz DRIVER RISE TIME (10-90%) (ns) TEMPERATURE (° C) VCC = 3.0 V VCC = 3.3 V VCC = 3.6 V 2.8 2.5 2.2 1.9 1.6 1.3 1.0 -50 -10 30 70 110 150 f = 125 MHz DRIVER FALL TIME (10-90%) (ns) TEMPERATURE (° C) VCC = 3.0 V VCC = 3.3 V VCC = 3.6 V DS91M040 www.ti.com SNLS283M –FEBRUARY 2008–REVISED APRIL 2013 TypicalPerformance Characteristics Figure16.DriverRise Time as a FunctionofTemperature Figure17.DriverFallTime as a FunctionofTemperature Figure18.DriverOutput SignalAmplitude as a Functionof Figure19.DriverPropagationDelay (tPLHD)as a Function ResistiveLoad ofTemperature Figure20.DriverPropagationDelay (tPHLD)as a Function Figure21.DriverPower Supply Currentas a Functionof ofTemperature Frequency Copyright© 2008–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:DS91M040

3.8 3.5 3.2 2.9 2.6 2.3 2.0 f = 125 MHz VCC = 3.3V TA = 25° C VID = 200 mV RECEIVER PROPAGATION DELAY (tPHLD) (ns) INPUT COMMON MODE VOLTAGE (V) TYPE 2 TYPE 1 0 25 50 75 100 125 f = 125 MHz VCC = 3.3V TA = 25° C DE 0,1,2,3 = L RE*0,1,2,3 = L RECEIVER POWER SUPPLY CURRENT (mA) FREQUENCY (MHz) 3.8 3.5 3.2 2.9 2.6 2.3 2.0 f = 125 MHz VCC = 3.3V TA = 25° C VID = 200 mV RECEIVER PROPAGATION DELAY (tPLHD) (ns) INPUT COMMON MODE VOLTAGE (V) TYPE 2 TYPE 1 DS91M040 SNLS283M –FEBRUARY 2008–REVISED APRIL 2013 www.ti.com TypicalPerformance Characteristics(continued) Figure22.ReceiverPower Supply Currentas a Functionof Figure23.ReceiverPropagationDelay (tPLHD)as a Frequency FunctionofInputCommon Mode Voltage Figure24.ReceiverPropagationDelay (tPHLD)as a FunctionofInputCommon Mode Voltage

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www.ti.com SNLS283M –FEBRUARY 2008–REVISED APRIL 2013

REVISION HISTORY

Changes from RevisionL (April2013)toRevisionM Page Copyright© 2008–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:DS91M040

www.ti.com 11-Nov-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) DS91M040TSQ/NOPB Active Production WQFN (RTV) | 32 1000 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 85 M040TS DS91M040TSQ/NOPB.A Active Production WQFN (RTV) | 32 1000 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 85 M040TS DS91M040TSQE/NOPB Active Production WQFN (RTV) | 32 250 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 85 M040TS DS91M040TSQE/NOPB.A Active Production WQFN (RTV) | 32 250 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 85 M040TS DS91M040TSQX/NOPB Active Production WQFN (RTV) | 32 4500 | LARGE T&R Yes SN Level-3-260C-168 HR -40 to 85 M040TS DS91M040TSQX/NOPB.A Active Production WQFN (RTV) | 32 4500 | LARGE T&R Yes SN Level-3-260C-168 HR -40 to 85 M040TS (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

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PACKAGE MATERIALS INFORMATION www.ti.com 1-Aug-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 1-Aug-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS91M040TSQ/NOPB WQFN RTV 32 1000 208.0 191.0 35.0 DS91M040TSQE/NOPB WQFN RTV 32 250 208.0 191.0 35.0 DS91M040TSQX/NOPB WQFN RTV 32 4500 356.0 356.0 36.0 Pack Materials-Page 2

www.ti.com PACKAGE OUTLINE C 5.15 4.85 5.15 4.85 0.8 0.7 0.05 0.00 2X 3.5 28X 0.5 2X 3.5 32X 0.5 0.3 32X 0.30 0.18 3.1 0.1 (0.1) TYP WQFN - 0.8 mm max heightRTV0032A PLASTIC QUAD FLATPACK - NO LEAD 4224386/B 04/2019 0.08 C

0.1 C A B

0.05 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. PIN 1 INDEX AREA SEATING PLANE PIN 1 ID SYMMEXPOSED THERMAL PAD SYMM 9 16 2532 SCALE 2.500 AB

www.ti.com EXAMPLE BOARD LAYOUT 28X (0.5) (1.3) (1.3) (R0.05) TYP

0.07 MAX

0.07 MIN

32X (0.6) 32X (0.24) (4.8) (4.8) (3.1) (3.1) ( 0.2) TYP VIA WQFN - 0.8 mm max heightRTV0032A PLASTIC QUAD FLATPACK - NO LEAD 4224386/B 04/2019 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. SYMM SYMM SEE SOLDER MASK DETAIL LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 15X 9 16 2532 METAL EDGE SOLDER MASK OPENING EXPOSED METAL METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METAL NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS

www.ti.com EXAMPLE STENCIL DESIGN 32X (0.6) 32X (0.24) 28X (0.5) (4.8) (4.8) (0.775) TYP (0.775) TYP 4X (1.35) 4X (1.35) (R0.05) TYP WQFN - 0.8 mm max heightRTV0032A PLASTIC QUAD FLATPACK - NO LEAD 4224386/B 04/2019 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. SOLDER PASTE EXAMPLE BASED ON 0.125 MM THICK STENCIL SCALE: 20X EXPOSED PAD 33 76% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SYMM SYMM 9 16 2532

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