DS36954 Quad Differential Bus Transceiver datasheet (Rev. C)
Document overview
- Manufacturer or author: Texas Instruments, Incorporated [SNLS077,C]
- PDF pages: 19
Technical content
www.ti.com SNLS077C –JULY 1998–REVISED APRIL 2013 DS36954QuadDifferentialBusTransceiver Check forSamples: DS36954 1FEATURES DESCRIPTION The DS36954 is a low power, quad EIA-485 2• PinoutforSCSI Interface differentialbus transceiverespeciallysuitedforhigh• Compact 20-PinPLCC or SOIC Package speed, parallel,multipoint,I/O bus applications.A
- Meets EIA-485Standard forMultipointBus compact 20-pin surface mount PLCC or SOIC Transmission package provideshightransceiverintegrationand a verysmallPC boardfootprint.• Greaterthan 60 mA Source/SinkCurrents Propagationdelayskew between devicesisspecified• Thermal Shutdown Protection to aid in parallelinterfacedesigns— limitson• Glitch-FreeDriverOutputs on Power Up and maximum and minimum delaytimesareverified.Down Fivedevicescan implementa completeSCSI initiator or targetinterface.Three transceiversina package are pinnedout fordata bus connections.The fourth transceiver,with the flexibilityprovided by its individualenables, can serve as a controlbus transceiver. Connection Diagram Logic Diagram See Package Number FN (S-PQCC-J20) See Package Number DW (R-PDSO-G20) Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 1998–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.
SNLS077C –JULY 1998–REVISED APRIL 2013 www.ti.com These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates. AbsoluteMaximum Ratings (1)(2) SupplyVoltage 7V ControlInputVoltage VCC + 0.5V DriverInputVoltage VCC + 0.5V DriverOutputVoltage/ReceiverInputVoltage −10V to+15V ReceiverOutputVoltage 5.5V ContinuousPower Dissipation@ +25°C DerateFN Package 13.9mW/ °C above +25°C DerateDW Package 13.7mW/ °C above +25°C StorageTemperatureRange −65°C to+150°C Lead Temperature(Soldering4 Sec.) 260°C (1) “AbsoluteMaximum Ratings”arethosevaluesbeyond whichthesafetyofthedevicecannotbe verified.They arenotmeant toimply thatthedevicesshouldbe operatedattheselimits.The tablesof“ElectricalCharacteristics”specifyconditionsfordeviceoperation. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTexas InstrumentSalesOffice/Distributorsforavailabilityand specifications. Recommended OperatingConditions Min Max Units SupplyVoltage,VCC 4.75 5.25 V Bus Voltage −7 +12 V OperatingFreeAirTemperature(TA) 0 +70 °C ElectricalCharacteristics(1)(2) Over SupplyVoltageand OperatingTemperatureranges,unlessotherwisespecified Symbol Parameter Conditions Min Typ Max Units DRIVER CHARACTERISTICS VODL DifferentialDriverOutputVoltage(FullIL = 60 mA 1.5 1.9 V Load) VCM = 0V VOD DifferentialDriverOutputVoltage R L = 100Ω (EIA-422) 2.0 2.25 V (TerminationLoad) R L = 54Ω (EIA-485) 1.5 2.0 V ΔIVODI Change inMagnitudeofDriver R L = 54 or100Ω (3)(Figure1 )(EIA-422/485) 0.2 V DifferentialOutputVoltagefor ComplementaryOutputStates VOC DriverCommon Mode OutputVoltage R L = 54Ω (Figure1 )(EIA-485) 3.0 V(4) ΔIVOCI Change inMagnitudeofCommon (3)(Figure1 )(EIA-422/485) 0.2 VMode OutputVoltage VOH OutputVoltageHigh IOH = −55 mA 2.7 3.2 V VOL OutputVoltageLow IOL = 55 mA 1.4 1.7 V VIH InputVoltageHigh 2.0 V VIL InputVoltageLow 0.8 V VCL InputClamp Voltage ICL = −18 mA −1.5 V (1) Currentintodevicepinsisdefinedas positive.Currentoutofdevicepinsisdefinedas negative.Allvoltagesarereferencedtoground unlessotherwisespecified. (2) AlltypicalsaregivenforVCC = 5V and TA = 25°C. (3) Δ IVODI and Δ IVOCI arechanges inmagnitudeofVOD and VOC ,respectively,thatoccurwhen theinputchanges state. (4) InEIA StandardsEIA-422and EIA-485,VOC ,whichistheaverageofthetwo outputvoltageswithrespecttoground,iscalledoutput offsetvoltage,VOS .
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www.ti.com SNLS077C –JULY 1998–REVISED APRIL 2013 ElectricalCharacteristics(1)(2)(continued) Over SupplyVoltageand OperatingTemperatureranges,unlessotherwisespecified Symbol Parameter Conditions Min Typ Max Units IIH InputHighCurrent VIN = 2.4V (5) 20 μA IIL InputLow Current VIN = 0.4V (5) −20 μA IOSC DriverShort-CircuitOutputCurrent(6) VO = −7V (EIA-485) −130 −250 mA VO = 0V (EIA-422) −90 −150 mA VO = +12V (EIA-485) 130 250 mA RECEIVER CHARACTERISTICS IOSR ShortCircuitOutputCurrent VO = 0V (6) −15 −28 −75 mA IOZ TRI-STATE OutputCurrent VO = 0.4Vto2.4V 20 μA VOH OutputVoltageHigh VID = 0.2V,IOH = 0.4mA 2.4 3.0 V VOL OutputVoltageLow VID = −0.2V,IOL = 4 mA 0.35 0.5 V VTH DifferentialInputHighThreshold VO = VOH ,IO = −0.4mA (EIA-422/485) 0.03 0.2 VVoltage VTL DifferentialInputLow Threshold VO = VOL ,IO = 4.0mA (EIA-422/485) −0.2 −0.03 VVoltage(7) 0 VHST Hysteresis(8) VCM = 0V 35 60 mV DRIVER AND RECEIVER CHARACTERISTICS VIH EnableInputVoltageHigh 2.0 V VIL EnableInputVoltageLow 0.8 V VCL EnableInputClamp Voltage ICL = −18 mA −1.5 V IIN LineInputCurrent(9) OtherInput= 0V VI= +12V 0.5 1.0 mA DE/RE = 0.8V VI= −7V −0.45 −0.8 mADE4 = 0.8V IING LineInputCurrent(9) OtherInput= 0V VI= +12V 1.0 mA DE/RE and DE4 = 2V VI= −7VVCC = 3.0V −0.8 mA TA = +25°C IIH EnableInputCurrentHigh VIN = 2.4V VCC = 3.0V 1 40 μA DE/RE VCC = 4.75V 1 μA VCC = 5.25V 1 40 μA VIN = 2.4V VCC = 3.0V 1 20 μA DE4 orRE4 VCC = 5.25V 1 20 μA IIL EnableInputCurrentLow VIN = 0.8V VCC = 3.0V −6 −40 μA DE/RE VCC = 4.75V −12 μA VCC = 5.25V −14 −40 μA VIN = 0.8V VCC = 3.0V −3 −20 μA DE4 orRE4 VCC = 5.25V −7 −20 μA ICCD SupplyCurrent(10) No Load,DE/RE and DE4 = 2.0V 75 90 mA ICCR SupplyCurrent(10) No Load,DE/RE and RE4 = 0.8V 50 70 mA (5) IIH and IILincludedriverinputcurrentand receiverTRI-STATE leakagecurrenton DR(1–3). (6) Shortone outputata time. (7) Thresholdparameterlimitsspecifiedas an algebraicvalueratherthanby magnitude. (8) Hysteresisdefinedas VHST = V TH − VTL. (9) IIN includesthereceiverinputcurrentand driverTRI-STATE leakagecurrent. (10) Totalpackage supplycurrent. Copyright© 1998–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:DS36954
SNLS077C –JULY 1998–REVISED APRIL 2013 www.ti.com SwitchingCharacteristics Over SupplyVoltageand OperatingTemperatureranges,unlessotherwisespecified. Symbol Parameter Conditions Min Typ Max Units DRIVER SINGLE-ENDED CHARACTERISTICS tPZH OutputEnableTime toHighLevel R L = 110Ω (Figure6 ) 35 40 ns tPZL OutputEnableTime toLow Level (Figure8 ) 25 40 ns tPHZ OutputDisableTime toHighLevel (Figure6 ) 15 25 ns tPLZ OutputDisableTime toLow Level (Figure8 ) 35 40 ns DRIVER DIFFERENTIAL CHARACTERISTICS tr,tf Riseand FallTime R L = 54Ω 13 16 ns C L = 50 pFtPLHD DifferentialPropagation 9 15 19 nsC D = 15 pF tPHLD Delays(2) 9 12 19 ns(Figure3 Figure4 (1)) tSKD |tPLHD − tPHLD |Diff.Skew 3 6 ns RECEIVER CHARACTERISTICS tPLHD DifferentialPropagationDelays C L = 15 pF 9 14 19 ns VCM = 2.0VtPHLD 9 13 19 ns(Figure10 ) tSKD |tPLHD − tPHLD |Diff.ReceiverSkew 1 3 ns tPZH OutputEnableTime toHighLevel C L = 15 pF 15 22 ns (Figure15 )tPZL OutputEnableTime toLow Level 20 30 ns tPHZ OutputDisableTime fromHighLevel 20 30 ns tPLZ OutputDisableTime fromLow Level 17 25 ns (1) PropagationDelayTimingforCalculationsofDriverDifferentialPropagationDelays (2) Differentialpropagationdelaysarecalculatedfromsingle-endedpropagationdelaysmeasured fromdriverinputtothe20% and 80% levelson thedriveroutputs(Figure16).
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(1) (1) (2) DS36954 www.ti.com SNLS077C –JULY 1998–REVISED APRIL 2013 PARAMETER MEASUREMENT INFORMATION Figure1. DriverVOD and VOC (3) Figure2. ReceiverVOH and VOL (1) The inputpulseissuppliedby a generatorhavingthefollowingcharacteristics:f= 1.0MHz, 50% dutycycle,trandtf< 6.0ns,ZO = 50Ω (2) C L includesprobeand straycapacitance. Figure3. DriverDifferentialPropagationDelay Load Circuit (1) Differentialpropagationdelaysarecalculatedfromsingle-endedpropagationdelaysmeasured fromdriverinputtothe 20% and 80% levelson thedriveroutputs(Figure16). Figure4. DriverDifferentialPropagationDelays and TransitionTimes (3) C L includesprobeand straycapacitance. Copyright© 1998–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:DS36954
(1) (2) (1) (2) DS36954 SNLS077C –JULY 1998–REVISED APRIL 2013 www.ti.com S1 toOA forDI = 3V S1 toOB forDI = 0V (1) The inputpulseissuppliedby a generatorhavingthefollowingcharacteristics:f= 1.0MHz, 50% dutycycle,trandtf< 6.0ns,ZO = 50Ω. (2) C L includesprobeand straycapacitance. Figure5. Figure6. DriverEnable and DisableTiming (tPZH ,tPHZ ) S1 toOA forDI = 0V S1 toOB forDI = 3V (1) The inputpulseissuppliedby a generatorhavingthefollowingcharacteristics:f= 1.0MHz, 50% dutycycle,trandtf< 6.0ns,ZO = 50Ω. (2) C L includesprobeand straycapacitance. Figure7.
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(1) (2) (3)(4) (1) (2) DS36954 www.ti.com SNLS077C –JULY 1998–REVISED APRIL 2013 Figure8. DriverEnable and DisableTiming (tPZL ,tPLZ ) (1) The inputpulseissuppliedby a generatorhavingthefollowingcharacteristics:f= 1.0MHz, 50% dutycycle,trandtf< 6.0ns,ZO = 50Ω. (2) C L includesprobeand straycapacitance. Figure9. Figure10. ReceiverDifferentialPropagationDelay Timing (1) The inputpulseissuppliedby a generatorhavingthefollowingcharacteristics:f= 1.0MHz, 50% dutycycle,trandtf< 6.0ns,ZO = 50Ω. (2) C L includesprobeand straycapacitance. (3) Diodesare1N916 orequivalent. (4) On transceivers1–3 the driverisloaded withreceiverinputconditionswhen DE/RE ishigh.Do not exceed the package power dissipationlimitwhen testing. Figure11. Copyright© 1998–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:DS36954
SNLS077C –JULY 1998–REVISED APRIL 2013 www.ti.com S1 1.5V S2 Open S3 Closed Figure12. S1 −1.5V S2 Closed C3 Open Figure13. S1 1.5V S2 Closed C3 Closed Figure14. S1 −1.5V S2 Closed C3 Closed Figure15. ReceiverEnable and DisableTiming
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www.ti.com SNLS077C –JULY 1998–REVISED APRIL 2013 Tra,Trb,Tfaand Tfbarepropagationdelaymeasurements tothe20% and 80% levels. TCP = CrossingPoint Figure16. PropagationDelay Timing forCalculationsofDriverDifferentialPropagationDelays Copyright© 1998–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:DS36954
SNLS077C –JULY 1998–REVISED APRIL 2013 www.ti.com
REVISION HISTORY
Changes from RevisionB (April2013)toRevisionC Page
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www.ti.com 11-Nov-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) DS36954M/NOPB Active Production SOIC (DW) | 20 36 | TUBE Yes SN Level-3-260C-168 HR 0 to 70 DS36954 M DS36954M/NOPB.B Active Production SOIC (DW) | 20 36 | TUBE Yes SN Level-3-260C-168 HR 0 to 70 DS36954 M DS36954MX/NOPB Active Production SOIC (DW) | 20 1000 | LARGE T&R Yes SN Level-3-260C-168 HR 0 to 70 DS36954 M DS36954MX/NOPB.B Active Production SOIC (DW) | 20 1000 | LARGE T&R Yes SN Level-3-260C-168 HR 0 to 70 DS36954 M (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1
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PACKAGE MATERIALS INFORMATION www.ti.com 10-Aug-2026 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 10-Aug-2026 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS36954MX/NOPB SOIC DW 20 1000 356.0 356.0 45.0 Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 10-Aug-2026 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) DS36954M/NOPB DW SOIC 20 36 495 15 5842 7.87 DS36954M/NOPB.B DW SOIC 20 36 495 15 5842 7.87 Pack Materials-Page 3
www.ti.com PACKAGE OUTLINE C TYP10.63 9.97
2.65 MAX
18X 1.27 20X 0.51 0.31 11.43 TYP0.33 0.10 0 - 8 0.3 0.1 0.25 GAGE PLANE 1.27 0.40 A NOTE 3 13.0 12.6 B 7.6 7.4 4220724/A 05/2016 SOIC - 2.65 mm max heightDW0020A SOIC NOTES: 1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.43 mm per side. 5. Reference JEDEC registration MS-013. 1 20
0.25 C A B
0.1 C SEE DETAIL A DETAIL A TYPICAL SCALE 1.200
www.ti.com EXAMPLE BOARD LAYOUT (9.3)
0.07 MAX
0.07 MIN
20X (2) 20X (0.6) 18X (1.27) (R ) TYP 0.05 4220724/A 05/2016 SOIC - 2.65 mm max heightDW0020A SOIC SYMM SYMM LAND PATTERN EXAMPLE SCALE:6X 10 11 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METALSOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED
www.ti.com EXAMPLE STENCIL DESIGN (9.3) 18X (1.27) 20X (0.6) 20X (2) 4220724/A 05/2016 SOIC - 2.65 mm max heightDW0020A SOIC NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SYMM SYMM 10 11 SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:6X
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