DS25BR150 3.125 Gbps LVDS Buffer datasheet (Rev. E)
Document overview
- Manufacturer or author: Texas Instruments, Incorporated [SNLS257,E]
- PDF pages: 16
Technical content
www.ti.com SNLS257E –APRIL 2007–REVISED APRIL 2013 DS25BR1503.125GbpsLVDSBuffer Check forSamples: DS25BR150 1FEATURES DESCRIPTION The DS25BR150 is a singlechannel 3.125 Gbps 2• DC -3.125Gbps Low Jitter,High Noise LVDS buffer optimized for high-speed signalImmunity,Low Power Operation transmissionoverprintedcircuitboardsand balanced• On-Chip 100 Ω Inputand Output Termination cables. Fully differentialsignal paths ensure MinimizesInsertionand Return Losses, exceptionalsignalintegrityand noiseimmunity. Reduces Component Count and Minimizes The DS25BR150 is a buffer/repeaterwithvery lowBoard Space power consumption.OtherLVDS deviceswithsimilar• 7 kV ESD on LVDS I/OPins ProtectsAdjoining IO characteristicsand with signal conditioning Components features include the followingproducts. The DS25BR110 featuresfourlevelsof equalizationfor• Small 3 mm x 3 mm WSON-8 Space Saving use as an optimizedreceiverdevice,theDS25BR120Package featuresfourlevelsof pre-emphasisforuse as an optimizeddriverdevice,and theDS25BR100 featuresAPPLICATIONS both pre-emphasisand equalizationforuse as an
- Clock or Data Buffering/Repeating optimizedrepeaterdevice.
- OC-48 /STM-16 Clock or Data Buffering/ Wide inputcommon mode range allowsthereceiverRepeating to accept signalswith LVDS, CML and LVPECL
- InfiniBand levels;the outputlevelsare LVDS. A very small package footprintrequiresa minimalspace on the• FireWire boardwhiletheflow-throughpinoutallowseasy board layout.The differentialinputs and outputs are internallyterminatedwitha 100Ω resistorto lower device input and output return losses, reduce component count,and furtherminimizeboardspace. TypicalApplication Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2007–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.
SNLS257E –APRIL 2007–REVISED APRIL 2013 www.ti.com Block Diagram Pin Diagram PIN DESCRIPTION Pin Name Pin Name Pin Type Pin Description NC 1 NA "NO CONNECT" pin. IN+ 2 Input Non-invertingLVDS inputpin. IN- 3 Input InvertingLVDS inputpin. NC 4 NA "NO CONNECT" pin. NC 5 NA "NO CONNECT" pin. OUT- 6 Output InvertingLVDS outputpin. OUT+ 7 Output Non-invertingLVDS Outputpin. VCC 8 Power Power supplypin. GND DAP Power Ground pad (DAP -dieattachpad) These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates.
2 SubmitDocumentationFeedback Copyright© 2007–2013,Texas InstrumentsIncorporated
ProductFolderLinks:DS25BR150
www.ti.com SNLS257E –APRIL 2007–REVISED APRIL 2013 AbsoluteMaximum Ratings(1)(2) SupplyVoltage(VCC ) −0.3Vto+4V LVDS InputVoltage(IN+,IN−) −0.3Vto+4V DifferentialInputVoltage|VID| 1V LVDS OutputVoltage(OUT+, OUT −) −0.3Vto(VCC + 0.3V) LVDS DifferentialOutputVoltage((OUT+)-(OUT −)) 0V to1V LVDS OutputShortCircuitCurrentDuration 5 ms JunctionTemperature +150°C StorageTemperatureRange −65°C to+150°C Lead TemperatureRange Soldering(4sec.) +260°C Maximum Package Power Dissipationat NGQ Package 2.08W 25°C DerateNGQ Package 16.7mW/ °C above +25°C Package ThermalResistance θJA +60.0°C/W θJC +12.3°C/W ESD Susceptibility HBM (3) ≥7 kV MM (4) ≥250V CDM (5) ≥1250V (1) “AbsoluteMaximum Ratings”indicatelimitsbeyond whichdamage tothedevicemay occur,includinginoperabilityand degradationof devicereliabilityand/orperformance.Functionaloperationofthedeviceand/ornon-degradationattheAbsoluteMaximum Ratingsor otherconditionsbeyond thoseindicatedintheRecommended OperatingConditionsisnotimplied.The Recommended Operating Conditionsindicateconditionsatwhichthedeviceisfunctionaland thedeviceshouldnotbe operatedbeyond such conditions. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTISalesOffice/Distributorsforavailabilityand specifications. (3) Human Body Model,applicablestd.JESD22-A114C (4) Machine Model,applicablestd.JESD22-A115-A (5) FieldInducedCharge DeviceModel,applicablestd.JESD22-C101-C Recommended OperatingConditions Min Typ Max Units SupplyVoltage(VCC ) 3.0 3.3 3.6 V ReceiverDifferentialInputVoltage(VID) 0 1 V OperatingFreeAirTemperature(TA) −40 +25 +85 °C DC ElectricalCharacteristics Over recommended operatingsupplyand temperaturerangesunlessotherwisespecified.(1)(2)(3) Symbol Parameter Conditions Min Typ Max Units LVDS OUTPUT DC SPECIFICATIONS (OUT+, OUT-) VOD DifferentialOutputVoltage 250 350 450 mV R L = 100ΩΔVOD Change inMagnitudeofVOD forComplimentary -35 35 mVOutputStates VOS OffsetVoltage 1.05 1.2 1.375 V R L = 100ΩΔVOS Change inMagnitudeofVOS forComplimentary -35 35 mVOutputStates IOS OutputShortCircuitCurrent(4) OUT toGND -25 -50 mA OUT toVCC 7.5 50 mA C OUT OutputCapacitance Any LVDS OutputPintoGND 1.2 pF R OUT OutputTerminationResistor Between OUT+ and OUT- 100 Ω (1) The ElectricalCharacteristicstableslistensuredspecificationsunderthelistedRecommended OperatingConditionsexceptas otherwisemodifiedorspecifiedby theElectricalCharacteristicsConditionsand/orNotes.Typicalspecificationsareestimationsonlyand arenotensured. (2) Currentintodevicepinsisdefinedas positive.Currentoutofdevicepinsisdefinedas negative.Allvoltagesarereferencedtoground exceptVOD and ΔVOD . (3) Typicalvaluesrepresentmost likelyparametricnorms forVCC = +3.3V and TA = +25°C, and attheRecommended OperationConditions atthetimeofproductcharacterizationand arenotensured. (4) Outputshortcircuitcurrent(IOS )isspecifiedas magnitudeonly,minus signindicatesdirectiononly. Copyright© 2007–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:DS25BR150
SNLS257E –APRIL 2007–REVISED APRIL 2013 www.ti.com DC ElectricalCharacteristics(continued) Over recommended operatingsupplyand temperaturerangesunlessotherwisespecified.(1)(2)(3) Symbol Parameter Conditions Min Typ Max Units LVDS INPUT DC SPECIFICATIONS (IN+,IN-) VID InputDifferentialVoltage 0 1 V VTH DifferentialInputHighThreshold VCM = +0.05V orVCC -0.05V 0 +100 mV VTL DifferentialInputLow Threshold −100 0 mV VCMR Common Mode VoltageRange VID = 100 mV 0.05 VCC - V 0.05 VIN = 3.6Vor0V ±1 ±10 μAIIN InputCurrent VCC = 3.6Vor0V C IN InputCapacitance Any LVDS InputPintoGND 1.7 pF R IN InputTerminationResistor Between IN+ and IN- 100 Ω SUPPLY CURRENT ICC SupplyCurrent 27 35 mA AC ElectricalCharacteristics(1) Over recommended operatingsupplyand temperaturerangesunlessotherwisespecified.(2)(3) Symbol Parameter Conditions Min Typ Max Units LVDS OUTPUT AC SPECIFICATIONS (OUT+, OUT-) tPHLD DifferentialPropagationDelayHightoLow 370 520 ps R L = 100Ω tPLHD DifferentialPropagationDelayLow toHigh 355 520 ps tSKD1 PulseSkew |tPLHD − tPHLD |(4) 15 100 ps tSKD2 ParttoPartSkew (5) 45 160 ps tLHT RiseTime 80 150 ps R L = 100Ω tHLT FallTime 80 150 ps JITTER PERFORMANCE (Figure5) tDJ1 VID = 350 mV 2.5Gbps 11 33 ps DeterministicJitter(Peak-to-PeakValue)(6) VCM = 1.2VtDJ2 3.125Gbps 15 41 psK28.5(NRZ) tRJ1 VID = 350 mV 1.25GHz 0.5 1 ps Random Jitter(RMS Value)(7) VCM = 1.2VtRJ2 1.5625GHz 0.5 1 psClock(RZ) tTJ1 VID = 350 mV 2.5Gbps 0.04 0.11 UIP-P TotalJitter(PeaktoPeak Value)(8) VCM = 1.2VtTJ2 3.125Gbps 0.07 0.15 UIP-PPRBS-23 (NRZ) (1) Specificationisensuredby characterizationand isnottestedinproduction. (2) The ElectricalCharacteristicstableslistensuredspecificationsunderthelistedRecommended OperatingConditionsexceptas otherwisemodifiedorspecifiedby theElectricalCharacteristicsConditionsand/orNotes.Typicalspecificationsareestimationsonlyand arenotensured. (3) Typicalvaluesrepresentmost likelyparametricnorms forVCC = +3.3V and TA = +25°C, and attheRecommended OperationConditions atthetimeofproductcharacterizationand arenotensured. (4) tSKD1 ,|tPLHD − tPHLD |,isthemagnitudedifferenceindifferentialpropagationdelaytimebetween thepositivegoingedge and thenegative goingedge ofthesame channel. (5) tSKD2 ,ParttoPartSkew, isdefinedas thedifferencebetween theminimum and maximum specifieddifferentialpropagationdelays.This specificationappliestodevicesatthesame VCC and within5°C ofeach otherwithintheoperatingtemperaturerange. (6) Testedwitha combinationofthe1100000101 (K28.5+character)and 0011111010 (K28.5-character)patterns.Inputstimulusjitteris subtractedalgebraically. (7) Measured on a clockedge witha histogramand an accumulationof1500 histogramhits.Inputstimulusjitterissubtractedgeometrically. (8) Measured on an eye diagramwitha histogramand an accumulationof3500 histogramhits.Inputstimulusjitterissubtracted.
4 SubmitDocumentationFeedback Copyright© 2007–2013,Texas InstrumentsIncorporated
ProductFolderLinks:DS25BR150
50: Microstrip L=4" L=4" L=4" L=4" CHARACTERIZATION BOARD DS25BR150 PATTERN GENERATOR OSCILLOSCOPE 50: Microstrip 50: Microstrip 50: Microstrip R L OUT+ OUT- IN+ IN- Signal Generator R D R D R L VOL OUT+ OUT- IN+ IN- Power Supply Power Supply VOH DS25BR150 www.ti.com SNLS257E –APRIL 2007–REVISED APRIL 2013 DC TEST CIRCUITS Figure1. DifferentialDriverDC TestCircuit AC TestCircuitsand Timing Diagrams Figure2. DifferentialDriverAC TestCircuit Figure3. PropagationDelay Timing Diagram Figure4. LVDS Output TransitionTimes Figure5. JitterMeasurements TestCircuit Copyright© 2007–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:DS25BR150
150-250: 100: Differential T-Line LVDS Receiver IN+ IN- 100: LVPECL Driver 150-250: OUT+ OUT- DS25BR150 IN+ IN- 50:50: VCC CML3.3V or CML2.5V 100: Differential T-Line OUT+ OUT- DS25BR150 IN+ IN- 100: Differential T-Line LVDS DS25BR150 SNLS257E –APRIL 2007–REVISED APRIL 2013 www.ti.com Device Operation INPUT INTERFACING The DS25BR150 acceptsdifferentialsignalsand allowssimpleAC or DC coupling.With a wide common mode range,theDS25BR150 can be DC-coupledwithallcommon differentialdrivers(i.e.LVPECL, LVDS, CML). The followingthreefiguresillustratetypicalDC-coupled interfaceto common differentialdrivers.Note thatthe DS25BR150 inputsareinternallyterminatedwitha 100Ω resistor. Figure6. TypicalLVDS DriverDC-Coupled InterfacetoDS25BR150 Input Figure7. TypicalCML DriverDC-Coupled InterfacetoDS25BR150 Input Figure8. TypicalLVPECL DriverDC-Coupled InterfacetoDS25BR150 Input OUTPUT INTERFACING The DS25BR150 outputssignalsare complianttotheLVDS standard.Itcan be DC-coupledtomost common differentialreceivers.The followingfigureillustratestypicalDC-coupledinterfacetocommon differentialreceivers and assumes thatthereceivershave highimpedance inputs.Whilemost differentialreceivershave a common mode inputrange thatcan accommodate LVDS compliantsignals,itisrecommended to check the respective receiver'sdatasheetpriortoimplementingthesuggestedinterfaceimplementation.
6 SubmitDocumentationFeedback Copyright© 2007–2013,Texas InstrumentsIncorporated
ProductFolderLinks:DS25BR150
100: 100: Differential T-Line DS25BR150 DS25BR150 www.ti.com SNLS257E –APRIL 2007–REVISED APRIL 2013 Figure9. TypicalDS25BR150 Output DC-Coupled Interfacetoan LVDS, CML or LVPECL Receiver Copyright© 2007–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:DS25BR150
VCC = 3.3V TA = 25° C NRZ PRBS-7
3.125 Gbps
TOTAL RESIDUAL JITTER (ps) DIFFERENTIAL INPUT VOLTAGE (V) VICM = 1.0V VICM = 2.4V VCC = 3.3V TA = 25° C NRZ PRBS-7
2.5 Gbps
TOTAL RESIDUAL JITTER (ps) DIFFERENTIAL INPUT VOLTAGE (V) VICM = 1.0V VICM = 2.4V DS25BR150 SNLS257E –APRIL 2007–REVISED APRIL 2013 www.ti.com TypicalPerformance Characteristics Figure10.A 2.5Gbps NRZ PRBS-7 Output Eye Diagram Figure11.TotalJitteras a FunctionofInputAmplitude V:100 mV /DIV,H:75 ps /DIV Figure12.A 3.125Gbps NRZ PRBS-7 Output Eye Diagram Figure13.TotalJitteras a FunctionofInputAmplitude V:100 mV /DIV,H:50 ps /DIV
8 SubmitDocumentationFeedback Copyright© 2007–2013,Texas InstrumentsIncorporated
ProductFolderLinks:DS25BR150
www.ti.com SNLS257E –APRIL 2007–REVISED APRIL 2013
REVISION HISTORY
Changes from RevisionD (April2013)toRevisionE Page Copyright© 2007–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:DS25BR150
www.ti.com 11-Nov-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) DS25BR150TSD/NOPB Active Production WSON (NGQ) | 8 1000 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 85 2R150 DS25BR150TSD/NOPB.A Active Production WSON (NGQ) | 8 1000 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 85 2R150 (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 1-Aug-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 1-Aug-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS25BR150TSD/NOPB WSON NGQ 8 1000 208.0 191.0 35.0 Pack Materials-Page 2
www.ti.com PACKAGE OUTLINE C 8X 0.3 0.2 2 0.1 8X 0.5 0.3 1.5 1.6 0.1 6X 0.5 0.8 0.7 0.05 0.00 B 3.1 2.9 A 3.1 2.9 (0.1) TYP WSON - 0.8 mm max heightNGQ0008A PLASTIC SMALL OUTLINE - NO LEAD 4214922/A 03/2018 PIN 1 INDEX AREA SEATING PLANE 0.08 C 4 5 PIN 1 ID 0.1 C A B 0.05 C THERMAL PAD EXPOSED SYMM SYMM NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. SCALE 4.000
www.ti.com EXAMPLE BOARD LAYOUT
0.07 MIN
0.07 MAX
(1.6) 6X (0.5) (2.8) 8X (0.25) 8X (0.6) (2) (R0.05) TYP ( 0.2) VIA TYP (0.75) WSON - 0.8 mm max heightNGQ0008A PLASTIC SMALL OUTLINE - NO LEAD 4214922/A 03/2018 SYMM 4 5 SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:20X NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. SOLDER MASK OPENING SOLDER MASK METAL UNDER SOLDER MASK DEFINED EXPOSED METAL METALSOLDER MASK OPENING SOLDER MASK DETAILS NON SOLDER MASK DEFINED (PREFERRED) EXPOSED METAL
www.ti.com EXAMPLE STENCIL DESIGN 8X (0.25) 8X (0.6) 6X (0.5) (1.79) (1.47) (2.8) (R0.05) TYP WSON - 0.8 mm max heightNGQ0008A PLASTIC SMALL OUTLINE - NO LEAD 4214922/A 03/2018 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL EXPOSED PAD 9: 82% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:20X SYMM 4 5 SYMM METAL TYP9
IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, regulatory or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you fully indemnify TI and its representatives against any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale, TI’s General Quality Guidelines, or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Unless TI explicitly designates a product as custom or customer-specified, TI products are standard, catalog, general purpose devices. TI objects to and rejects any additional or different terms you may propose. IMPORTANT NOTICE Copyright © 2025, Texas Instruments Incorporated Last updated 10/2025