DS25BR120

DS25BR120 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis datasheet (Rev. E)

Document overview

• Manufacturer or author: Texas Instruments, Incorporated [SNLS256,E]
• PDF pages: 18

Technical content

www.ti.com SNLS256E –MARCH 2007–REVISED APRIL 2013 DS25BR1203.125GbpsLVDSBufferwithTransmitPre-Emphasis Check forSamples: DS25BR120 1FEATURES DESCRIPTION The DS25BR120 is a singlechannel 3.125 Gbps 2• DC -3.125Gbps Low Jitter,High Noise LVDS buffer optimized for high-speed signalImmunity,Low Power Operation transmissionover lossyFR-4 printedcircuitboard• Four LevelsofTransmitPre-Emphasis Drive backplanes and balanced metalliccables. Fully Lossy Backplanes and Cables differentialsignalpaths ensure exceptionalsignal integrityand noiseimmunity.• On-Chip 100Ω Inputand Output Termination MinimizesInsertionand Return Losses, The DS25BR120 featuresfourlevelsofpre-emphasisReduces Component Count,and Minimizes (PE) foruse as an optimizeddriverdevice.Other Board Space LVDS deviceswithsimilarIO characteristicsinclude thefollowingproducts.The DS25BR110 featuresfour• 7 kV ESD on LVDS I/OpinsProtectsAdjoining levelsofequalizationforuse as an optimizedreceiverComponents device,while the DS25BR100 featuresboth pre-• Small 3 mm x 3 mm 8-WSON Space Saving emphasis and equalizationforuse as an optimizedPackage repeaterdevice.The DS25BR150 isa buffer/repeater with the lowestpower consumption and does not APPLICATIONS feature transmit pre-emphasis nor receive equalization.• Clock and Data Buffering

• MetallicCable Driving Wide inputcommon mode range allowsthereceiver to accept signalswith LVDS, CML and LVPECL• FR-4 Driving levels;the outputlevelsare LVDS. A very small package footprintrequiresminimal space on the boardwhiletheflow-throughpinoutallowseasy board layout.The differentialinputs and outputs are internallyterminatedwitha 100Ω resistorto lower device input and output return losses, reduce component countand furtherminimizeboardspace. TypicalApplication Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Alltrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2007–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

SNLS256E –MARCH 2007–REVISED APRIL 2013 www.ti.com Block Diagram Pin Diagram PIN DESCRIPTIONS Pin Name Pin Name Pin Type Pin Description PE1 1 Input Pre-emphasisselectpin. IN+ 2 Input Non-invertingLVDS inputpin. IN- 3 Input InvertingLVDS inputpin. PE0 4 Input Pre-emphasisselectpin. NC 5 NA "NO CONNECT" pin. OUT- 6 Output InvertingLVDS outputpin. OUT+ 7 Output Non-invertingLVDS Outputpin. VCC 8 Power Power supplypin. GND DAP Power Ground pad (DAP -dieattachpad) Pre-Emphasis TruthTable PE1 PE0 Pre-emphasis Level 0 0 Off 0 1 Low (Approx.3 dB at1.56GHz) 1 0 Medium (Approx.6 dB at1.56GHz) 1 1 High(Approx.9 dB at1.56GHz) These deviceshave limitedbuilt-inESD protection.The leadsshouldbe shortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamage totheMOS gates.

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www.ti.com SNLS256E –MARCH 2007–REVISED APRIL 2013 AbsoluteMaximum Ratings(1)(2) SupplyVoltage(VCC ) −0.3Vto+4V LVCMOS InputVoltage(PE0,PE1) −0.3Vto(VCC + 0.3V) LVDS InputVoltage(IN+,IN−) −0.3Vto+4V DifferentialInputVoltage|VID| 1.0V LVDS OutputVoltage(OUT+, OUT −) −0.3Vto(VCC + 0.3V) LVDS DifferentialOutputVoltage((OUT+)-(OUT −)) 0V to1.0V LVDS OutputShortCircuitCurrentDuration 5 ms JunctionTemperature +150°C StorageTemperatureRange −65°C to+150°C Lead TemperatureRange Soldering(4sec.) +260°C Maximum Package Power Dissipationat25°C DerateNGQ Package 16.7mW/ °C above +25°C Package ThermalResistance θJA +60.0°C/W θJC +12.3°C/W ESD Susceptibility HBM (3) ≥7 kV MM (4) ≥250V CDM (5) ≥1250V (1) “AbsoluteMaximum Ratings”indicatelimitsbeyond whichdamage tothedevicemay occur,includinginoperabilityand degradationof devicereliabilityand/orperformance.Functionaloperationofthedeviceand/ornon-degradationattheAbsoluteMaximum Ratingsor otherconditionsbeyond thoseindicatedintheRecommended OperatingConditionsisnotimplied.The Recommended Operating Conditionsindicateconditionsatwhichthedeviceisfunctionaland thedeviceshouldnotbe operatedbeyond such conditions. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTISalesOffice/Distributorsforavailabilityand specifications. (3) Human Body Model,applicablestd.JESD22-A114C (4) Machine Model,applicablestd.JESD22-A115-A (5) FieldInducedCharge DeviceModel,applicablestd.JESD22-C101-C Recommended OperatingConditions Min Typ Max Units SupplyVoltage(VCC ) 3.0 3.3 3.6 V ReceiverDifferentialInputVoltage(VID) 0 1.0 V OperatingFreeAirTemperature(TA) −40 +25 +85 °C ElectricalCharacteristics Over recommended operatingsupplyand temperaturerangesunlessotherwisespecified.(1)(2)(3) Symbol Parameter Conditions Min Typ Max Units LVCMOS INPUT DC SPECIFICATIONS (PE0,PE1) VIH HighLevelInputVoltage 2.0 VCC V VIL Low LevelInputVoltage GND 0.8 V IIH HighLevelInputCurrent VIN = 3.6V 0 ±10 μA VCC = 3.6V IIL Low LevelInputCurrent VIN = GND 0 ±10 μA VCC = 3.6V (1) The ElectricalCharacteristicstableslistensuredspecificationsunderthelistedRecommended OperatingConditionsexceptas otherwisemodifiedorspecifiedby theElectricalCharacteristicsConditionsand/orNotes.Typicalspecificationsareestimationsonlyand arenotensured. (2) Currentintodevicepinsisdefinedas positive.Currentoutofdevicepinsisdefinedas negative.Allvoltagesarereferencedtoground exceptVOD and ΔVOD . (3) Typicalvaluesrepresentmost likelyparametricnorms forVCC = +3.3V and TA = +25°C, and attheRecommended OperationConditions atthetimeofproductcharacterizationand arenotensured. Copyright© 2007–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:DS25BR120

SNLS256E –MARCH 2007–REVISED APRIL 2013 www.ti.com ElectricalCharacteristics(continued) Over recommended operatingsupplyand temperaturerangesunlessotherwisespecified.(1)(2)(3) Symbol Parameter Conditions Min Typ Max Units VCL InputClamp Voltage ICL = −18 mA, VCC = 0V -0.9 −1.5 V LVDS OUTPUT DC SPECIFICATIONS (OUT+, OUT-) VOD DifferentialOutputVoltage 250 350 450 mV R L = 100ΩΔVOD Change inMagnitudeofVOD forComplimentary -35 35 mVOutputStates VOS OffsetVoltage 1.05 1.2 1.375 V R L = 100ΩΔVOS Change inMagnitudeofVOS forComplimentary -35 35 mVOutputStates IOS OutputShortCircuitCurrent(4) OUT toGND -35 -55 mAPE0 = PE1 = 0 OUT toVCC 7 55 mAPE0 = PE1 = 0 C OUT OutputCapacitance Any LVDS OutputPintoGND 1.2 pF R OUT OutputTerminationResistor Between OUT+ and OUT- 100 Ω LVDS INPUT DC SPECIFICATIONS (IN+,IN-) VID InputDifferentialVoltage 0 1 V VTH DifferentialInputHighThreshold VCM = +0.05V orVCC -0.05V 0 +100 mV VTL DifferentialInputLow Threshold −100 0 mV VCMR Common Mode VoltageRange VID = 100 mV 0.05 VCC - V 0.05 VIN = 3.6Vor0V ±1 ±10 μAIIN InputCurrent VCC = 3.6Vor0V C IN InputCapacitance Any LVDS InputPintoGND 1.7 pF R IN InputTerminationResistor Between IN+ and IN- 100 Ω SUPPLY CURRENT ICC SupplyCurrent PE0 = 0,PE1 = 0 35 43 mA (4) Outputshortcircuitcurrent(IOS )isspecifiedas magnitudeonly,minus signindicatesdirectiononly. AC ElectricalCharacteristics(1) Over recommended operatingsupplyand temperaturerangesunlessotherwisespecified.(2)(3) Symbol Parameter Conditions Min Typ Max Units LVDS OUTPUT AC SPECIFICATIONS (OUT+, OUT-) tPHLD DifferentialPropagationDelayHightoLow 350 465 ps R L = 100Ω tPLHD DifferentialPropagationDelayLow toHigh 350 465 ps tSKD1 PulseSkew |tPLHD − tPHLD |(4) 45 100 ps tSKD2 ParttoPartSkew (5) 45 150 ps tLHT RiseTime 80 150 ps R L = 100Ω tHLT FallTime 80 150 ps (1) Specificationisensuredby characterizationand isnottestedinproduction. (2) The ElectricalCharacteristicstableslistensuredspecificationsunderthelistedRecommended OperatingConditionsexceptas otherwisemodifiedorspecifiedby theElectricalCharacteristicsConditionsand/orNotes.Typicalspecificationsareestimationsonlyand arenotensured. (3) Typicalvaluesrepresentmost likelyparametricnorms forVCC = +3.3V and TA = +25°C, and attheRecommended OperationConditions atthetimeofproductcharacterizationand arenotensured. (4) tSKD1 ,|tPLHD − tPHLD |,isthemagnitudedifferenceindifferentialpropagationdelaytimebetween thepositivegoingedge and thenegative goingedge ofthesame channel. (5) tSKD2 ,ParttoPartSkew, isdefinedas thedifferencebetween theminimum and maximum specifieddifferentialpropagationdelays.This specificationappliestodevicesatthesame VCC and within5°C ofeach otherwithintheoperatingtemperaturerange.

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www.ti.com SNLS256E –MARCH 2007–REVISED APRIL 2013 AC ElectricalCharacteristics(1)(continued) Over recommended operatingsupplyand temperaturerangesunlessotherwisespecified.(2)(3) Symbol Parameter Conditions Min Typ Max Units JITTER PERFORMANCE WITH PE = OFF PE0 = 0,PE1 = 0 tDJ1A VID = 350 mV 2.5Gbps 9 31 ps DeterministicJitter(PeaktoPeak) VCM = 1.2VtDJ2A No TestChannels(7) K28.5(NRZ) 3.125Gbps 16 40 ps PE0 = 0,PE1 = 0 tTJ1A VID = 350 mV 2.5Gbps 0.05 0.13 UIP-P TotalJitter(PeaktoPeak) VCM = 1.2VtTJ2A No TestChannels(8) PRBS-23 (NRZ) 3.125Gbps 0.09 0.16 UIP-P PE0 = 0,PE1 = 0 JITTER PERFORMANCE WITH PE = LOW (Figure5 and Figure6) tRJ1B VID = 350 mV 2.5Gbps 0.5 1.3 ps Random Jitter(RMS Value) VCM = 1.2VtRJ2B TestChannelA (6) Clock(RZ) 3.125Gbps 0.5 1.3 ps PE0 = 1,PE1 = 0 tDJ1B VID = 350 mV 2.5Gbps 17 31 ps DeterministicJitter(PeaktoPeak) VCM = 1.2VtDJ2B TestChannelA (7) K28.5(NRZ) 3.125Gbps 18 40 ps PE0 = 1,PE1 = 0 tTJ1B VID = 350 mV 2.5Gbps 0.09 0.14 UIP-P TotalJitter(PeaktoPeak) VCM = 1.2VtTJ2B TestChannelA (8) PRBS-23 (NRZ) 3.125Gbps 0.12 0.19 UIP-P PE0 = 1,PE1 = 0 JITTER PERFORMANCE WITH PE = MEDIUM (Figure5 and Figure6) tRJ1C VID = 350 mV 2.5Gbps 0.5 1.2 ps Random Jitter(RMS Value) VCM = 1.2VtRJ2C TestChannelB (6) Clock(RZ) 3.125Gbps 0.5 1.2 ps PE0 = 0,PE1 = 1 tDJ1C VID = 350 mV 2.5Gbps 21 44 ps DeterministicJitter(PeaktoPeak) VCM = 1.2VtDJ2C TestChannelB (7) K28.5(NRZ) 3.125Gbps 27 48 ps PE0 = 0,PE1 = 1 tTJ1C VID = 350 mV 2.5Gbps 0.09 0.16 UIP-P TotalJitter(PeaktoPeak) VCM = 1.2VtTJ2C TestChannelB (8) PRBS-23 (NRZ) 3.125Gbps 0.13 0.23 UIP-P PE0 = 0,PE1 = 1 JITTER PERFORMANCE WITH PE = HIGH (Figure5 and Figure6) tRJ1D VID = 350 mV 2.5Gbps 0.5 1.2 ps Random Jitter(RMS Value) VCM = 1.2VtRJ2D TestChannelC (6) Clock(RZ) 3.125Gbps 0.5 1.2 ps PE0 = 1,PE1 = 1 tDJ1D VID = 350 mV 2.5Gbps 30 65 ps DeterministicJitter(PeaktoPeak) VCM = 1.2VtDJ2D TestChannelC (7) K28.5(NRZ) 3.125Gbps 30 58 ps PE0 = 1,PE1 = 1 tTJ1D VID = 350 mV 2.5Gbps 0.09 0.20 UIP-P TotalJitter(PeaktoPeak) VCM = 1.2VtTJ2D TestChannelC (8) PRBS-23 (NRZ) 3.125Gbps 0.13 0.22 UIP-P PE0 = 1,PE1 = 1 (6) Measured on a clockedge witha histogramand an accumulationof1500 histogramhits.Inputstimulusjitterissubtractedgeometrically. (7) Testedwitha combinationofthe1100000101 (K28.5+character)and 0011111010 (K28.5-character)patterns.Inputstimulusjitteris subtractedalgebraically. (8) Measured on an eye diagramwitha histogramand an accumulationof3500 histogramhits.Inputstimulusjitterissubtracted. Copyright© 2007–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:DS25BR120

50: MS 50: MS 50: MS 50: MS L=4" L=4" L=4" L=4" TEST CHANNEL CHARACTERIZATION BOARD DS25BR120 PATTERN GENERATOR OSCILLOSCOPE R L OUT+ OUT- IN+ IN- Signal Generator R D R D R L VOL OUT+ OUT- IN+ IN- Power Supply Power Supply VOH DS25BR120 SNLS256E –MARCH 2007–REVISED APRIL 2013 www.ti.com

APPLICATION INFORMATION

Figure1. DifferentialDriverDC TestCircuit AC TEST CIRCUITS AND TIMING DIAGRAMS Figure2. DifferentialDriverAC TestCircuit Figure3. PropagationDelay Timing Diagram Figure4. LVDS Output TransitionTimes PRE-EMPHASIS TEST CIRCUITS Figure5. Pre-emphasis Performance TestCircuit

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100: Differential T-Line LVDS 50: MS 50: MS 50: MS 50: MS L=1" L=1" L=1"L=1" L = A, B or C 100: Diff. Stripline DS25BR120 www.ti.com SNLS256E –MARCH 2007–REVISED APRIL 2013 Figure6. TestChannel Description TestChannel Loss Characteristics The testchannelwas fabricatedwithPolycladPCL-FR-370-Laminate/PCL-FRP-370Prepregmaterials(Dielectric constantof3.7and Loss Tangentof0.02).The edge coupleddifferentialstriplineshave thefollowinggeometries: TraceWidth(W) = 5 mils,Gap (S)= 5 mils,Height(B)= 16 mils. TestChannel Length InsertionLoss (dB) (inches) 500 MHz 750 MHz 1000 MHz 1250 MHz 1500 MHz 1560 MHz Device Operation INPUT INTERFACING The DS25BR120 acceptsdifferentialsignalsand allowssimpleAC or DC coupling.With a wide common mode range,theDS25BR120 can be DC-coupledwithallcommon differentialdrivers(i.e.LVPECL, LVDS, CML). The followingthreefiguresillustratetypicalDC-coupled interfaceto common differentialdrivers.Note thatthe DS25BR120 inputsareinternallyterminatedwitha 100Ω resistor. Figure7. TypicalLVDS DriverDC-Coupled InterfacetoDS25BR120 Input Copyright© 2007–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:DS25BR120

100: 100: Differential T-Line DS25BR120 OUT+ OUT- 150-250: 100: Differential T-Line LVDS Receiver IN+ IN- 100: LVPECL Driver 150-250: OUT+ OUT- DS25BR120 IN+ IN- 50:50: VCC CML3.3V or CML2.5V 100: Differential T-Line DS25BR120 SNLS256E –MARCH 2007–REVISED APRIL 2013 www.ti.com Figure8. TypicalCML DriverDC-Coupled InterfacetoDS25BR120 Input Figure9. TypicalLVPECL DriverDC-Coupled InterfacetoDS25BR120 Input OUTPUT INTERFACING The DS25BR120 outputssignalscompliantto the LVDS standard.Itcan be DC-coupled to most common differentialreceivers.The followingfigureillustratestypicalDC-coupledinterfacetocommon differentialreceivers and assumes thatthereceivershave highimpedance inputs.Whilemost differentialreceivershave a common mode inputrange thatcan accommodate LVDS compliantsignals,itisrecommended to check the respective receiver'sdatasheetpriortoimplementingthesuggestedinterfaceimplementation. Figure10. TypicalDS25BR120 Output DC-Coupled Interfacetoan LVDS, CML or LVPECL Receiver

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4.50 3.75 3.00 2.25 1.50 0.75 0 6 12 18 24 30 VCC = 3.3V TA =25° C NRZ PRBS-7 TJ = 0.5 UI Maximum Data Rate (Gbps) CAT5e LENGTH (m) w/ PE and/or EQ w/o PE and EQ VCC = 3.3V TA = 25° C SUPPLY CURRENT (mA) FREQUENCY (GHz) PE = Off PE = Low PE = Medium PE = High 4.50 3.75 3.00 2.25 1.50 0.75 0 3 6 9 12 15 VCC = 3.3V TA = 25° C NRZ PRBS-7 TJ = 0.25 UI MAXIMUM DATA RATE (Gbps) CAT7 LENGTH (m) w/o PE w/ PE 4.50 3.75 3.00 2.25 1.50 0.75 0 6 12 18 24 30 VCC = 3.3V TA = 25° C NRZ PRBS-7 TJ = 0.25 UI MAXIMUM DATA RATE (Gbps) CAT5e LENGTH (m) w/ PE and/or EQ w/o PE and EQ 4.50 3.75 3.00 2.25 1.50 0.75 0 3 6 9 12 15 VCC = 3.3V TA = 25° C NRZ PRBS-7 TJ = 0.25 UI MAXIMUM DATA RATE (Gbps) CAT5e LENGTH (m) w/o PE w/ PE DS25BR120 www.ti.com SNLS256E –MARCH 2007–REVISED APRIL 2013 TYPICAL PERFORMANCE CHARACTERISTICS Figure11.Maximum Data Rate as a FunctionofCAT5e Figure12.Maximum Data Rate as a FunctionofCAT5e (Belden1700A) Length (Belden1700A) Length DS25BR120 Used as a Driver DS25BR110 Used as a Receiver Figure13.Power Supply Currentas a Functionof Figure14.Maximum Data Rate as a FunctionofCAT7 Frequency (Siemon Tera)Length Figure15.Maximum Data Rate as a FunctionofCAT5e (Belden1700A) Length DS25BR120 Used as a Driver DS25BR110 Used as a Receiver Copyright© 2007–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:DS25BR120

SNLS256E –MARCH 2007–REVISED APRIL 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) Figure16.A 2.5Gbps NRZ PRBS-7 After40" Figure17.A 3.125Gbps NRZ PRBS-7 After40" DifferentialFR-4 Stripline DifferentialFR-4 Stripline V:125 mV /DIV,H:75 ps /DIV V:125 mV /DIV,H:50 ps /DIV Figure18.An Equalized(withPE) 2.5Gbps NRZ PRBS-7 Figure19.An Equalized(withPE) 3.125Gbps NRZ PRBS-7 After40" After40" DifferentialFR-4 Stripline DifferentialFR-4 Stripline V:125 mV /DIV,H:75 ps /DIV V:125 mV /DIV,H:50 ps /DIV

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REVISION HISTORY

Changes from RevisionD (April2013)toRevisionE Page Copyright© 2007–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:DS25BR120

www.ti.com 1-Nov-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) DS25BR120TSD/NOPB Active Production WSON (NGQ) | 8 1000 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 85 2R120 DS25BR120TSD/NOPB.A Active Production WSON (NGQ) | 8 1000 | SMALL T&R Yes SN Level-3-260C-168 HR -40 to 85 2R120 DS25BR120TSD/NOPB.B Active Production WSON (NGQ) | 8 1000 | SMALL T&R - Call TI Call TI -40 to 85 (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 1-Aug-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 1-Aug-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS25BR120TSD/NOPB WSON NGQ 8 1000 208.0 191.0 35.0 Pack Materials-Page 2

www.ti.com PACKAGE OUTLINE C 8X 0.3 0.2 2 0.1 8X 0.5 0.3 1.5 1.6 0.1 6X 0.5 0.8 0.7 0.05 0.00 B 3.1 2.9 A 3.1 2.9 (0.1) TYP WSON - 0.8 mm max heightNGQ0008A PLASTIC SMALL OUTLINE - NO LEAD 4214922/A 03/2018 PIN 1 INDEX AREA SEATING PLANE 0.08 C 4 5 PIN 1 ID 0.1 C A B 0.05 C THERMAL PAD EXPOSED SYMM SYMM NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. SCALE 4.000

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0.07 MIN

0.07 MAX

(1.6) 6X (0.5) (2.8) 8X (0.25) 8X (0.6) (2) (R0.05) TYP ( 0.2) VIA TYP (0.75) WSON - 0.8 mm max heightNGQ0008A PLASTIC SMALL OUTLINE - NO LEAD 4214922/A 03/2018 SYMM 4 5 SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:20X NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. SOLDER MASK OPENING SOLDER MASK METAL UNDER SOLDER MASK DEFINED EXPOSED METAL METALSOLDER MASK OPENING SOLDER MASK DETAILS NON SOLDER MASK DEFINED (PREFERRED) EXPOSED METAL

www.ti.com EXAMPLE STENCIL DESIGN 8X (0.25) 8X (0.6) 6X (0.5) (1.79) (1.47) (2.8) (R0.05) TYP WSON - 0.8 mm max heightNGQ0008A PLASTIC SMALL OUTLINE - NO LEAD 4214922/A 03/2018 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL EXPOSED PAD 9: 82% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:20X SYMM 4 5 SYMM METAL TYP9

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