Summary
72-Mbit QDR짰II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) with ODT
Description
72-Mbit QDR짰II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) with ODT
Source title
CY7C2544KV18 Datasheet(PDF) - Cypress Semiconductor