Summary
36-Mbit QDR짰 II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT
Description
36-Mbit QDR짰 II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT
Source title
CY7C2265KV18-400BZXI Datasheet(PDF) - Cypress Semiconductor