Summary
144-Mbit QDR짰 II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency)
Description
144-Mbit QDR짰 II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency)
Source title
CY7C1663KV18-550BZXC Datasheet(PDF) - Cypress Semiconductor