CP188V CENTRAL
Document overview
- Manufacturer or author: Provided By www.digicamel.com(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 2
Technical content
GROSS DIE PER 4 INCH WAFER 54,599 PROCESS CP188V Small Signal Transistor NPN - Low Noise Amplifier Transistor Chip Process EPITAXIAL PLANAR Die Size 14.6 x 14.6 MILS Die Thickness 7.1 MILS Base Bonding Pad Area 3.9 x 3.9 MILS Emitter Bonding Pad Area 5.5 x 5.5 MILS Top Side Metalization Al - 30,000Å Back Side Metalization Au-As - 18,000Å BACKSIDE COLLECTOR R1 www.centralsemi.com R0 (31-March 2010)
Typical Electrical Characteristics www.centralsemi.com R0 (31-March 2010)