Summary
CMOS Dual J-K Master-Slave Flip-Flop December 1992
Description
CD4027BMS is a single monolithic chip integrated circuit containing two identical complementary-symmetry J-K master slave flip-flops. Each flip-flop has provisions for individual J, K, Set Reset, and Clock input signals. Buffered Q and Q signals are provided as outputs. This input-output arrangement provides for compatible operation with the Intersil CD4013B dual D type flip-flop.
Source title
CD4027 Datasheet(PDF) - Intersil Corporation