Summary
Dual Digitally Programmable Potentiometers (DPP?? with 256 Taps and SPI Interface Doc. No. MD-2122 Rev. G
Description
The CAT5261 is two digital POTs integrated with control logic and 8 bytes of NVRAM memory. Each digital POT consists of a series of resistive elements connected between two externally accessible end points. The tap points between each resistive element are connected to the wiper outputs with CMOS switches. A separate 8-bit control register (WCR) independently controls the wiper tap switches for each digital POT. Associated with each wiper control register are four 8-bit non-volatile memory data registers (DR) used for storing up to four wiper settings. Writing to the wiper control register or any of the non-volatile data registers is via a SPI serial bus. On power-up, the contents of the first data register (DR0) for each of the potentiometers is automatically loaded into its respective wiper control register.