CA3493A

CA3493A ETC1

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Operational Amplifiers — 0 CA3493A, CA3493 BiMOS Precision Operational Amplifier Features: # Low Vio: 200 pV max. (CA3493A) 500 uV max. (CA3493) ® Low AVio/AT: 3uV/°C max. (CA3493A) 5 uV/°C max. (CA3493) # Low ho and h ® Low Alio/AT: 150 pA/® C max. (CA3493) = Low Ali/AT: 3.7 nA/°C max. (CA3493) The CA3493A and CA3493 are ultra-stable, precision- Applications: instrumentation, operational amplifiers that employ both = Thermocouple preamplifiers PMOS and bipolar transistors on a single monolithic chip. # Strain-gauge bridge amplitiers The CA3493A and CA3493 amplifiers are internally phase- ® Summing amplifiers compensated and provide a gain-bandwidth product of 1.2 = Differential amplifiers MHz. They are pin-compatible with many industrial types = Bilateral current sources such as 725, 108A, OP-6, OP-7, LM11 and LM714 where = Log amplifiers positive nulling is employed. © Differential voltmeters Because of their low offset voltage and low offset voltage- ® Precision voltage references versus-temperature coefficient, the CA3493A and CA3493 8 Active filters amplifiers have a wider range of applications than most op = Buffers amps and are particularly well suited for use as thermo- = Integrators couple amplifiers, high-gain filters, buffers, strain-gauge ‘= Sample-and-hold circuits bridge amplifiers and precision voltage references. = Low frequency filters These op ampsare functionally identical. The CA3493A and CA3493 operate from supply voltages of +3.5 V to +18 V and have operating temperature ranges of 0°C to +70°C and -25°C to +85°C, respectively. These types are supplied in standard 8-lead TO-5-style (T suffix), 8-lead dual-in-line formed lead TO-5-styie (DIL- CAN S suffix) and 8-lead dual-in-line plastic (Mini-DIP E suffix) packages. Circuit Description ‘The block diagram of the CA3493 amplifier, Fig. 2, shows the voltage gain and supply current for each of its four amplifier stages. Simplified and complete schematic diagrams of the CA3493 amplifier are shown in Figs. 3and 4, respectively. File Number 1290 414

CA3493A, CA3493 Absolute-Maximum Ratings, Absolute-Maximum Values at Ta =25°C CAS493A casaea Common-Mode DC Input Voltage tee eee (Vt -4,V~ (Vt~4,V~ OV Device Dissipation Without Heat Sink Up to 65°C 2 ee weer sees 630 630 mW ‘Above 55°C eee Derate Linearly 6.67 mwi'c Temperature Range . tetas . —25 to 85 Oto 70°C Output Short-Circuit Duration* .. . teens . Indefinite Indefinite Lead Temperature (Ouring Soldering) at distance of 1/16 in. + 1/32 in. (1.59 + 0.79 mm) from case for 10 or vew corset Tl ue 0° view 24@— > Oareer win HO rend ae of e nowsiw GY Ne ve Ne tur @ NOTE. i 418 CONNECTED TO case e surrm 8 ano T SUFFIX sacs 3660 sacs: 29689 Fig. 1 - Functional diagram of CA3493A and CA9493. 2308 IAS WETWORK on SHAY 960 48 600 uk input |&=2000; 0) == - © © ® ores v NUL 9208-3366) Fig. 2 - Block diagram of CA3493A and CA9493, Cireult Description (cont'd) overall offsetvoltage characteristics of the amplifier. High load impedances for , : the input-stage differential pair (Q1,Q2) A quad of physically cross-connected are provided by the cascode-connected n-pa transistors comprise the input-stage differential pair (Q1,2 in Figs. 3 and 4), PNP, transistors 3.05 and 04,06, this arrangement contributes to the low bred a4 treat fo the high gain input offset-voltage characteristics of the Weloped In lage. amplifier. The ultrarhigh gain provided in The second stage of the amplifier con- the first stage ensures that subsequent _sists of a differential amplifier employing stages cannot significantly influence the PMOS/FETs (Q7,Q8 in Figs. 3. and 4) with eee tts

Operational Amplifiers — CA3493A, CA3493 ELECTRICAL CHARACTERISTICS at Ta = 25°C, V+ =15 V and V- =15V unless otherwise specified. [twits Seacsiee | cunacrenene [oa | Max.[ Min.[ Typ. | Max} input Offset [erage tig. | = | 2] | =| 9] so] | Input Offset Voit- age Temp.Coeffi- cient, AVjo/AT (Over specified 1 1 aviee temperature range for each device) Input Offset Current, Ho % [Iliol @ MaxTemp.[ — [ — [oa fT — T= ToT na | Input Offset Current Temp. Coefficient, Alig/AT (Over nA specified temp- erature range for each device Input Bias Current, feprewrcwren | — [oo [| - | [| os | [tel @ Max.temp. [ — [ — [3 [ — | — [aor] na | Input Bias Current Temp. 7 = [ofl alyat Input Noise Voltage, en pp WV pp (0.1 to 10 Hz) Input Noise Voit- age Density, en fo =10 Hz fo = 100 Hz fo = 1000 Hz AV fo = 10 kHz Viz fo = 100 kHz Input Noise Current, in p-p 2 PAp-p (0.1 to 10 Hz) Input Noise Cur- rent Density, in fo =10 Hz 0.83 0.83 fo =100 Hz 0.80 0.80 fo = 1000 Hz 0.75 0.75 pA fo =10 kHz 0.72 0.72 Viz fo = 100 kHz 0.60 0.60 416

—_—SSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSSFSFSSSF Operational Amplifiers CA3493A, CA3493 ELECTRICAL CHARACTERISTICS at Ta=25°C, V+ =15VandV-=15V (Cont'd) unless otherwise specified. cHaracteRistic| __CAasasga__[__CAa493_ UNITS ‘Common-Mode =135 ff ” ‘ Range, VICR 115 ‘Common-Mode Feceran Pe eae wouswion | [fee] [88 [2 [ay] Power Supply Re- PSRR, 10 [= | 10 | wiv AVig/4v + Maximum Output (RL22 KQ) Targe-Signal Voltage Gain Wo = #10) RL>1 KQ = _ RL>2 KQ 110 | 115 Ry>10 Ka = | 125 Short-Circuit Output Current to] 95] 27 | 95 | 25] +7 the Opposite Rail, lom +, !om — Slew Rate, SR } (R22 Ka; Unity Gain vue Voltage Follower) Gain-Bandwidth Product, ft Aol =0d8 RL=2kQ 1.20 1.20 CL = 100 pF Vin =20 f=1 kHz ‘Smail-Signal Transient Re- sponse, tr (VIN = 20 MV p-P. f=1kHz Supply Current, RL=© 23 | 35 23 | 35 v+=15, V- =-15 fe EERE EE Range a

Operational Amplifiers a eeSseseeeeeSSSSSSSSSSSSSSSSSSe CA3493A, CA3493 ov 7 8 © J | ok pet @ourrur os co a | az, fale nour ° =!) mo Owl a = a Fig. 9 - CA9499 simpilied schematic dlagram. (o) Ps Al 20 | cy “e 7 — y a8) 96 Cant o2oJ @x- Fig. 4 - Schematic diagram of CA3493A and CA3493. 416

a eeeeCéO peerrational Amplifiers: CA3493A, CA3493 Circult Description (cont'd) across the 60-0hm resistors adjacent to the output terminal (R9 and R10, Fig. 4). appropriate drain loading. Since Q7 and When the voltage drop developed across Q8 are MOS/FETs, their loading on the either of these resistors reaches a poten- first stage is quite low, thereby making an tial equal to 1 Ve. the respective protec: additional contribution to the high gain tive transistor (Q12 or Q13) is activated developed in the first stage. The second and shunts the base drive from the bases. stage is also configured to convert its dif- Of the output stage transistors (Q14 and ferential signal to a single-ended soteut Q15,Q16). signal by means of current mirror D9,Q30 Internal fre ns quency compensation for the figs. 3 and 4) to drive subsequent gain CA3493 amplifier is provided by two in- ge. ternal networks, a 6-pF capacitor con- The third stage of the amplifier consists nected between the input-stage transistor of Darlington-connected n-p-n transistors collectors and the node between the third (Q17,Q19 in Figs. 3 and 4), driving the and output stages and a second network, quasi-complementary Class AB output consisting of a 20-pF capacitor in series stage (Q14 and Q15,Q16 in Figs. 3 and 4). with a 7.5-KQ resistor connected between Output-stage short-circuit protection is the input and output nodes of the third activated by voltage drops developed stage. SEARS Fe . Se ; ESS ae | Fig. - Typical input oftset-voltage temperature characteristic for CA3493A and CA3493. Fig. 6 — Input offset voltage vs. time. cee ea gee ne ae tera nel ee EEE PRM rrssassssacrrsa sesssesesesessstssaesesssesies sesh | Ee costs Weees pesbs tsbesteasesesee betes sters] Fie seessaceeeeeseetsseeeictaatcce tsetttattiet DM Ase ee ese area ate b PSRSSHSeisucdie! © /2 SepS Sea R ea ic Raa aneHseisetieat peeens seeusecast 5 HELENE STEN SESE ST fe ES SS erties | GSES ASS STEERS eects iecied |! eae ee gaa

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FE ESRESTPNSE (Bee eociscts) |p ESSE ae eel Bese etter sea ee ae SUE Lies Fig. 7 — Typical input bias current vs. tempera: Fig. 8 — Typical input offset current vs. twe temperature 419

CA3493A, CA3493 ee ser gent et Pe Vamarseeace (Ee Py Hn Peeuceeeel | Ae Ean a F PERSE ds ise eset ip et ot HEHE i. vt Te ee a i 3p REESE Hoe BS Pace cuales ariets! An al CEE Se] Fig.9— Input noise voltage and cient” density vs. frequency. Fig. 10 — Power supply voltage (V+,V—) vs. zs — = supply current. 1 8 jovene ssettapees tanta, Tt pisestaagesace Soscel Fig. 11 ~ Open-loop gain and phase-shitt POWER SUPPLY WORTAGE IVS. IV sce seen reeponse for Cx3499 Fig. 12 — Open oop gain v2. powersupply te vouege Pm etn i Eee — REET ta ices a Peer | HEE EY i HS Sete cae ares OU ee En Oe b (TE pa eno Hag c ees Pee RUG cie = (7 ee | ool EEE oe TEMPERATURE (TI "C — gecs-sguns Poe = css Ste Stee eee Fig. 13 - Open-loop gain vs. temperature for 22 Ets eee es RES eer ESL a In, eeu 2 ee tet ea l Tr mie ee tee [| SUPPLY VOLTAGE (V4,V~} <v Han ——| Fig. 15 — Output-voltage-swing capability and SSSR a, ‘supply voltage. voltage vs. frequency. 420

————— SSS Operational Amplifiers CA3493A, CA3493 Offset Voltage Nulling the other two circuits shown below may The input offset voltage can be nulled to be used, thus providing simpler improved zero by any Of the three methods shown in resolution for all types. the table below. A 10K potentiometer be- tween terminals 1 and 8, with its wiper CAUTION: The CA3493 amplifiers will be returned to V+. will provide a gross null- damaged if they are plugged into op-amp ing for all types. For finer nulling, either of circuits employing nulling with respect to the V~ supply bus. Offset Voltage Nulling vt ® a we Ornw® N Resistor A Value | Resistor A Value | Resotor A Value CA3493A 10K 50K 10K || CA3493 10K 20K 5K Gross Offset Finer Offset Adjustment Adjustments Tast Circuits tox vs -foxt| 10'F700 | Susy 0 a a oe ~~ b-sv * Fig. 16 Input offset voltage test circuit ~e'R ak [ier Se tans i Ber ey t ° Vout *— vin ones. 32980 a — — TOP TRACE : INPUT VOLTAGE BRE: i BOTTOM TRACE : OUTPUT VOLTAGE ° mim vert: 2Y vt =i5v nt Div Vo =-I5V Ieee i il ms bs +--+ 4 —_— Rp loK - f + HOR: Shy L ° aa ime : di aocs-20989 B Ll a. Fig. 17+ Inverting amplifier (a) test circuit (0) response to 1kHz, 20-V pp square wave. eee at

CA3493A, CA3493 Seniae AN nn ce 3 i ee eo ] | ger ote Oe TOP TRACE ; INPUT VOLTAGE. t ref] al BOTTOM TRACE : OUTPUT VOLTAGE o| meena {| { vert. ov V+si5V | i vo = I8V q i} ims ! poy \\ OR Dy RL 2K (an eae ee | fpr ar e e Fig. 18- Voltage follower (e) test circuit (b) response to 20-V pp, TkH2 square-wave input. 2.2ma LOW PASS: HIGH PASS: —— a are Sy oe TOTHe 01 TOO Me fae eeeny it 1 g \\ bP | tape] ieee TI ONT Teh sete 4 | arurck | | Mage TResisance 1000: S® | my! I \\ %E VT dir od T’ne 2 L745 LT ir Oise Your,» ory se « U s2c5-396%0 -By a TT tg TT gt bead s iow TT Tat TT _ pepe eae TERRA] + Pep tiere to} Lb kh ¢ i i i Lité b c s2cs- 32907 Fig. 19 Low lrequency noise (a) test ci Cuit—0.1 10 10 He (b) output A wavetorm—0to 10 Hz noise (c) output 8 waveform—0 to 10 Hz noise. 422

—$——— SsSsSsSsSSsSSSSSSSSSSSSSSSSSSSSSSSSSSSS CO peerrational Amplifiers CA3493A, CA3493 Application Circuits ae tisy “208 A 183 o +15V Yee ° q a ° 6 irre 2 | on Your

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R R tk 20 3. os we {+ = JALL RESISTANCE VALUES ARE IN OHMS 7 vev | fs_)( misne rs ie na Your * v2 (a8 FBZ), c x tour * ve (aaee) (Par) ~ v (FE) | * ° 2 your Loo 4 IF R¢oR2,R3 = Ri AND RE. BS 2 a _ | mvg (SE +1) Bay (SS 40 Ey vour Ye (Rr!) as +¥e (as +!) THEN Vour #(¥2-¥)) (224 mine FOR IDEAL RESISTORS WITH a * Rg FOR VALUES ABOVE Vour=21¥o-¥)) na Vout%—%s (Ret!) IF Ay 1S TO BE MADE | AND IF Ri = R3=RE=R WITH R2 © 0.9998 (0.1% MISMATCH IN Re) Your, (84 an GOT (BE 4) FOR VALUES ABOVE Voyr = (¥p ~¥9)(l0) THEN Voc * ©0008 Viy OR CMRR + 66 68 s2cs- ase THUS, THE CMRR OF THIS CIRCUIT 1S LIMITED BY THE WATCHING OR MISWATCHING OF THIS NETWORK RATHER THAN THE AMPLIFIER s2cs-soese Fig. 20 - Typical two-op amp bridge-type differential amplitier. Fig. 21 - Differential amplitier (simple subtractor) a2 using CAS499. 2f~e : ron 38 —— 3 G RR “ ouisy Ri os 2 ONT 4 au ar ° x ae. vy O— 2 . + {Ry Oe ry im 3 coop a 4 (oa rosoxa SAL 1 ne with yet Ra O-1sv ! s | aK AL 1 oye 4 iO | + L--Es Re | Re fe + Your *= (6 w+ SE ve4 Svs ALL RESISTORS ARE 1% (ap + we 2+ 5 ¥3) IF RU* RS AND R2ARS+RD THEN oe 2 i 223-3909 4, 18 INDEPENDENT OF VARIATIONS IN RL FOR RL VALUES OF 0 TO 340 WITH viv ALL RESISTANCE VALUES ARE IN OHMS TU" RERS Tema” 2x “S00 KA Fig. 22 « Using CA3493 as a bilateral current Fig. 23° Typical summing ampiitier source. application ges

CA3493A, CA3493 The CA3493 is an excellent choice for use The three 22-megohm resistors will provide with themocouples. In Fig. 24, the CA3493. full-scale output if the thermocouple opens. amplifies the signal generated 500 times. re sv ew“ tN rt . Jcasaes Ovour re) 2K opr 499% C)) fryenmocource 2K fi 1K o-tma AUC RESISTORS ARE I> + s2es-s9095 ALL RESISTANCE VALUES ARE IN OHMS Fig. 24 - The CA3493 used in a thermocouple circuit. 424 $$$