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Technical Data
RF LDMOS Wideband Integrated
Power Amplifiers
The A2I09VD050N wideband integrated circuit is designed with on--chip matching that makes it usable from 575 to 960 MHz. This multi--stage structure is rated for 48 to 55 V operation and covers all typical cellular base station modulation formats.
900 MHz Typical Single--Carrier W--CDMA Characterization Performance: VDD = 48 Vdc, IDQ1(A+B) = 74 mA, IDQ2(A+B) = 240 mA, Pout = 6.3 W Avg., Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. (1)
| Frequency | Gps (dB) | PAE (%) | ACPR (dBc) |
| 920 MHz | 36.8 | 19.7 | –45.5 |
| 940 MHz | 36.8 | 19.9 | –45.9 |
| 960 MHz | 36.6 | 19.8 | –45.8 |
Features
On--chip matching (50 ohm input, DC blocked) Integrated quiescent current temperature compensation with enable/disable function (2) Designed for digital predistortion error correction systems Optimized for Doherty applications

- All data measured in fixture with device soldered to heatsink.
Document Number: A2I09VD050N
Rev. 0, 09/2018

575–960 MHz, 6.3 W AVG., 48 V
AIRFAST RF LDMOS WIDEBAND
INTEGRATED POWER AMPLIFIERS


- Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family, and to AN1987, Quiescent Current Control for the RF Integrated Circuit Device Family. Go to http://www.nxp.com/RF and search for AN1977 or AN1987.

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Table 1. Maximum Ratings
| Rating | Symbol | Value | Unit |
|---|---|---|---|
| Drain--Source Voltage | VDSS | –0.5, +105 | Vdc |
| Gate--Source Voltage | VGS | –0.5, +10 | Vdc |
| Operating Voltage | VDD | 55, +0 | Vdc |
| Storage Temperature Range | Tstg | –65 to +150 | C |
| Case Operating Temperature Range | TC | –40 to +150 | C |
| Operating Junction Temperature Range (1,2) | TJ | –40 to +225 | C |
| Input Power | Pin | 20 | dBm |
Table 2. Thermal Characteristics

Table 3. ESD Protection Characteristics
| Test Methodology | Class |
| Human Body Model (per JS--001--2017) | 1A |
| Charge Device Model (per JS--002--2014) | C0B |
Table 4. Moisture Sensitivity Level
| Test Methodology | Rating | Package Peak Temperature | Unit |
|---|---|---|---|
| Per JESD22--A113, IPC/JEDEC J--STD--020 | 3 | 260 | C |
- Continuous use at maximum temperature will affect MTTF. 2. MTTF calculator available at http://www.nxp.com/RF/calculators. 3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.nxp.com/RF and search for AN1955.
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Table 5. Electrical Characteristics (TA = 25C unless otherwise noted)
Characteristic
Symbol
Min Typ Max Unit
Stage 1 -- Off Characteristics (1)
| Zero Gate Voltage Drain Leakage Current (VDS = 105 Vdc, VGS = 0 Vdc) | IDSS | — | — | 10 | Adc |
| Zero Gate Voltage Drain Leakage Current (VDS = 55 Vdc, VGS = 0 Vdc) | IDSS | — | — | 1 | Adc |
| Gate--Source Leakage Current (VGS = 1.2 Vdc, VDS = 0 Vdc) | IGSS | — | — | 1 | Adc |
Stage 1 -- On Characteristics
| Gate Threshold Voltage (1) (VDS = 10 Vdc, ID = 4 Adc) | VGS(th) | 1.3 | 1.7 | 2.3 | Vdc |
| Gate Quiescent Voltage (VDS = 48 Vdc, IDQ1(A+B) = 74 mAdc) | VGS(Q) | — | 2.1 | — | Vdc |
| Fixture Gate Quiescent Voltage (VDD = 48 Vdc, IDQ1(A+B) = 74 mAdc, Measured in Functional Test) | VGG(Q) | 4.6 | 4.9 | 5.2 | Vdc |
Stage 2 -- Off Characteristics (1)
| Zero Gate Voltage Drain Leakage Current (VDS = 105 Vdc, VGS = 0 Vdc) | IDSS | — | — | 10 | Adc |
| Zero Gate Voltage Drain Leakage Current (VDS = 55 Vdc, VGS = 0 Vdc) | IDSS | — | — | 1 | Adc |
| Gate--Source Leakage Current (VGS = 1.2 Vdc, VDS = 0 Vdc) | IGSS | — | — | 1 | Adc |
Stage 2 -- On Characteristics
| Gate Threshold Voltage (1) (VDS = 10 Vdc, ID = 19 Adc) | VGS(th) | 1.3 | 1.7 | 2.3 | Vdc |
| Gate Quiescent Voltage (VDS = 48 Vdc, IDQ2(A+B) = 240 mAdc) | VGS(Q) | — | 2.0 | — | Vdc |
| Fixture Gate Quiescent Voltage (VDD = 48 Vdc, IDQ2(A+B) = 240 mAdc, Measured in Functional Test) | VGG(Q) | 4.0 | 4.3 | 4.6 | Vdc |
| Drain--Source On--Voltage (1) (VGS = 10 Vdc, ID = 190 mAdc) | VDS(on) | 0.1 | 0.25 | 0.5 | Vdc |
- Each side of device measured separately.
(continued)
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Table 5. Electrical Characteristics (TA = 25C unless otherwise noted) (continued)
Characteristic
Symbol
Min Typ Max Unit
Functional Tests (1,2) (In NXP Production Test Fixture, 50 ohm system) VDD = 48 Vdc, IDQ1(A+B) = 74 mA, IDQ2(A+B) = 240 mA, Pout = 6.3 W Avg., f = 920 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ 5 MHz Offset.
| Power Gain | Gps | 35.0 | 36.5 | 38.0 | dB |
| Power Added Efficiency | PAE | 18.0 | 19.8 | — | % |
| Adjacent Channel Power Ratio | ACPR | — | –45.3 | –43.0 | dBc |
| Pout @ 3 dB Compression Point, CW (IDQA = 50 mA, IDQB = 200 mA) | P3dB | 58.9 | 66.1 | — | W |
Load Mismatch (In NXP Production Test Fixture, 50 ohm system) IDQ1(A+B) = 74 mA, IDQ2(A+B) = 240 mA, f = 940 MHz VSWR 10:1 at 55 Vdc, 70 W CW Output Power
No Device Degradation
(3 dB Input Overdrive from 56 W CW Rated Power) Typical Performance (3) (In NXP Characterization Test Fixture, 50 ohm system) VDD = 48 Vdc, IDQ1(A+B) = 74 mA, IDQ2(A+B) = 240 mA, 920–960 MHz Bandwidth

Table 6. Ordering Information
| Device | Tape and Reel Information | Package |
| A2I09VD050NR1 | R1 Suffix = 500 Units, 44 mm Tape Width, 13--inch Reel | TO--270WB--15 |
| A2I09VD050GNR1 | TO--270WBG--15 |
- Part internally input and output matched. 2. Measurements made with device in straight lead configuration before any lead forming operation is applied. Lead forming is used for gull wing (GN) parts. 3. All data measured in fixture with device soldered to heatsink. 4. P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal where output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF. 5. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family, and to AN1987, Quiescent Current Control for the RF Integrated Circuit Device Family. Go to http://www.nxp.com/RF and search for AN1977 or AN1987.
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Note: All data measured in fixture with device soldered to heatsink. Production fixture does not include device soldered to heatsink.
Figure 3. A2I09VD050NR1 Test Circuit Component Layout
Table 7. A2I09VD050NR1 Test Circuit Component Designations and Values
| Part | Description | Part Number | Manufacturer |
|---|---|---|---|
| C1, C2, C3, C4, C5, C6 | 10 F Chip Capacitor | C5750X7S2A106M230KB | TDK |
| C7, C8, C9, C10 | 4.7 F Chip Capacitor | C4532X7S2A475M230KB | TDK |
| C11, C12, C13, C14 | 10 F Chip Capacitor | C3225X7S1H106M250AB | TDK |
| C15, C16, C17, C18 | 0.01 F Chip Capacitor | C0805C103K5RAC | Kemet |
| C19, C20, C21, C22, C23, C24, C25, C26, C27, C28 | 47 pF Chip Capacitor | ATC600S470JT250XT | ATC |
| Q1 | RF Power LDMOS Amplifier | A2I09VD050N | NXP |
| R1, R2, R3, R4 | 2.2 k, 1/8 W Chip Resistor | CRCW08052K20JNEA | Vishay |
| R5 | 50 , 8 W Termination Chip Resistor | C8A50Z4B | Anaren |
| R6 | 50 , 20 W Termination Chip Resistor | C20A50Z4 | Anaren |
| R7, R8, R9, R10 | 10 , 1/8 W Chip Resistor | CRCW080510R0FKEA | Vishay |
| Z1, Z2 | 800–1000 MHz Band, 90, 3 dB Hybrid Coupler | X3C09P1-03S | Anaren |
| PCB | Rogers RO4350B, 0.020, r = 3.66 | D103753 | MTL |
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PACKAGE DIMENSIONS



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PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following resources to aid your design process.
Application Notes AN1907: Solder Reflow Attach Method for High Power RF Devices in Over--Molded Plastic Packages AN1955: Thermal Measurement Methodology of RF Power Amplifiers AN1977: Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family AN1987: Quiescent Current Control for the RF Integrated Circuit Device Family
Engineering Bulletins EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software Electromigration MTTF Calculator RF High Power Model .s2p File
Development Tools Printed Circuit Boards
To Download Resources Specific to a Given Part Number: 1. Go to http://www.nxp.com/RF 2. Search by part number 3. Click part number link 4. Choose the desired resource from the drop down menu
REVISION HISTORY
The following table summarizes revisions to this document.
| Revision | Date | Description |
|---|---|---|
| 0 | Sept. 2018 | Initial release of data sheet |
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Home Page: nxp.com
Web Support: nxp.com/support
Information in this document is provided solely to enable system and software implementers to use NXP products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document. NXP reserves the right to make changes without further notice to any products herein.
NXP makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does NXP assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in NXP data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. All operating parameters, including “typicals,” must be validated for each customer application by customer’s technical experts. NXP does not convey any license under its patent rights
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