BF909WR N-channel dual-gate MOS-FET
Document overview
- Manufacturer or author: NXP Semiconductors
- PDF pages: 13
Technical content
Supersedes data of 1997 Sep 05
2010 Sep 15
N-channel dual-gate MOS-FET
2010 Sep 15 2
NXP Semiconductors Product specification N-channel dual-gate MOS-FET BF909WR
FEATURES
Specially designed for use at 5 V supply voltage Short channel transistor with high forward transfer admittance to input capacitance ratio Low noise gain controlled amplifier up to 1 GHz Superior cross-modulation performance during AGC.
APPLICATIONS
VHF and UHF applications with 3 to 7 V supply voltage such as television tuners and professional communications equipment.
DESCRIPTION
Enhancement type field-effect transistor in a plastic microminiature SOT343R package. The transistor consists of an amplifier MOS-FET with source and substrate interconnected and an internal bias circuit to ensure good cross-modulation performance during AGC. PINNING CAUTION The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling. PIN SYMBOL DESCRIPTION 1s , b s o u r c e 2 d drain 2 gate 2 4g 1 gate 1 Fig.1 Simplified outline (SOT343R) and symbol. Marking code: ME* handbook, halfpage MAM192 s,b d Top view * = - : made in Hong Kong * = p : made in Hong Kong * = t : made in Malaysia QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VDS drain-source voltage 7V ID drain current 40 mA Ptot total power dissipation 280 mW Tj operating junction temperature 150 C yfs forward transfer admittance 36 43 50 mS Cig1-s input capacitance at gate 1 3.6 4.3 pF Crs reverse transfer capacitance f = 1 MHz 30 50 fF F noise figure f = 800 MHz 22 . 8 d B
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NXP Semiconductors Product specification N-channel dual-gate MOS-FET BF909WR LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). Note 1. Device mounted on a printed-circuit board. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDS drain-source voltage 7V ID drain current 40 mA IG1 gate 1 current 10 mA IG2 gate 2 current 10 mA Ptot total power dissipation up to Tamb =5 0 C; see Fig.2; note 1 280 mW Tstg storage temperature range 65 +150 C Tj operating junction temperature +150 C Fig.2 Power derating curve. handbook, halfpage 0 50 100 200 300 MLD150 150 200 100 Ptot (mW) T ( C)amb o
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NXP Semiconductors Product specification N-channel dual-gate MOS-FET BF909WR THERMAL CHARACTERISTICS Notes 1. Device mounted on a printed-circuit board. 2. T s is the temperature at the soldering point of the source lead. STATIC CHARACTERISTICS Tj =2 5 C; unless otherwise specified. Note 1. R G1 connects gate 1 to VGG =5V . DYNAMIC CHARACTERISTICS Common source; Tamb =2 5 C; VDS =5V ; VG2-S =4V ; ID = 15 mA; unless otherwise specified. SYMBOL PARAMETER CONDITIONS VALUE UNIT Rth j-a thermal resistance from junction to ambient note 1 350 K/W Rth j-s thermal resistance from junction to soldering point T s =9 1 C; note 2 210 K/W SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT V(BR)G1-SS gate 1-source breakdown voltage V G2-S =V DS =0 ; IG1-S =1 0m A 6 1 5 V V(BR)G2-SS gate 2-source breakdown voltage V G1-S =V DS =0 ; IG2-S =1 0m A 6 1 5 V V(F)S-G1 forward source-gate 1 voltage V G2-S =V DS =0 ; IS-G1 =1 0m A 0 . 5 1 . 5 V V(F)S-G2 forward source-gate 2 voltage V G1-S =V DS =0 ; IS-G2 =1 0m A 0 . 5 1 . 5 V VG1-S(th) gate 1-source threshold voltage V G2-S =4V ; VDS =5V ; ID =2 0 A0 . 3 1 V VG2-S(th) gate 2-source threshold voltage V G1-S =V DS =5V ; ID =2 0 A0 . 3 1 . 2 V IDSX drain-source current VG2-S =4V ; VDS =5V ; RG1 =1 2 0k; note 1 12 20 mA IG1-SS gate 1 cut-off current VG2-S =V DS =0 ; VG1-S =5V 50 nA IG2-SS gate 2 cut-off current VG1-S =V DS =0 ; VG2-S =5V 50 nA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT yfs forward transfer admittance pulsed; T j =2 5 C 3 64 35 0m S Cig1-s input capacitance at gate 1 f = 1 MHz 3.6 4.3 pF Cig2-s input capacitance at gate 2 f = 1 MHz 2.3 3 pF Cos drain-source capacitance f = 1 MHz 2.3 3 pF Crs reverse transfer capacitance f = 1 MHz 30 50 fF F noise figure f = 800 MHz; G S =G Sopt; BS =B Sopt 22 . 8 d B
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NXP Semiconductors Product specification N-channel dual-gate MOS-FET BF909WR Fig.3 Unwanted voltage for 1% cross-modulation as a function of gain reduction; typical values; see Fig.17. VDS =5V ; VGG =5V ; fw =5 0M H z . funw =6 0M H z ; Tamb =2 5 C; RG1 =1 2 0k. handbook, halfpage 110 100 10 50 MLB936 20 30 40 Vunw (dBμV) gain reduction (dB) Fig.4 Transfer characteristics; typical values. VDS =5V . Tj =2 5 C. handbook, halfpage 0.4 2.0 MLB937 0.8 1.2 1.6 ID (mA) V (V)G1 S V = 4 V 3 V 2.5 V 2 V 1.5 V 1 V G2 S Fig.5 Output characteristics; typical values. VDS =5V . VG2-S =4V . Tj =2 5 C. handbook, halfpage 21 0 MLB938 468 ID (mA) V (V)DS 1.3 V 1.2 V 1.1 V 1.0 V 0.9 V V = 1.4 VG1 S Fig.6 Gate 1 current as a function of gate 1 voltage; typical values. VDS =5V . Tj =2 5 C. handbook, halfpage 0123 200 150 100 MLB939 IG1 (μA) V (V)G1 S 3 V 2.5 V 2 V 3.5 V V = 4 VG2 S
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NXP Semiconductors Product specification N-channel dual-gate MOS-FET BF909WR Fig.7 Forward transfer admittance as a function of drain current; typical values. VDS =5V . Tj =2 5 C. handbook, halfpage 10 20 30 MLB940 y fs (mS) I (mA)D 3.5 V 3 V 2.5 V 2 V V = 4 VG2 S Fig.8 Drain current as a function of gate 1 current; typical values. VDS =5V . VG2-S =4V . Tj =2 5 C. handbook, halfpage 02 0 4 0 6 0 MLB941 I (μA)G1 ID (mA) Fig.9 Drain current as a function of gate 1 supply voltage (= VGG); typical values; see Fig.17. VDS =5V ; VG2-S =4V . RG1 =1 2 0k (connected to VGG); Tj =2 5 C. handbook, halfpage 0246 MLB942 V (V)GG ID (mA) Fig.10 Drain current as a function of gate 1 (= VGG) and drain supply voltage; typical values; see Fig.17. VG2-S =4V . RG1 connected to VGG; Tj =2 5 C. handbook, halfpage 24 8 MLB943 V = V (V)GG DS ID (mA) R = 47 kΩG1 68 kΩ 82 kΩ 100 kΩ 120 kΩ 150 kΩ 180 kΩ 220 kΩ
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NXP Semiconductors Product specification N-channel dual-gate MOS-FET BF909WR VDS =5V ; Tj =2 5 C. RG1 =1 2 0k (connected to VGG). Fig.11 Drain current as a function of gate 2 voltage; typical values; see Fig.17. handbook, halfpage 0246 MLB944 ID (mA) 4.5 V 4 V 3.5 V 3 V V = 5 VGG V (V)G2 S Fig.12 Gate 1 current as a function of gate 2 voltage; typical values; see Fig.17. VDS =5V ; Tj =2 5 C. RG1 =1 2 0k (connected to VGG). handbook, halfpage 0246 MLB945 IG1 (μA) V (V)G2 S 4.5 V 4 V 3.5 V 3 V V = 5 VGG Fig.13 Input admittance as a function of frequency; typical values. VDS =5V ; VG2 =4V . ID =1 5m A ; Tamb =2 5 C. handbook, halfpage 103 MLB946 10210 10 1 10 2 y is (mS) f (MHz) bis gis Fig.14 Reverse transfer admittance and phase as a function of frequency; typical values. VDS =5V ; VG2 =4V . ID =1 5m A ; Tamb =2 5 C. 103 MLB947 10210 10 3 10 2 y rs 10 3 rs (μS) f (MHz) rs yrs (deg) ϕ ϕ
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NXP Semiconductors Product specification N-channel dual-gate MOS-FET BF909WR Fig.15 Forward transfer admittance and phase as a function of frequency; typical values. VDS =5V ; VG2 =4V . ID =1 5m A ; Tamb =2 5 C. 103 MLB948 10210 10 2 y fs (mS) y fs f (MHz) fs fs (deg) ϕ ϕ Fig.16 Output admittance as a function of frequency; typical values. VDS =5V ; VG2 =4V . ID =1 5m A ; Tamb =2 5 C. handbook, halfpage 103 MLB949 10210 10 1 10 2 yos (mS) f (MHz) bos gos Fig.17 Cross-modulation test set-up. DUT VAGC 4.7 nF 10 kΩ MLD151 4.7 nF VDS 350 nH C3 12 pF 2.2 pF R L 50 Ω 50 Ω50 Ω 10 Ω VGG RGEN VI R2 4.7 nF R G1
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NXP Semiconductors Product specification N-channel dual-gate MOS-FET BF909WR Table 1 Scattering parameters: VDS =5V ; VG2-S =4V ; ID =1 5m A ; Tamb =2 5 C Table 2 Noise data: VDS =5V ; VG2-S =4V ; ID =1 5m A ; Tamb =2 5 C f (MHz) s11 s21 s12 s22 MAGNITUDE (ratio) ANGLE (deg) MAGNITUDE (ratio) ANGLE (deg) MAGNITUDE (ratio) ANGLE (deg) MAGNITUDE (ratio) ANGLE (deg) f (MHz) Fmin (dB) opt rn (ratio) (deg) 800 2.00 0.603 67.71 0.581
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NXP Semiconductors Product specification N-channel dual-gate MOS-FET BF909WR PACKAGE OUTLINE REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC EIAJ SOT343R D A Lp Q detail X c HE E v M A AB 0 1 2 mm scale X Plastic surface-mounted package; reverse pinning; 4 leads SOT343R w M B 97-05-21 06-03-16 bp UNIT max bp cD Eb1 HE Lp Qw v mm 0.11.1 0.8 0.4 0.3 0.25 0.10 0.7 0.5 2.2 1.8 1.35 1.15 e 2.2 2.01.3 0.2 y 0.10.21.15 DIMENSIONS (mm are the original dimensions) 0.45 0.15 0.23 0.13 A e y
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NXP Semiconductors Product specification N-channel dual-gate MOS-FET BF909WR DATA SHEET STATUS Notes 1. Please consult the most recently issued document before initiating or completing a design. 2. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. DOCUMENT STATUS(1) PRODUCT STATUS(2) DEFINITION Objective data sheet Development This document contains data from the objective specification for product development. Preliminary data sheet Qualification This document contains data from the preliminary specification. Product data sheet Production This document contains the product specification. DISCLAIMERS Limited warranty and liability Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect.
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NXP Semiconductors Product specification N-channel dual-gate MOS-FET BF909WR Limiting values Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. Quick reference data The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Non-automotive qualified products Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications.
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