BF909

BF909 PHILIPS

Document overview

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Technical content

Product specification File under Discrete Semiconductors, SC07

1995 Apr 25

BF909; BF909R N-channel dual gate MOS-FETs

1995 Apr 25 2

Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF909; BF909R

FEATURES

• Specially designed for use at 5 V supply voltage
• High forward transfer admittance
• Short channel transistor with high forward transfer admittance to input capacitance ratio
• Low noise gain controlled amplifier up to 1 GHz
• Superior cross-modulation performance during AGC.

APPLICATIONS

• VHF and UHF applications with 3 to 7 V supply voltage such as television tuners and professional communications equipment.

DESCRIPTION

Enhancement type field-effect transistor in a plastic microminiature SOT143 or SOT143R package. The transistor consists of an amplifier MOS-FET with source and substrate interconnected and an internal bias circuit to ensure good cross-modulation performance during AGC. PINNING CAUTION The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling. PIN SYMBOL DESCRIPTION 1 s, b source 2 d drain 2 gate 2 4g 1 gate 1 Fig.1 Simplified outline (SOT143) and symbol. BF909 marking code: M28. handbook, halfpage Top view MAM124 s,b d Fig.2 Simplified outline (SOT143R) and symbol. BF909R marking code: M29. handbook, halfpage Top view MAM125 - 1 s,b d QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VDS drain-source voltage −− 7V ID drain current −− 40 mA Ptot total power dissipation −− 200 mW Tj operating junction temperature −− 150 °C yfs forward transfer admittance 36 43 50 mS C ig1-s input capacitance at gate 1 − 3.6 4.3 pF C rs reverse transfer capacitance f = 1 MHz − 35 50 fF F noise figure f = 800 MHz − 2 2.8 dB

1995 Apr 25 3

Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF909; BF909R LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). Note 1. Device mounted on a printed-circuit board. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDS drain-source voltage − 7V ID drain current − 40 mA IG1 gate 1 current −± 10 mA IG2 gate 2 current −± 10 mA Ptot total power dissipation see Fig.3 BF909 up to T amb =5 0°C; note 1− 200 mW BF909R up to T amb =4 0°C; note 1− 200 mW Tstg storage temperature −65 +150 °C Tj operating junction temperature − 150 °C Fig.3 Power derating curves. handbook, halfpage 0 50 100 200 250 200 MLB935 150 150 100 Ptot (mW) T ( C)amb o BF909R BF909

1995 Apr 25 4

Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF909; BF909R THERMAL CHARACTERISTICS Notes 1. Device mounted on a printed-circuit board. 2. Ts is the temperature at the soldering point of the source lead. STATIC CHARACTERISTICS Tj=2 5°C; unless otherwise specified. Note 1. R G1 connects gate 1 to VGG = 5 V; see Fig.18. DYNAMIC CHARACTERISTICS Common source; Tamb =2 5°C; VDS = 5 V; VG2-S = 4 V; ID = 15 mA; unless otherwise specified. SYMBOL PARAMETER CONDITIONS VALUE UNIT R th j-a thermal resistance from junction to ambient note 1 BF909 500 K/W BF909R 550 K/W R th j-s thermal resistance from junction to soldering point note 2 BF909 T s =9 2°C 290 K/W BF909R T s =7 8°C 360 K/W SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT V(BR)G1-SS gate 1-source breakdown voltage VG2-S =V DS = 0; IG1-S = 10 mA 6 15 V V(BR)G2-SS gate 2-source breakdown voltage VG1-S =V DS = 0; IG2-S = 10 mA 6 15 V V(F)S-G1 forward source-gate 1 voltage V G2-S =V DS = 0; IS-G1 = 10 mA 0.5 1.5 V V(F)S-G2 forward source-gate 2 voltage V G1-S =V DS = 0; IS-G2 = 10 mA 0.5 1.5 V VG1-S(th) gate 1-source threshold voltage VG2-S =4V ; VDS =5V ; ID =2 0µA 0.3 1 V VG2-S(th) gate 2-source threshold voltage VG1-S =V DS =5V ; ID =2 0µA 0.3 1.2 V IDSX drain-source current V G2-S =4V ; VDS =5V ; R G1 = 120 kΩ ; note 1 12 20 mA IG1-SS gate 1 cut-off current V G1-S =5V ; VG2-S =V DS =0 − 50 nA IG2-SS gate 2 cut-off current V G2-S =5V ; VG1-S =V DS =0 − 50 nA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT yfs forward transfer admittance pulsed; Tj=2 5°C 3 64 35 0m S C ig1-s input capacitance at gate 1 f = 1 MHz − 3.6 4.3 pF C ig2-s input capacitance at gate 2 f = 1 MHz − 2.3 3 pF C os drain-source capacitance f = 1 MHz − 2.3 3 pF C rs reverse transfer capacitance f = 1 MHz − 35 50 fF F noise figure f = 800 MHz; G S =G Sopt; BS =B Sopt − 2 2.8 dB

1995 Apr 25 5

Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF909; BF909R Fig.4 Unwanted voltage for 1% cross-modulation as a function of gain reduction; typical values; see Fig.18. VDS = 5 V; VGG = 5 V; fw = 50 MHz. funw = 60 MHz; Tamb =2 5°C; RG1 = 120 kΩ . handbook, halfpage 110 100 10 50 MLB936 20 30 40 Vunw (dBµV) gain reduction (dB) Fig.5 Transfer characteristics; typical values. VDS =5V . Tj=2 5°C. handbook, halfpage 0.4 2.0 MLB937 0.8 1.2 1.6 ID (mA) V (V)G1 S V = 4 V3 V 2.5 V 2 V 1.5 V 1 V G2 S Fig.6 Output characteristics; typical values. VDS =5V . VG2-S =4V . Tj=2 5°C. handbook, halfpage 21 0 MLB938 468 ID (mA) V (V)DS 1.3 V 1.2 V 1.1 V 1.0 V 0.9 V V = 1.4 VG1 S Fig.7 Gate 1 current as a function of gate 1 voltage; typical values. VDS =5V . Tj=2 5°C. handbook, halfpage 0123 200 150 100 MLB939 IG1 (µA) V (V)G1 S 3 V 2.5 V 2 V 3.5 V V = 4 VG2 S

1995 Apr 25 6

Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF909; BF909R Fig.8 Forward transfer admittance as a function of drain current; typical values. VDS =5V . Tj=2 5°C. handbook, halfpage 10 20 30 MLB940 yfs (mS) I (mA)D 3.5 V 3 V 2.5 V 2 V V = 4 VG2 S Fig.9 Drain current as a function of gate 1 current; typical values. VDS = 5 V; VG2-S =4V . Tj=2 5°C. handbook, halfpage 02 0 4 0 6 0 MLB941 I (µA)G1 ID (mA) Fig.10 Drain current as a function of gate 1 supply voltage (= VGG ); typical values; see Fig.18. VDS = 5 V; VG2-S =4V . R G1 = 120 kΩ (connected to VGG ); Tj=2 5°C. handbook, halfpage 0246 MLB942 V (V)GG ID (mA) Fig.11 Drain current as a function of gate 1 (= VGG ) and drain supply voltage; typical values; see Fig.18. VG2-S =4V . R G1 connected to VGG ; Tj=2 5°C. handbook, halfpage 24 8 MLB943 V = V (V)GG DS ID (mA) R = 47 kΩG1 68 kΩ 82 kΩ 100 kΩ 120 kΩ 150 kΩ 180 kΩ 220 kΩ

1995 Apr 25 7

Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF909; BF909R VDS = 5 V; Tj=2 5°C. R G1 = 120 kΩ (connected to VGG ). Fig.12 Drain current as a function of gate 2 voltage; typical values; see Fig.18. handbook, halfpage 0246 MLB944 ID (mA) 4.5 V 4 V 3.5 V 3 V V = 5 VGG V (V)G2 S Fig.13 Gate 1 current as a function of gate 2 voltage; typical values; see Fig.18. VDS = 5 V; Tj=2 5°C. R G1 = 120 kΩ (connected to VGG ). handbook, halfpage 0246 MLB945 IG1 (µA) V (V)G2 S 4.5 V 4 V 3.5 V 3 V V = 5 VGG Fig.14 Input admittance as a function of frequency; typical values. VDS = 5 V; VG2 =4V . ID = 15 mA; Tamb =2 5°C. handbook, halfpage 103 MLB946 10210 10 1 10 2 yis (mS) f (MHz) bis gis Fig.15 Reverse transfer admittance and phase as a function of frequency; typical values. VDS = 5 V; VG2 =4V . ID = 15 mA; Tamb =2 5°C. 103 MLB947 10210 10 3 10 2 yrs 10 3 rs (µS) f (MHz) rs yrs (deg) ϕ ϕ

1995 Apr 25 8

Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF909; BF909R Fig.16 Forward transfer admittance and phase as a function of frequency; typical values. VDS = 5 V; VG2 =4V . ID = 15 mA; Tamb =2 5°C. 103 MLB948 10210 10 2 yfs (mS) yfs f (MHz) fs fs (deg) ϕ ϕ Fig.17 Output admittance as a function of frequency; typical values. VDS = 5 V; VG2 =4V . ID = 15 mA; Tamb =2 5°C. handbook, halfpage 103 MLB949 10210 10 1 10 2 yos (mS) f (MHz) bos gos Fig.18 Cross-modulation test set-up. DUT VAGC 4.7 nF 10 kΩ MLD151 4.7 nF VDS 350 nH C3 12 pF 2.2 pF R L 50 Ω 50 Ω50 Ω 10 Ω VGG R GEN V I R2 4.7 nF R G1

1995 Apr 25 9

Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF909; BF909R Table 1 Scattering parameters: Tamb =2 5°C; VDS = 5 V; VG2-S = 4 V; ID =1 5m A Table 2 Noise data: Tamb =2 5°C; VDS = 5 V; VG2-S = 4 V; ID =1 5m A f (MHz) s11 s21 s12 s22 MAGNITUDE (ratio) ANGLE (deg) MAGNITUDE (ratio) ANGLE (deg) MAGNITUDE (ratio) ANGLE (deg) MAGNITUDE (ratio) ANGLE (deg) f (MHz) Fmin (dB) Γopt rn (ratio) (deg) 800 2.00 0.603 67.71 0.581

1995 Apr 25 10

Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF909; BF909R PACKAGE OUTLINES Fig.19 SOT143. Dimensions in mm. handbook, full pagewidth MBC845 max o max o max o 1.1 max 0.75 0.60 0.150 0.090 0.1 max M0.1 AB0 0.10.48 TOP VIEW 1.4 1.2 2.5 max 3.0 2.8 M0.2 ABA B 1.9 0.10.88 1.7 Fig.20 SOT143R. Dimensions in mm. handbook, full pagewidth MBC844 max o max o max o 1.1 max 0.40 0.25 0.150 0.090 0.1 max 1.4 1.2 2.5 max 3.0 2.8 A B 1.9 M0.2 A M0.1 B TOP VIEW 0.48 0.38 0.88 0.78 1.7

1995 Apr 25 11

Philips Semiconductors Product specification N-channel dual gate MOS-FETs BF909; BF909R DEFINITIONS LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. Data Sheet Status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.