BF1208 Dual N-channel dual gate MOSFET
Document overview
- Manufacturer or author: NXP Semiconductors
- PDF pages: 23
Technical content
- Product profile
1.1 General description
The BF1208 is a combination of two dual gate MOSFET amplifiers with shared source and gate2 leads and an integrated switch. The integrated switch is operated by the gate1 bias of amplifier B. The source and substrate are interconnected. Internal bias circuits enable DC stabilization and a very good cross-modulation performance during Automatic Gain Control (AGC). Integrated diodes between the gates and source protect against excessive input voltage surges. The transistor has a SOT666 micro-miniature plastic package.
1.2 Features and benefits
Two low noise gain controlled amplifiers in a single package. One with a fully integrated bias and one with a partly integrated bias Internal switch to save external components Superior cross-modulation performance during AGC High forward transfer admittance High forward transfer admittance to input capacitance ratio
1.3 Applications
Gain controlled low noise amplifiers for VHF and UHF applications with 5 V supply voltage digital and analog television tuners professional communication equipment BF1208 Dual N-channel dual gate MOSFET Rev. 2 — 7 September 2011 Product data sheet SOT666 CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken during transport and handling.
1.4 Quick reference data
[1] T sp is the temperature at the soldering point of the source lead. Table 1. Quick reference data Per MOSFET unless otherwise specified. Table 2. Discrete pinning
[1] T sp is the temperature at the soldering point of the source lead. Table 3. Ordering information Table 4. Marking codes Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).
[1] R G1 connects gate1 (B) to VGG = 0 V (see Figure 3). [2] R G1 connects gate1 (B) to VGG = 5 V (see Figure 3). Table 6. Thermal characteristics Table 7. Static characteristics Tj =2 5 C; unless otherwise specified.
8.1 Dynamic characteristics for amplifier A
VGG = 5 V: amplifier A is off; amplifier B is on. VGG = 0 V: amplifier A is on; amplifier B is off. Table 8. Dynamic characteristics for amplifier A [1] Common source; Tamb =2 5 C; VG2-S =4V ; VDS =5V ; ID = 19 mA; unless otherwise specified.
[1] For the MOSFET not in use: V G1-S(B) =0V ; VDS(B) =0V . [2] Measured in Figure 33 test circuit.
8.1.1 Graphics for amplifier A
Table 8. Dynamic characteristics for amplifier A [1] …continued Common source; Tamb =2 5 C; VG2-S =4V ; VDS =5V ; ID = 19 mA; unless otherwise specified.
Product data sheet Rev. 2 — 7 September 2011 7 of 23 NXP Semiconductors BF1208 Dual N-channel dual gate MOSFET (1) V G2-S =4V . (3) V G2-S =3V . (5) V G2-S =2V . VDS(A) =5V ; VG1-S(B) =V DS(B) =0V ; Tj =2 5 C. VDS(A) =5V ; VG2-S =4V ; VDS(B) =5V ; VG1-S(B) =0V ; Tj =2 5 C. ID(B) = internal G1 current = current in pin drain (B) if MOSFET (B) is switched off. Fig 6. Amplifier A: forward transfer admittance as a function of drain current; typical values Fig 7. Amplifier A: drain current as a function of internal G1 current; typical values ID (mA) 03 2 2481 6 001aaa556 yfs (mS) (1) (2) (3) (4) (5) (6) 001aac206 ID(B) (μA) 06 0 4020 ID(A) (mA)
Product data sheet Rev. 2 — 7 September 2011 8 of 23 NXP Semiconductors BF1208 Dual N-channel dual gate MOSFET VDS(A) =V DS(B) =V supply; VG2-S =4V ; Tj =2 5 C; RG1 = 150 k (connected to ground); see Figure 3. (1) V DS(B) =5V . (3) V DS(B) =4V . (5) V DS(B) =3V . VDS(A) =5V ; VG1-S(B) = 0 V; gate1 (A) = open; Tj =2 5 C. Fig 8. Amplifier A: drain current of amplifier A as a function of supply voltage of A and B amplifier; typical values Fig 9. Amplifier A: drain current as a function of gate2 voltage; typical values VDS(A) =V DS(B) =5V ; VG1-S(B) =0V ; fw =5 0M H z ; funw =6 0M H z ; Tamb =2 5 C; see Figure 33. VDS(A) =V DS(B) =5V ; VG1-S(B) = 0 V; f = 50 MHz; see Figure 33. Fig 10. Amplifier A: unwanted voltage for 1 % cross-modulation as a function of gain reduction; typical values Fig 11. Amplifier A: gain reduction as a function of AGC voltage; typical values Vsup (V) 05 4231 001aaa558 ID (mA) 001aaa559 VG2-S (V) 06 42 ID (mA) (1) (2) (3) (4) (5) (6) gain reduction (dB) 05 0 4020 3010 001aac195 100 110 120 Vunw (dBμV) VAGC (V) 04 312 001aac196 gain reduction (dB)
Product data sheet Rev. 2 — 7 September 2011 9 of 23 NXP Semiconductors BF1208 Dual N-channel dual gate MOSFET VDS(A) =V DS(B) =5V ; VG1-S(B) =0V ; f=5 0M H z ; Tamb =2 5 C; see Figure 33. VDS(A) =5V ; VG2-S =4V ; VDS(B) =V G1-S(B) =0V ; ID(A) =1 9m A Fig 12. Amplifier A: drain current as a function of gain reduction; typical values Fig 13. Amplifier A: input admittance as a function of frequency; typical values VDS(A) =5V ; VG2-S =4V ; VDS(B) =V G1-S(B) =0V ; ID(A) =1 9m A VDS(A) =5V ; VG2-S =4V ; VDS(B) =V G1-S(B) =0V ; ID(A) =1 9m A Fig 14. Amplifier A: forward transfer admittance and phase as a function of frequency; typical values Fig 15. Amplifier A: reverse transfer admittance and phase as a function of frequency; typical values gain reduction (dB) 05 0 4020 3010 001aac197 I D (mA) 001aac566 f (MHz) 10 10 3102 10−1 102 bis, gis (mS) 10−2 bis gis f (MHz) 10 10 3102 001aac567 102 |yfs| (mS) −10 −102 ϕfs (deg) |yfs| ϕfs 001aac568 102 103 |yrs| (μS) −102 −10 −103 ϕrs (deg) f (MHz) 10 103102 |yrs| ϕrs
8.1.2 Scattering parameters for amplifier A
8.1.3 Noise data for amplifier A
Table 9. Scattering para meters for amplifier A Table 10. Noise data for amplifier A
8.2 Dynamic characteristics for amplifier B
[1] For the MOSFET not in use: V G1-S(A) = 0 V; VDS(A) =0 V . [2] Measured in Figure 34 test circuit. Table 11. Dynamic characteristics for amplifier B [1] Common source; Tamb =2 5 C; VG2-S =4V ; VDS =5V ; ID = 13 mA; unless otherwise specified.
Product data sheet Rev. 2 — 7 September 2011 12 of 23 NXP Semiconductors BF1208 Dual N-channel dual gate MOSFET
8.2.1 Graphics for amplifier B
(1) V G2-S =4V . (3) V G2-S =3V . (5) V G2-S =2V . (7) V G2-S =1V . VDS(B) =5V ; VDS(A) =V G1-S(A) =0V ; Tj =2 5 C. (7) V G1-S(B) =1V . VG2-S =4V ; VDS(A) =V G1-S(A) =0V ; Tj =2 5 C. Fig 17. Amplifier B: transfer characteristics; typical values Fig 18. Amplifier B: output characteristics; typical values VG1-S (V) 02 1.60.8 1.20.4 001aaa568 I D (mA) (4) (5) (6) (7) (2) (3) (1) 001aaa569 VDS (V) 06 42 ID (mA) (1) (2) (5) (6) (7) (4) (3)
Product data sheet Rev. 2 — 7 September 2011 13 of 23 NXP Semiconductors BF1208 Dual N-channel dual gate MOSFET (1) V G2-S =4V . (3) V G2-S =3V . (5) V G2-S =2V . (7) V G2-S =1V . VDS(B) =5V ; VDS(A) =V G1-S(A) =0V ; Tj =2 5 C. (1) V G2-S =4V . (3) V G2-S =3V . (5) V G2-S =2V . (7) V G2-S =1V . VDS(B) =5V ; VDS(A) =V G1-S(A) =0V ; Tj =2 5 C. Fig 19. Amplifier B: gate1 current as a function of gate1 voltage; typical values Fig 20. Amplifier B: forward transfer admittance as a function of drain current; typical values VDS(B) =5V ; VG2-S =4V ; VDS(A) =V G1-S(A) =0V ; Tj =2 5 C. VDS(B) =5V ; VG2-S =4V ; VDS(A) =V G1-S(A) =0V ; Tj =2 5 C; RG1 = 150 k (connected to VGG); see Figure 3. Fig 21. Amplifier B: drain current as a function of gate1 current; typical values Fig 22. Amplifier B: drain current as a function of gate1 supply voltage; typical values VG1-S (V) 02 1.60.8 1.20.4 001aaa570 100 IG1 (μA) (1) (2) (4) (6) (7) (3) (5) ID (mA) 03 2 2481 6 001aaa571 yfs (mS) (1) (2) (3) (4) (5) (6) (7) IG1 (μA) 05 0 4020 3010 001aaa572 ID (mA) VGG (V) 05 4231 001aaa573 ID (mA)
Product data sheet Rev. 2 — 7 September 2011 14 of 23 NXP Semiconductors BF1208 Dual N-channel dual gate MOSFET (1) R G1 =6 8k . (2) R G1 =8 2k . (3) R G1 = 100 k. (4) R G1 = 120 k. (5) R G1 = 150 k. (6) R G1 = 180 k. (7) R G1 = 220 k. (8) R G1 = 270 k. VG2-S =4V ; VDS(A) =V G1-S(A) =0V ; Tj =2 5 C; RG1 is connected to VGG; see Figure 3. (1) V GG =5 . 0V . (2) V GG =4 . 5V . (3) V GG =4 . 0V . (4) V GG =3 . 5V . (5) V GG =3 . 0V . VDS(B) =5V ; VDS(A) =V G1-S(A) =0V ; Tj =2 5 C; RG1 = 150 k (connected to VGG); see Figure 3. Fig 23. Amplifier B: drain current as a function of gate1 supply voltage and drain supply voltage; typical values Fig 24. Amplifier B: drain current as a function of gate2 voltage; typical values 001aaa574 VGG = VDS (V) 06 42 ID (mA) (1) (2) (3) (4) (5) (8) (6) (7) 001aaa575 VG2-S (V) 06 42 ID (mA) (1) (3) (4) (5) (2)
Product data sheet Rev. 2 — 7 September 2011 15 of 23 NXP Semiconductors BF1208 Dual N-channel dual gate MOSFET (1) V GG =5 . 0V . (2) V GG =4 . 5V . (3) V GG =4 . 0V . (4) V GG =3 . 5V . (5) V GG =3 . 0V . VDS(B) =5V ; VDS(A) =V G1-S(A) =0V ; Tj =2 5 C; RG1 = 150 k (connected to VGG); see Figure 3. VDS(B) =5V ; VGG =5V ; VDS(A) =V G1-S(A) =0V ; RG1 = 150 k (connected to VGG); fw =5 0M H z ; funw =6 0M H z ; Tamb =2 5 C; see Figure 34. Fig 25. Amplifier B: gate1 current as a function of gate2 voltage; typical values Fig 26. Amplifier B: unwanted voltage for 1 % cross-modulation as a function of gain reduction; typical values VDS(B) =5V ; VGG =5V ; VDS(A) =V G1-S(A) =0V ; RG1 = 150 k (connected to VGG); f = 50 MHz; Tamb =2 5 C; see Figure 34. VDS(B) =5V ; VGG =5V ; VDS(A) =V G1-S(A) =0V ; RG1 = 150 k (connected to VGG); f = 50 MHz; Tamb =2 5 C; see Figure 34. Fig 27. Amplifier B: gain reduction as a function of AGC voltage; typical values Fig 28. Amplifier B: drain current as a function of gain reduction; typical values VG2-S (V) 06 42 001aaa576 I (μA) (1) (2) (4) (5) (3) 001aac198 gain reduction (dB) 06 0 4020 100 110 120 Vunw (dBμV) VAGC (V) 04 312 001aac199 gain reduction (dB) gain reduction (dB) 05 0 4020 3010 001aac200 ID (mA)
Product data sheet Rev. 2 — 7 September 2011 16 of 23 NXP Semiconductors BF1208 Dual N-channel dual gate MOSFET VDS(B) =5V ; VG2-S =4V ; VDS(A) =V G1-S(A) =0V ; ID(B) =1 3m A VDS(B) =5V ; VG2-S =4V ; VDS(A) =V G1-S(A) =0V ; ID(B) =1 3m A Fig 29. Amplifier B: input ad mittance as a function of frequency; typical values Fig 30. Amplifier B: forward transfer admittance and phase as a function of frequency; typical values VDS(B) =5V ; VG2-S =4V ; VDS(A) =V G1-S(A) =0V ; ID(B) =1 3m A VDS(B) =5V ; VG2-S =4V ; VDS(A) =V G1-S(A) =0V ; ID(B) =1 3m A Fig 31. Amplifier B: reverse transfer admittance and phase as a function of frequency; typical values Fig 32. Amplifier B: output admittance as a function of frequency; typical values 001aac570 f (MHz) 10 10 3102 10−1 102 bis, gis (mS) 10−2 bis gis f (MHz) 10 10 3102 001aac571 102 |yfs| (mS) −10 −102 ϕfs (deg) |yfs| ϕfs 001aac572 102 103 |yrs| (μS) f (MHz) 10 10 3102 −102 −10 −103 ϕrs (deg) |yrs| ϕrs 001aac573 10−1 bos, gos (mS) 10−2 f (MHz) 10 10 3102 bos gos
8.2.2 Scattering parameters for amplifier B
8.2.3 Noise data for amplifier B
Table 12. Scattering parameters for amplifier B Table 13. Noise data for amplifier B
Product data sheet Rev. 2 — 7 September 2011 18 of 23 NXP Semiconductors BF1208 Dual N-channel dual gate MOSFET 9. Test information Fig 33. Cross-modulation test set-up for amplifier A Fig 34. Cross-modulation test set-up for amplifier B 50 Ω 10 kΩ RGEN 50 Ω RL 50 Ω50 Ω RG1 4.7 nF 4.7 nF 4.7 nF G2 S G1B DB DA 4.7 nF 4.7 nF 4.7 nFG1A BF1208 VGG VDS(B) VDS(A) VAGC 2.2 μH 2.2 μH 001aac201 Vi 50 Ω 10 kΩ RGEN 50 Ω 50 Ω RG1 4.7 nF 4.7 nF 4.7 nF G2 S G1B DB DA 4.7 nF 4.7 nF 4.7 nF G1A BF1208 VGG VDS(B) VDS(A) VAGC 2.2 μH 2.2 μH RL 50 Ω 001aac202 Vi
Product data sheet Rev. 2 — 7 September 2011 19 of 23 NXP Semiconductors BF1208 Dual N-channel dual gate MOSFET 10. Package outline Fig 35. Package outline SOT666 UNIT bp cD E e1 HE Lp w REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE 04-11-08 06-03-16 IEC JEDEC JEITA mm 0.27 0.17 0.18 0.08 1.7 1.5 1.3 1.1 0.5 e 1.0 1.7 1.5 0.1 y 0.1 DIMENSIONS (mm are the original dimensions) 0.3 0.1 SOT666 bp pin 1 index D e A Lp detail X HE EA S 0 1 2 mm scale A 0.6 0.5 c X 123 456 Plastic surface-mounted package; 6 leads SOT666 YS w M A
Table 14. Revision history guidelines of NXP Semiconductors.
- Legal texts have been adapted to the new company name where appropriate.
- Package outline drawings have been updated to the latest version. BF1208 v.1 (9397 750 14254)
20050316 Product data sheet - -
Product data sheet Rev. 2 — 7 September 2011 21 of 23 NXP Semiconductors BF1208 Dual N-channel dual gate MOSFET 12. Legal information
12.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
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12.3 Disclaimers
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NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. 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Product data sheet Rev. 2 — 7 September 2011 22 of 23 NXP Semiconductors BF1208 Dual N-channel dual gate MOSFET Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 13. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
Dual N-channel dual gate MOSFET © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 7 September 2011 Document identifier: BF1208 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 14. Contents