ATL431LI / ATL432LI High Bandwidth Low-Iq Programmable Shunt Regulator datasheet (Rev. D)
Document overview
- Manufacturer or author: Texas Instruments, Incorporated [SLVSDU6,D]
- PDF pages: 41
Technical content
Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. ATL431LI ATL432LI SLVSDU6D –JULY 2017–REVISED NOVEMBER 2019 ATL431LI/ATL432LIHighBandwidthLow-IqProgrammableShuntRegulator
1 Features
1• Reference voltage tolerance at 25°C – 0.5% (B Grade) – 1% (A Grade)
- Minimum typical output voltage: 2.5 V
- Adjustable output voltage: Vref to 36 V
- Operation from −40°C to +125°C (Q temp)
- Maximum temperature drift – 17 mV (I Temp) – 27 mV (Q Temp)
- 0.3-Ω Typical output impedance
- Sink-current capability – Imin = 0.08 mA (max) – IKA = 15 mA (max)
- Reference input current IREF: 0.4 μA (max)
- Deviation of reference input current over temperature, II(dev): 0.3 μA (max)
- Packages: 1-mm x 1-mm X2SON or SOT23-3
2 Applications
- Adjustable voltage and current referencing
- Secondary side regulation in Flyback SMPS
- Zener diode replacement
- Voltage monitoring
- Precision constant current sink/source
- Comparator with integrated reference
3 Description
The ATL43xLI device is a three-terminal adjustable shunt regulator, with specified thermal stability over applicable automotive, commercial, and military temperature ranges. The output voltage can be set to any value between Vref (approximately 2.5 V) and 36 V, with two external resistors. These devices have a typical output impedance of 0.3 Ω. Active output circuitry provides a very sharp turn-on characteristic, making these devices excellent replacements for Zener diodes in many applications, such as onboard regulation, adjustable power supplies, and switching power supplies. This device is a pin-to-pin alternative to the TL431LI and TL432LI, with lower minimum operating current to help reduce system power consumption. The ATL432LI device has exactly the same functionality and electrical specifications as the ATL431LI device, but has a different pinout for the DBZ package. The ATL431LI is also offered in a tiny X2SON (1.00 mm x 1.00 mm) package which makes it ideal for space constraint applications. The ATL431LI device is offered in two grades, with initial tolerances (at 25°C) of 0.5%, and 1%, for the B and A grade, respectively. In addition, low output drift versus temperature ensures good stability over the entire temperature range. The ATL43xLIxQ devices are characterized for operation from –40°C to +125°C. Device Information(1) PART NUMBER PACKAGE (PIN) BODY SIZE (NOM) ATL43xLI SOT-23 (3) 2.90 mm x 1.30 mm ATL431LI X2SON (4) 1.00 mm x 1.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Simplified Schematic
SLVSDU6D –JULY 2017–REVISED NOVEMBER 2019 www.ti.com Product Folder Links: ATL431LI ATL432LI Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated Table of Contents
14.3 Receiving Notification of Documentation Updates 27
15 Mechanical, Packaging, and Orderable
4 Revision History
Changes from Revision C (August 2019) to Revision D Page Changes from Revision B (November 2018) to Revision C Page Changes from Revision A (October 2018) to Revision B Page Changes from Original (July 2018) to Revision A Page
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5 Device Comparison Table
DEVICE PINOUT INITIAL ACCURACY OPERATING FREE-AIR TEMPERATURE (TA) ATL431LI ATL432LI A: 1% B: 0.5% I: -40°C to 85°C Q: -40°C to 125°C
6 Pin Configuration and Functions
TYPE DESCRIPTIONATL431LIx ATL431LIx ATL432LIx DBZ DQN DBZ ANODE 3 1 3 O Common pin, normally connected to ground CATHODE 1 3 2 I/O Shunt Current/Voltage input REF 2 4 1 I Threshold relative to common anode NC N/A 2 N/A — No internal connection Thermal Pad N/A Available N/A — Connect to ground or to a floating copper plane for mechanical stability.
SLVSDU6D –JULY 2017–REVISED NOVEMBER 2019 www.ti.com Product Folder Links: ATL431LI ATL432LI Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to ANODE, unless otherwise noted.
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT VKA Cathode Voltage(2) 37 V IKA Continuos Cathode Current Range –10 18 mA II(ref) Reference Input Current –5 10 mA TJ Operating Junction Temperature Range –40 150 C Tstg Storage Temperature Range –65 150 C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.2 ESD Ratings
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001pins(1) ±2000 VCharged-device model (CDM), per JEDEC specification JESD22- ±1000 VC101(2) ±1000 (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
7.3 Thermal Information
THERMAL METRIC(1) ATL43xLI UNITDBZ DQN
3 PINS 4 PINS
RθJA Junction-to-ambient thermal resistance 371.7 173.7 C/W RθJC(top) Junction-to-case (top) thermal resistance 145.9 185.5 C/W RθJB Junction-to-board thermal resistance 104.7 119.9 C/W ψJT Junction-to-top characterization parameter 23.9 13.1 C/W ψJB Juction-to-board characterization parameter 102.9 119.9 C/W RθJC(bottom) Juction-to-case (bottom) thermal resistance N/A 93.0 C/W (1) Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
7.4 Recommended Operating Conditions
See (1) MIN MAX UNIT VKA Cathode Voltage VREF 36 V IKA Continuous Cathode Current Range 0.08 15 mA TA Operating Free-Air Temperature ATL43xLIxI –40 85 C ATL43xLIxQ –40 125 C
www.ti.com SLVSDU6D –JULY 2017–REVISED NOVEMBER 2019 Product Folder Links: ATL431LI ATL432LI Submit Documentation FeedbackCopyright © 2017–2019, Texas Instruments Incorporated (1) The deviation parameters VI(dev) and II(dev) are defined as the differences between the maximum and minimum values obtained over the rated temperature range. For more details on VI(dev) and how it relates to the average temperature coefficient, see Parameter Measurement Information. (2) The dynamic impedance is defined by |ZKA| = ΔVKA/ΔIKA. For more details on |ZKA| and how it relates to VKA, see Parameter Measurement Information.
7.5 Electrical Characteristics
over recommended operating conditions, TA = 25°C (unless otherwise noted) PARAMETER TEST CIRCUIT TEST CONDITIONS MIN TYP MAX UNIT VREF Reference Voltage See Figure 17 VKA = Vref, IKA = 1 mA ATL43xLIAx devices 2475 2500 2525 mV ATL43xLIBx devices 2487 2500 2512 mV VI(dev) Deviation of reference input voltage over full temperature range (1) See Figure 17 VKA = Vref, IKA = 1 mA ATL43xLIxI devices 6 17 mV ATL43xLIxQ devices 10 27 mV ΔVref / ΔVKA Ratio of change in reference voltage to the change in cathode voltage See Figure 18 IKA = 1 mA ΔVKA = 10 V - Vref –1.4 –2.7 mV/V ΔVKA = 36 V - 10 V –1 –2 mV/V Iref Reference Input Current See Figure 18 IKA = 1 mA, R1 = 10kΩ, R2 = ∞ 0.2 0.4 µA II(dev) Deviation of reference input current over full temperature range (1) See Figure 18 IKA = 1 mA, R1 = 10kΩ, R2 = ∞ 0.1 0.3 µA Imin Minimum cathode current for regulation See Figure 17 VKA = Vref 65 80 uA Ioff Off-state cathode current See Figure 19 VKA = 36 V, Vref = 0 0.1 1 µA |ZKA| Dynamic Impedance (2) See Figure 17 VKA = Vref, IKA = 1 mA to 15 mA 0.3 0.65 Ω
8 Typical Characteristics
ranges of the various devices. Figure 1. Reference Voltage vs Free-Air Temperature Figure 2. Reference Current vs Free-Air Temperature Figure 3. Cathode Current vs Cathode Voltage Figure 4. Cathode Current vs Cathode Voltage Figure 5. Off-State Cathode Current Figure 6. Ratio of Delta Reference Voltage to Delta Cathode
9 Parameter Measurement Information
Figure 17. Test Circuit for VKA = Vref Figure 18. Test Circuit for VKA > Vref Figure 19. Test Circuit for Ioff
9.1 Temperature Coefficient
temperature coefficient, check out Voltage Reference Selection Basics.
0 VKA (V)
9.2 Dynamic Impedance
specified on the Eletrical Characteristics . Any deviation from Itest can cause deviation on the output VKA. Figure 20 shows the effect of the dynamic impedance on the VKA. Figure 20. Dynamic Impedance
10 Detailed Description
10.1 Overview
a single voltage reference, error amplifier, voltage clamp or comparator with integrated reference. ATL432LI are both functionally the same, but have separate pinout options. The ATL43xLIxQ devices are characterized for operation from –40°C to +125°C.
10.2 Functional Block Diagram
Figure 21. Equivalent Schematic Figure 22. Detailed Schematic
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10.3 Feature Description
ATL431LI consists of an internal reference and amplifier that outputs a sink current based on the difference between the reference pin and the virtual internal pin. The sink current is produced by the internal Darlington pair, shown in the above schematic (Figure 21). A Darlington pair is used in order for this device to be able to sink a maximum current of 15 mA. When operated with enough voltage headroom (≥ 2.5 V) and cathode current (IKA), ATL431LI forces the reference pin to 2.5 V. However, the reference pin can not be left floating, as it needs IREF ≥ 0.4 µA ( see Specifications). This is because the reference pin is driven into an NPN, which needs base current in order operate properly. When feedback is applied from the Cathode and Reference pins, ATL431LI behaves as a Zener diode, regulating to a constant voltage dependent on current being supplied into the cathode. This is due to the internal amplifier and reference entering the proper operating regions. The same amount of current needed in the above feedback situation must be applied to this device in open loop, servo or error amplifying implementations in order for it to be in the proper linear region giving ATL431LI enough gain. Unlike many linear regulators, ATL431LI is internally compensated to be stable without an output capacitor between the cathode and anode. However, if it is desired to use an output capacitor Figure 13 can be used as a guide to assist in choosing the correct capacitor to maintain stability.
10.4 Device Functional Modes
10.4.1 Open Loop (Comparator)
When the cathode/output voltage or current of ATL431LI is not being fed back to the reference/input pin in any form, this device is operating in open loop. With proper cathode current (Ika) applied to this device, ATL431LI will have the characteristics shown in SLVA987. With such high gain in this configuration, ATL431LI is typically used as a voltage comparator. The integrated voltage reference makes the ATL431LI a flexible device for monitoring a signal for undervoltage and overvoltage detection.
10.4.2 Closed Loop
When the cathode/output voltage or current of ATL431LI is being fed back to the reference/input pin in any form, this device is operating in closed loop. The majority of applications involving ATL431LI use it in this manner to regulate a fixed voltage or current. The feedback enables this device to behave as an error amplifier, computing a portion of the output voltage and adjusting it to maintain the desired regulation. This is done by relating the output voltage back to the reference pin in a manner to make it equal to the internal reference voltage, which can be accomplished via resistive or direct feedback.
11 Applications and Implementation
validate and test their design implementation to confirm system functionality.
11.1 Application Information
Regulator, SLVA445 assists with setting the shunt voltage to achieve optimum accuracy for this device.
11.2 Typical Applications
11.2.1 Comparator With Integrated Reference
Figure 23. Comparator Application Schematic
11.2.1.1 Design Requirements
For this design example, use the parameters listed in Table 1 as the input parameters. Table 1. Design Parameters
11.2.1.2 Detailed Design Procedure
- Input Voltage Range
- Reference Voltage Accuracy
- Output logic input high and low level thresholds
- Current Source resistance
11.2.1.2.1 Basic Operation
being 0.08 mA, operation near that could result in low gain, leading to a slow response. Slow or inaccurate responses can also occur when the reference pin is not provided enough overdrive voltage. overdrive voltage provided, the faster the ATL431LI will respond. internal VREF should suffice.
11.2.1.2.2 Output Voltage and Logic Input Level
to the receiving low voltage logic device. outgoing logic's reliability. that will mitigate the error that IREF creates from VIN.
11.2.1.3 Application Curve
Figure 24. Output Response With Various Cathode Currents
11.2.2 Precision Constant Current Sink
Figure 25. Precision Constant Current Sink Application Schematic
11.2.2.1 Design Requirements
For this design example, use the parameters listed in Table 1 as the input parameters. Table 2. Design Parameters
11.2.2.2 Detailed Design Procedure
- Output Current Range
- Output Current Accuracy
- Power Consumption for ATL43xLI
11.2.2.2.1 Basic Operation
with accuracy set by itself and the sense resistor RS. This circuit can also be used as LED driving circuit. voltage reference devices such as TLV43x or TLVH43x. specification of these parameters.
11.2.2.2.2 Power Consumption
needs to be reached. This is accomplished by setting the external biasing resistor in series with the ATL43xLI.
11.2.3 Shunt Regulator/Reference
Figure 26. Shunt Regulator Schematic
11.2.3.1 Design Requirements
For this design example, use the parameters listed in Table 1 as the input parameters. Table 3. Design Parameters
11.2.3.2 Detailed Design Procedure
- Input Voltage Range
- Temperature Range
- Total Accuracy
- Cathode Current
- Reference Initial Accuracy
- Output Capacitance
11.2.3.2.1 Programming Output/Cathode Voltage
mitigate any gain error. This can be done by meeting the Imin spec denoted in Specifications.
11.2.3.2.2 Total Accuracy
- R1 and R2 accuracies
- VI(dev) - Change in reference voltage over temperature
- ΔVREF / ΔVKA - Change in reference voltage to the change in cathode voltage
- |zKA| - Dynamic impedance, causing a change in cathode voltage with cathode current Worst case cathode voltage can be determined taking all of the variables in to account. Application note Setting the Shunt Voltage on an Adjustable Shunt Regulator, SLVA445 assists designers in setting the shunt voltage to achieve optimum accuracy for this device.
11.2.3.2.3 Stability
11.2.3.2.4 Start-Up Time
11.2.3.3 Application Curve
Figure 27. ATL43xLIx Start-Up Response
11.2.4 Isolated Flyback with Optocoupler
Figure 28. Isolated Flyback with Optocoupler
11.2.4.1 Design Requirements
the parameters in Table 4 as the input parameters. Table 4. Design Parameters
11.2.4.1.1 Detailed Design Procedure
network is beyond the scope of this section. Details on compensation network can be found on SLUA671.
2 REF FB REF
1 OUT REF FB
Figure 29. Feedback Quiescent Current current through the feedback network cannot exceed 2mA. its low Imin of 80 µA which allows the IKA to be lower at a full load condition compared to typical TL431LI devices. is possible to lower IOPTNL to a value of 1.5 mA for a power loss of 30 mW. voltage. The design goal for the feedback resistor path is to minimize the resistor error while maintaining a low Iq. further decreased by using larger resistors.
11.3 System Examples
A. R should provide cathode current ≥ 0.08 mA to the ATL431LI at minimum V(BATT). Figure 30. Precision High-Current Series Regulator Figure 31. Output Control of a Three-Terminal Fixed Regulator Figure 32. High-Current Shunt Regulator
12 VDelay = R × C × I 12 V – V
Figure 36. PWM Converter With Reference Figure 37. Voltage Monitor Figure 38. Delay Timer
12 Power Supply Recommendations
limit the current being driven into the Ref pin, as not to exceed its absolute maximum rating. of the traces to have the proper current density.
13 Layout
13.1 Layout Guidelines
appropriate for the amount of current they are carrying; in the case of the ATL43xLIx, these currents will be low.
13.2 SOT23-3 Layout Example
Figure 41. DBZ Layout Example
13.3 X2SON (DQN) Layout Example
Figure 42. DQN Layout Example
D KA ANODE KAP (V V ) / I ATL431LI ATL432LI SLVSDU6D –JULY 2017–REVISED NOVEMBER 2019 www.ti.com Product Folder Links: ATL431LI ATL432LI Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated
13.4 Thermal Considerations
The thermal performance of the ATL431LI will depend on the power dissipation, thermal resistance, and ambient temperature. The ability to remove heat from the die is different for each package type, presenting different considerations in the printed-circuit-board (PCB) layout. The PCB area around the device that is free of other components moves the heat from the device to the ambient air. Performance data for JEDEC thermal metrics are given in the Specifications table. Power dissipation depends on input voltage and load conditions. Power dissipation (PD) is equal to the product of the output current and the voltage drop across the output pass element. For a ATL431LI, the pass element voltage drop will be across the cathode and anode as shown in Equation 5. In certain packages, like the DQN package, the thermal metrics will vary with how the thermal pad is connected. The DQN package is designed to be soldered to a thermal pad on the board. It is reccomended that the DQN thermal pad is conencted to a thermal dissipative section of the PCB if the ATL431LI in DQN package is expected to dissipate a significant amount of power. It is reccomended to use large biasing resistors to keep the cathode current low on the ATL431LI for better thermal performance. For more information on designing and manufacturing with DQN, see Texas Instruments literature number SLUA271 and SCEA055. For reliable operation, limit junction temperature to 125°C (maximum) or its respective temperature maximum from the Reccomended Operating Conditions. (5)
14 Device and Documentation Support
14.1 Documentation Support
14.1.1 Device Nomenclature
possible orderable combinations are located in the Package Option Addendum.
14.1.2 Related Documentation
- Understanding Stability Boundary Conditions Charts in TL431, TL432 Data Sheet, SLVA482
- Setting the Shunt Voltage on an Adjustable Shunt Regulator, SLVA445
14.2 Related Links
resources, tools and software, and quick access to order now. Table 5. Related Links
14.3 Receiving Notification of Documentation Updates
changed. For change details, review the revision history included in any revised document.
14.4 Community Resources
from the experts. Search existing answers or ask your own question to get the quick design help you need. not necessarily reflect TI's views; see TI's Terms of Use.
14.5 Trademarks
E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.
14.6 Electrostatic Discharge Caution
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
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14.7 Glossary
SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.
15 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
www.ti.com 10-Nov-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) ATL431LIAIDBZR Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes NIPDAU | SN Level-1-260C-UNLIM -40 to 85 1TUP ATL431LIAIDBZR.B Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 1TUP ATL431LIAIDQNR Active Production X2SON (DQN) | 4 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 IA ATL431LIAIDQNR.B Active Production X2SON (DQN) | 4 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 IA ATL431LIAQDBZR Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes NIPDAU | SN Level-1-260C-UNLIM -40 to 125 1BHP ATL431LIAQDBZR.B Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 1BHP ATL431LIAQDQNR Active Production X2SON (DQN) | 4 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 QA ATL431LIAQDQNR.B Active Production X2SON (DQN) | 4 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 QA ATL431LIBIDBZR Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes NIPDAU | SN Level-1-260C-UNLIM -40 to 85 1TVP ATL431LIBIDBZR.B Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 1TVP ATL431LIBIDQNR Active Production X2SON (DQN) | 4 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 IB ATL431LIBIDQNR.B Active Production X2SON (DQN) | 4 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 IB ATL431LIBQDBZR Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes NIPDAU | SN Level-1-260C-UNLIM -40 to 125 1BIP ATL431LIBQDBZR.B Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 1BIP ATL431LIBQDQNR Active Production X2SON (DQN) | 4 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 QB ATL431LIBQDQNR.B Active Production X2SON (DQN) | 4 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 QB ATL432LIAIDBZR Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes NIPDAU | SN Level-1-260C-UNLIM -40 to 85 1TWP ATL432LIAIDBZR.B Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 1TWP ATL432LIAQDBZR Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes NIPDAU | SN Level-1-260C-UNLIM -40 to 125 1BJP ATL432LIAQDBZR.B Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 1BJP ATL432LIBIDBZR Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes NIPDAU | SN Level-1-260C-UNLIM -40 to 85 1TXP ATL432LIBIDBZR.B Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 1TXP ATL432LIBQDBZR Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes NIPDAU | SN Level-1-260C-UNLIM -40 to 125 1BKP ATL432LIBQDBZR.B Active Production SOT-23 (DBZ) | 3 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 1BKP (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. Addendum-Page 1
www.ti.com 10-Nov-2025 (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF ATL431LI, ATL432LI :
- Automotive : ATL431LI-Q1, ATL432LI-Q1 NOTE: Qualified Version Definitions:
- Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 20-May-2026 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 20-May-2026 Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 20-May-2026 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ATL431LIAIDBZR SOT-23 DBZ 3 3000 210.0 185.0 35.0 ATL431LIAIDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0 ATL431LIAIDQNR X2SON DQN 4 3000 184.0 184.0 19.0 ATL431LIAQDBZR SOT-23 DBZ 3 3000 210.0 185.0 35.0 ATL431LIAQDQNR X2SON DQN 4 3000 184.0 184.0 19.0 ATL431LIBIDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0 ATL431LIBIDQNR X2SON DQN 4 3000 184.0 184.0 19.0 ATL431LIBQDBZR SOT-23 DBZ 3 3000 210.0 185.0 35.0 ATL431LIBQDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0 ATL431LIBQDQNR X2SON DQN 4 3000 184.0 184.0 19.0 ATL432LIAIDBZR SOT-23 DBZ 3 3000 210.0 185.0 35.0 ATL432LIAIDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0 ATL432LIAQDBZR SOT-23 DBZ 3 3000 210.0 185.0 35.0 ATL432LIBIDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0 ATL432LIBIDBZR SOT-23 DBZ 3 3000 210.0 185.0 35.0 ATL432LIBQDBZR SOT-23 DBZ 3 3000 180.0 180.0 18.0 ATL432LIBQDBZR SOT-23 DBZ 3 3000 210.0 185.0 35.0 Pack Materials-Page 3
www.ti.com PACKAGE OUTLINE C 0.20
0.08 TYP
0.25 2.64 2.10
1.12 MAX
0.10
0.01 TYP
3X 0.5 0.3 0.6
0.2 TYP
1.9 0.95 0 -8 TYP 4X 0 -15 4X 4 -15 A 3.04 2.80 B1.4 1.2 (0.95) (0.15) (0.125) SOT-23 - 1.12 mm max heightDBZ0003A SMALL OUTLINE TRANSISTOR 4214838/F 08/2024 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Reference JEDEC registration TO-236, except minimum foot length. 4. Support pin may differ or may not be present. 5. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.25mm per side
0.2 C A B
0.1 C SCALE 4.000
www.ti.com EXAMPLE BOARD LAYOUT
0.07 MAX
0.07 MIN
3X (1.3) 3X (0.6) (2.1) 2X (0.95) (R0.05) TYP 4214838/F 08/2024 SOT-23 - 1.12 mm max heightDBZ0003A SMALL OUTLINE TRANSISTOR NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. SYMM LAND PATTERN EXAMPLE SCALE:15X PKG SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED METALSOLDER MASK OPENING NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DETAILS
www.ti.com EXAMPLE STENCIL DESIGN (2.1) 2X(0.95) 3X (1.3) 3X (0.6) (R0.05) TYP SOT-23 - 1.12 mm max heightDBZ0003A SMALL OUTLINE TRANSISTOR 4214838/F 08/2024 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON 0.125 THICK STENCIL SCALE:15X SYMM PKG
DQN0004A X2SON - 0.4 mm max height PLASTIC SMALL OUTLINE - NO LEAD 4215302/E 12/2016 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance. 4. Features may not exist. Recommend use of pin 1 marking on top of package for orientation purposes. 5. Shape of exposed side leads may differ. 6. Number and location of exposed tie bars may vary. www.ti.com B A SEATING PLANE C 0.08 PIN 1 INDEX AREA
0.1 C A B
0.05 C PIN 1 ID (OPTIONAL) NOTE 4 EXPOSED THERMAL PAD 2 3 1.05 0.95 1.05 0.95
0.4 MAX
2X 0.65 0.48+0.12 -0.1 3X 0.30 0.15 0.3 0.2 4X 0.28 0.15 0.05 0.00 (0.11) NOTE 5 NOTE 6 NOTE 6 (0.07) TYP (0.05) TYP
DQN0004A X2SON - 0.4 mm max height PLASTIC SMALL OUTLINE - NO LEAD 4215302/E 12/2016 NOTES: (continued) 7. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271) . 8. If any vias are implemented, it is recommended that vias under paste be filled, plugged or tented. www.ti.com SOLDER MASK DEFINED SOLDER MASK DETAIL
0.05 MIN
SCALE: 40X SYMM SYMM 4X (0.21) 4X (0.36) (0.65) (0.86) ( 0.48) SEE DETAIL 4X (0.18) (0.22) TYP EXPOSED METAL CLEARANCE (0.03) EXPOSED METAL
DQN0004A X2SON - 0.4 mm max height PLASTIC SMALL OUTLINE - NO LEAD 4215302/E 12/2016 NOTES: (continued) 9. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com SOLDER PASTE EXAMPLE BASED ON 0.075 - 0.1mm THICK STENCIL EXPOSED PAD 88% PRINTED SOLDER COVERAGE BY AREA SCALE: 60X SYMM SYMM SOLDER MASK EDGE 4X (0.21) 4X (0.4) (0.65) (0.9) ( 0.45) 4X (0.03) 4X (0.235) 4X (0.22)
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