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Document overview
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Technical content
Features
Programmable Driver Current Regulation Antenna Driver Stage for 1 A Peak Current LF Baudrates between 1 kbaud to 8 kbaud Integrated Oscillator for Ceramic Resonators Two Inputs for Push-button Switches Bi-directional Single-wire Interface Diagnosis Function and Overtemperature Protection Quick Start Control (QSC) for Fast Oscillation Build-up and Decay Timing Operation Temperature -40°C to +85°C Carrier Frequency Range from 100 kHz to 150 kHz Amplitude Shift Keying (ASK) Modulation Phase Shift Keying (PSK) Modulation Power Supply Range 7 V to 16 V Direct Battery Input (6 V and 28 V with Limited Function Range) EMI and ESD According to Automotive Requirements Highly Integrated — Less External Components Required
Applications
Car Access Benefits Dedicated for Decentralized Systems Constant Magnetic Field Strength Electrostatic sensitive device. Observe precautions for handling.
Description
The circuit is an integrated BCDMOS antenna driver IC dedicated as a transmitter for Passive Entry/Go (PEG) car applications and for other handsfree access control applications. It includes the full functionality to generate a magnetic LF field in conjunction with an antenna coil to transmit data to a receiver in a key fob, card or transponder. The trans- mission can be controlled via an one wire I/O interface (DIO) by an external control unit. Stand-alone Antenna Driver ATA5277 Preliminary
2 ATA5277 [Preliminary]
Figure 1. Block Diagram Figure 2. Pinning QFN 28
ATA5277 [Preliminary] 4669B–RKE–10/03 Pin Description Pin Symbol Function
1 PGND1 Power supply ground
2 PGND2 Power supply ground
3 PGND3 Power supply ground
4 VDS Driver voltage supply input
5 DRV1 Antenna driver stage output
6 CBOOST External bootstrap capacitor connection
7 NC Not connected
8 QSC QSC transistor driver stage output
9 VSHUNT Antenna current sensing
10 AGND Analog ground (sensoric and antenna driver)
11 DGND Digital ground (logic)
12 CINT External integrator capacitor connection
13 VDIO DIO line interface supply voltage
14 DIO One-wire serial interface line
15 SCANI For test purposes only
16 TEST For test purposes only
17 CLKO Clock output
18 OSCO Oscillator output (for resonator/crystal connection)
19 OSCI Oscillator input (for external source or resonator/crystal)
20 VDD 5 V supply output (for filter capacitor only)
21 SW1 Door switch input 1
22 VSW Door switch interface supply voltage
23 SW2 Door switch input 2
24 VBATT Battery supply voltage 7 V to 16 V (28 V jump start)
25 SCANE For test purposes only
26 VL1 Coil input of the switch mode power supply
27 VL2 Coil input of the switch mode power supply
28 VL3 Coil input of the switch mode power supply
4 ATA5277 [Preliminary]
4669B–RKE–10/03 Functional Description General Description The IC contains a half-bridge coil driver stage with a special driver voltage regulator and control logic with diagnosis circuitry. Further it contains a one-wire bi-directional micro- controller interface for the carrier modulation and the mode selection. An integrated oscillator for ceramic resonators generates the clock signal for the control logic. Addi- tionally, the IC contains two connectors for switches to wake-up the IC. The IC generates an electromagnetic LF field in combination with an LC antenna cir- cuitry. The carrier frequency for the antenna is generated by the oscillator and prescaler logic. The LF field can be modulated to transmit data to a suitable receiver. There are two modulation modes available, Amplitude Shift Keying (ASK) and 180° Phase Shift Keying (PSK). A microcontroller or another control unit must be used to control the transmitter via the bi-directional single-wire interface. A boost converter power supply is used to supply the driver half-bridge and the antenna with a high voltage and a regulated current even if the battery voltage is low. The antenna current is programmable in 16 steps to support a transmission with various field strengths. The driver circuitry is Short Circuit (SC) protected and the driver logic contains diagnosis functions for short circuit and open wire detection at the antenna outputs. Operation Modes Three different operation modes are defined: Standby Command mode Modulation mode After power-on reset, the ATA5277 is in standby mode. To achieve minimum power con- sumption, only the internal 5-V supply, the DIO-line interface and the door switch inputs are active. The IC can be activated either by the external control unit via the serial inter- face or by one of the switch inputs. A low signal at the DIO-line or at the switch inputs (SW1, SW2) powers up the IC. If this is done at a switch input, a low signal is generated on the DIO-line which can be used as a wake-up signal for the connected microcontroller. In command mode, the IC can be configured and diagnostics can be run. This mode is always activated after wake-up from standby mode and after leaving modulation mode. The communication is based on a one-wire serial interface (DIO-line) with the con- nected microcontroller being the master and ATA5277 being the slave. In this mode, the antenna driver stage is disabled, except if the automatic field generation after wake-up is selected. In modulation mode, the antenna driver stage is activated (if enabled) and the data applied to the DIO-line modulates the LF field (in ASK or PSK). This mode is activated after the command mode and remains active as long as data is applied to the DIO-line (i.e., until a timeout has occured). After that, the IC falls back to command mode. Standby and Wake-up There are two different wake-up modes. In the default mode the antenna driver stage remains off after wake-up. The second mode can be programmed by a control com- mand. Here, also the driver output stage is enabled. The IC generates the carrier signal for the antenna immediately.
6 ATA5277 [Preliminary]
The second way to shut down the ATA5277 is to set the STBY bit to control command 0. Figure 6. Structure of One Communication Bit '0' needs to be transmitted). This signal on the DIO-line is then valid for tdata,maximum.
8 ATA5277 [Preliminary]
applied right after the acknowledge bit of the preceding command. mode to command mode, even with the M_Wake bit set to '1'. Command Tables The following tables contain the description of the eight ATA5277 commands. Table 1. Control Command 0 Table 2. Control Command 1
Table 3. Control Command 2 Table 4. Status Command 3 Table 5. Status Command 4
10 ATA5277 [Preliminary]
Table 6. Status Command 5 Table 7. Status Command 6 Table 8. Status Command 7
12 ATA5277 [Preliminary]
by the integrated fault detection unit. and the capacitor have to be applied externally. Table 9. Current Settings
ATA5277 [Preliminary] 4669B–RKE–10/03 The maximum output current can be selected with the external shunt resistor. Its resis- tance can be calculated with the formula: where the minimum and maximum ratings for I maximum,peak quoted in the DC characteris- tics have to be considered. See Figure 11 to determine the antenna´s parameters. The maximum reachable output current can be calculated as follows: Here, VDRV is the maximum reachable driver voltage (40 V) and Z the antenna´s imped- ance (inculding the RDSon of the QSC MOSFET, the shunt resistor and the driver output resistance). Fault Diagnotics The IC contains several fault diagnotic stages to protect itself from destruction and to provide diagnostic information. Once there is a fault detected, both the switch mode power supply and the antenna driver stage are switched off and the corresponding fault information is written into the status register. Note that besides shutting down the driver stages, the ATA5277 will not change its behaviour (i.e., it will remain in modulation mode until the DIO line timeout has occured). The fault information can be read out from status command 4, which will also reset the status register. Following protection and diagnostic mechanisms are defined: General – The IC is equipped with temperature measurement obilities in order to detect a critical junction temperature DRV output – Short-circuit protection of the driver stage output is realized by means of voltage monitoring. Thus, the output voltage is compared to a corresponding threshold (depeding on the active transistor in the power MOS half-bridge). If this threshold is surpassed for several oscillations, a Short Circuit (SC) fault is detected; – Open load or QSC transistor SC to GND is detected with the external current sensing resistor RShunt. If there is no signal at this point even if the output is active, there is at least one of those two faults present. There is no possibility to determine the exact fault source. The diagnostic bits contain the information as given in Table 10 on page 14. Rshunt Imax,peak Iant,peak VDRV 2/g180
14 ATA5277 [Preliminary]
DD (5 V) for 5 V operation or to VBATT for 12 V operation. The state of the switches is determined by the voltage level at the corresponding pin. bits in the command register 2. output stage, this signal is not suited to supply any device beyond the PCB boundaries. clock rate (typical 8 MHz) or '1' for the half clock rate (4 MHz). Table 10. Diagnostic Bits
011 N o t d e f i n e d
111 N o t d e f i n e d
ATA5277 [Preliminary] 4669B–RKE–10/03 Application Hints Figure 11. Antenna Coil Inductance versus Quality Figure 11 shows the maximum usable antenna coil inductance in order to meet the requirements (maximum output voltage of 40 V square wave, output peak current of 1 A, maximum frequency deviation of antenna is ±2.5%). 0.0001 0.00015 0.0002 0.00025 0.0003 0.00035 0.0004 0.00045 0.0005 4 6 8 1 01 21 41 61 82 02 2 quality Q inductnce L[H] antenna ind. Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameters Symbol Value Unit Supply voltage V BA TT -0.3 to +44 V Input voltage V IN VSS-0.3 /g163/g32VIN /g163/g3244 V Power dissipation (IC, QFN) P tot 2W Emission EMI 250 V/M Minimum ESD protection (100 pF through 1.5 k) ESD 2 (onboard pins) 4 (offboard pins) kV Junction temperature T J 150 /g176C Storage temperature range T stg -55 to +150 /g176C Note: 1. Voltages are given relative to V SS. Thermal Resistance Parameters Symbol Value Unit Thermal resistance junction-case R thJC 5K / W Thermal resistance junction-ambient (QFN28) R thJA 32 K/W Operating Range Parameters Symbol Value Unit Power supply range V BA TT 7 to 16.5 V Operating temperature range T amb -40 to +85 /g176C
16 ATA5277 [Preliminary]
4669B–RKE–10/03 Electrical Characteristics (1) No. Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type*
1 Power Supply
1.1 Operating voltage 24 V BA TT 7 (2) 16.5 (2) VD 1.2 SMPS voltage range 4 V VDS 16.5 40 V D
1.3 Switching frequency 26, 27,
1.4 Current regulation set up
time treg 11 , 5 m s D 1.5 Supply current V S = 7 V I SUP 3.5 A eff D
1.6 Standby current IC in standby,
VBATT = 12 V 24 I STB TBD µA A 1.7 Power on reset V BATT 24 V POR 4.2 4.7 V A
1.8 OV discharger IC in standby,
VBATT > 23 V 24 I DIS 9.5 mA A 1.9 Internal 5 V supply 20 V VDD 4.7 5.3 V A
1.10 Integrator current After fusing =
12 I CINT 18 22 µA A
1.11 dV CP for high side Clamping V BOOST 6d V CP 7.7 8.9 V A
1.12 Thermal shutdown
reference = VSCANI
15 T jsd 155 °C B
2 Serial Interface
2.1 Data output current 14 I DIO 10 20 mA A
2.2 Output low level I DIO = 20 mA 14 V Lout 1.2 1.5 V A 2.3 Input impedance 14 R in 0.6 3.5 M /g87 A 2.4 Input low level 5 V /g163/g32VDIO /g163/g32VBA TT 14 V Lin 0.4 /g180/g32VDIO VA 2.5 Input high level 5 V /g163/g32VDIO /g163/g32VBA TT 14 V Hin 0.7 /g180 VDIO VA
2.6 Serial Interface baud rate 14 Bd IF 5 kbit/s D
2.7 Signal rise-time (L to H) 14 t rise 01 µ s A
2.8 Signal fall-time (H to L) 14 t fall 01 µ s A
2.9 Wake-up debounce time 14 t deb 550 µs D
2.10 Wake-up impulse length 14 t wake 20 50 µs D
2.11 Minimum synchronize
time 14 t sync 20 µs D
2.12 Maximum set-up time 14 t setup 50 µs D
2.13 Data valid time for input 14 t data,in 140 µs D
2.14 Data valid time for output 14 t data,out 140 160 µs D
2.15 Recovery time 14 t recover 20 µs D
2.16 Bit length 14 t bit 200 µs D
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Notes: 1. 7 V < V BA TT < 16.5 V; Tamb = 25°C unless otherwise specified; all values refer to GND pins 2. 6 V possible with approximately 30% decrease of maximum output power; 28 V operation possible (jump start), but output current stability is not guranteed
ATA5277 [Preliminary] 4669B–RKE–10/03
3 Driver Stage
3.1 Coil driver output voltage Square wave 4 V VDS VBATT 40 V A
3.2 Coil driver output current Depends on
antenna inductance 5I DRV,peak 1A peak D 3.3 Coil driver resistance 5 R DRV 0.4 /g87 A
3.4 QSC driver output
3.5 QSC driver output
current Short-term loads 8 I QSC 50 mA A
3.6 QSC driver output
highside-impedance 8R QSCh 3 /g87 A
3.7 QSC driver output
lowside-impedance 8R QSCl 3 /g87 A
3.8 Carrier frequency range 5 f CF 100 150 kHz D
3.9 LF data baud rate Bi-phase/
Manchester 5B d RF 1 8 kbit/s D
3.10 Output rise/fall time Between 10% and
90% of driver supply 26, 27, 28 trf TBD s A 3.11 Output duty cycle 5 D CF 12.5 50 % A
4 Door Switch Inputs
4.1 Trigger voltage level 5 V /g163/g32VSW /g163/g32VBATT 21, 23 V SWtrig 0.4 /g180/g32VSW VA
4.2 Output current (pull-up) 21, 23 I SW 82 0 4 0 m A A
4.3 Input debounce time 17 t deb 2m s A
4.4 Oscillator set-up time Dependent on
ceramic resonator 17 t oscon 500 µs D
5 Oscillator
5.1 Input frequency range
Ceramic resonator, crystal or external CLKO source 17 f OSC 6.4 10 MHz B
5.2 CLKO-output frequency SCANI change 17 f OUT fOSC/2 4 f OSC MHz A
5.3 CLKO high level 17 V HCLKO 4.4 7.1 V A 5.4 CLKO low level 17 V LCLKO 2.2 V A Electrical Characteristics (1) (Continued) No. Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type* *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Notes: 1. 7 V < V BA TT < 16.5 V; Tamb = 25°C unless otherwise specified; all values refer to GND pins 2. 6 V possible with approximately 30% decrease of maximum output power; 28 V operation possible (jump start), but output current stability is not guranteed Soldering Recommendations Parameters Symbol Value Unit Maximum heating rate T D 1 to 3 °C/s Peak temperature in preheat zone Z PH 100 to 140 °C Duration of time above melting point of solder t MP 10 min/75 max s Peak reflow temperature T Peak 220 to 225 °C Maximum cooling rate T rPeak 2 to 4 °C/s
18 ATA5277 [Preliminary]
Figure 12. Application Circuit
ATA5277 [Preliminary] 4669B–RKE–10/03
Package Information
Ordering Information
Extended Type Number Package Remarks ATA5277-PCQ QFN28 7 mm /g180 7 mm
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