AT93C66A-10SE-2.7

AT93C56A ATMEL

Document overview

• Manufacturer or author: Provided By digicamel.com
• PDF pages: 18

Technical content

Features

• Low-voltage and Standard-voltage Operation –2 . 7 ( VCC = 2.7V to 5.5V) –1 . 8 ( VCC = 1.8V to 5.5V)  User-selectable Internal Organization – 2K: 256 x 8 or 128 x 16 – 4K: 512 x 8 or 256 x 16  3-wire Serial Interface  Sequential Read Operation  2 MHz Clock Rate (5V)  Self-timed Write Cycle (10 ms Max)  High Reliability – Endurance: 1 Million Write Cycles – Data Retention: 100 Years  Automotive Grade, Extended Temperature, and Lead-free/Halogen-free Devices Available  8-lead PDIP , 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead MAP , 8-lead TSSOP , and 8-ball dBGA2™ Packages

Description

The A T93C56A/66A provides 2048/4096 bits of serial electrically erasable program- mable read-only memory (EEPROM) organized as 128/256 words of 16 bits each when the ORG pin is connected to VCC and 256/512 words of 8 bits each when it is tied to ground. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operations are essential. The AT93C56A/66A is available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead MAP , 8-lead TSSOP , and 8-ball dBGA2™ packages. 3-wire Serial EEPROMs 2K (256 x 8 or 128 x 16) 4K (512 x 8 or 256 x 16) AT93C56A AT93C66A Advance Information Rev. 3378F–SEEPR–04/04 Pin Configurations Pin Name Function CS Chip Select SK Serial Data Clock DI Serial Data Input DO Serial Data Output GND Ground VCC Power Supply ORG Internal Organization DC Don’t Connect 8-lead PDIP CS SK DI DO VCC DC ORG GND 8-lead SOIC CS SK DI DO VCC DC ORG GND 8-lead TSSOP CS SK DI DO VCC DC ORG GND 8-lead MAP Bottom View VCC DC ORG GND CS SK DI DO 8-ball dBGA2 Bottom View VCC DC ORG GND CS SK DI DO

3378F–SEEPR –04/04 The AT93C56A/66A is enabled through the Chip Select pin (CS) and accessed via a 3-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SK). Upon receiving a READ instruction at DI, the address is decoded and the data is clocked out serially on the data output pin DO. The WRITE cycle is completely self- timed and no separate ERASE cycle is required before WRITE. The WRITE cycle is only enabled when the part is in the ERASE/WRITE ENABLE state. When CS is brought “high” following the initiation of a WRITE cycle, the DO pin outputs the READY/BUSY status of the part. Block Diagram Note: When the ORG pin is connected to VCC, the x 16 organization is selected. When it is connected to ground, the x 8 organization is selected. If the ORG pin is left unconnected and the application does not load the input beyond the capability of the internal 1 Meg ohm pullup, then the x 16 organization is selected. The feature is not available on the 1.8V devices. Absolute Maximum Ratings* Maximum Ratings” may cause permanent dam- age to the device. This is a stress rating only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability Voltage on Any Pin

3378F–SEEPR –04/04 Note: 1. This parameter is characterized and is not 100% tested. Note: 1. V IL min and VIH max are reference only and are not tested. Pin Capacitance(1) Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +5.0V (unless otherwise noted). Symbol Test Conditions Max Units Conditions C OUT Output Capacitance (DO) 5 pF V OUT = 0V C IN Input Capacitance (CS, SK, DI) 5 pF V IN = 0V DC Characteristics Applicable over recommended operating range from: TAI = −40°C to +85°C, VCC = +1.8V to +5.5V, TAE = −40°C to +125°C, VCC = +1.8V to +5.5V (unless otherwise noted). Symbol Parameter Test Condition Min Typ Max Unit VCC1 Supply Voltage 1.8 5.5 V VCC2 Supply Voltage 2.7 5.5 V VCC3 Supply Voltage 4.5 5.5 V ICC Supply Current V CC = 5.0V READ at 1.0 MHz 0.5 2.0 mA WRITE at 1.0 MHz 0.5 2.0 mA ISB1 Standby Current V CC = 1.8V CS = 0V 0 0.1 µA ISB2 Standby Current V CC = 2.7V CS = 0V 6.0 10.0 µA ISB3 Standby Current V CC = 5.0V CS = 0V 17 30 µA IIL Input Leakage V IN = 0V to VCC 0.1 3.0 µA IOL Output Leakage V IN = 0V to VCC 0.1 3.0 µA VIL1 (1) VIH1 (1) Input Low Voltage Input High Voltage 2.7V ≤ VCC ≤ 5.5V −0.6 2.0 0.8 VCC + 1 V VIL2 (1) VIH2 (1) Input Low Voltage Input High Voltage 1.8V ≤ VCC ≤ 2.7V −0.6 VCC x 0.7 VCC x 0.3 VCC + 1 V VOL1 VOH1 Output Low Voltage Output High Voltage2.7V ≤ VCC ≤ 5.5V IOL = 2.1 mA 0.4 V IOH = −0.4 mA 2.4 V VOL2 VOH2 Output Low Voltage Output High Voltage1.8V ≤ VCC ≤ 2.7V IOL = 0.15 mA 0.2 V IOH = −100 µA V CC − 0.2 V

3378F–SEEPR –04/04 Note: 1. This parameter is characterized and is not 100% tested. AC Characteristics Applicable over recommended operating range from TAI = −40°C to + 85°C, TAE = −40°C to +125°C, VCC = As Specified, CL = 1 TTL Gate and 100 pF (unless otherwise noted). Symbol Parameter Test Condition Min Typ Max Units fSK SK Clock Frequency 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V 1.8V ≤ VCC ≤ 5.5V 0.25 MHz t SKH SK High Time 2.7V ≤ VCC ≤ 5.5V 1.8V ≤ VCC ≤ 5.5V 250 1000 ns tSKL SK Low Time 2.7V ≤ VCC ≤ 5.5V 1.8V ≤ VCC ≤ 5.5V 250 1000 ns tCS Minimum CS Low Time 2.7V ≤ VCC ≤ 5.5V 1.8V ≤ VCC ≤ 5.5V 250 1000 ns tCSS CS Setup Time Relative to SK 2.7V ≤ VCC ≤ 5.5V 1.8V ≤ VCC ≤ 5.5V 200 ns tDIS DI Setup Time Relative to SK 2.7V ≤ VCC ≤ 5.5V 1.8V ≤ VCC ≤ 5.5V 100 400 ns tCSH CS Hold Time Relative to SK 0 ns tDIH DI Hold Time Relative to SK 2.7V ≤ VCC ≤ 5.5V 1.8V ≤ VCC ≤ 5.5V 100 400 ns tPD1 Output Delay to “1” AC Test 2.7V ≤ VCC ≤ 5.5V 1.8V ≤ VCC ≤ 5.5V 250 1000 ns tPD0 Output Delay to “0” AC Test 2.7V ≤ VCC ≤ 5.5V 1.8V ≤ VCC ≤ 5.5V 250 1000 ns tSV CS to Status Valid AC Test 2.7V ≤ VCC ≤ 5.5V 1.8V ≤ VCC ≤ 5.5V 250 1000 ns tDF CS to DO in High Impedance AC Test CS = VIL 2.7V ≤ VCC ≤ 5.5V 1.8V ≤ VCC ≤ 5.5V 150 400 ns tWP Write Cycle Time 10 ms 4.5V ≤ VCC ≤ 5.5V 0.1 3 ms Endurance(1) 5.0V, 25°C, Page Mode 1M Write Cycles

3378F–SEEPR –04/04 Note: The X ’s in the address field represent don’t care values and must be clocked. Functional Description The AT93C56A/66A is accessed via a simple and versatile 3-wire serial communication interface. Device operation is controlled by seven instructions issued by the host pro- cessor. A valid instruction starts with a rising edge of CS and consists of a Start Bit (logic “1”) followed by the appropriate Op Code and the desired memory address location. READ (READ): The Read (READ) instruction contains the address code for the mem- ory location to be read. After the instruction and address are decoded, data from the selected memory location is available at the serial output pin DO. Output data changes are synchronized with the rising edges of serial clock SK. It should be noted that a dummy bit (logic “0”) precedes the 8- or 16-bit data output string. The AT93C56A/66A supports sequential read operations. The device will automatically increment the inter- nal address pointer and clock out the next memory location as long as Chip Select (CS) is held high. In this case, the dummy bit (logic “0”) will not be clocked out between mem- ory locations, thus allowing for a continuous stream of data to be read. ERASE/WRITE (EWEN): To assure data integrity, the part automatically goes into the Erase/Write Disable (EWDS) state when power is first applied. An Erase/Write Enable (EWEN) instruction must be executed first before any programming instructions can be carried out. Please note that once in the EWEN state, programming remains enabled until an EWDS instruction is executed or V CC power is removed from the part. ERASE (ERASE): The Erase (ERASE) instruction programs all bits in the specified memory location to the logical “1” state. The self-timed erase cycle starts once the ERASE instruction and address are decoded. The DO pin outputs the READY/BUSY status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS ). A logic “1” at pin DO indicates that the selected memory location has been erased, and the part is ready for another instruction. Instruction Set for the AT93C56A and AT93C66A Instruction SB Op Code Address Data Commentsx 8 x 16 x 8 x 16 READ 1 10 A 8 – A0 A7 – A0 Reads data stored in memory, at specified address. EWEN 1 00 11XXXXXXX 11XXXXXX Write enable must precede all programming modes. ERASE 1 11 A 8 – A0 A7 – A0 Erases memory location An – A0. WRITE 1 01 A 8 – A0 A7 – A0 D 7 – D0 D 15 – D0 Writes memory location An – A0. ERAL 1 00 10XXXXXXX 10XXXXXX Erases all memory locations. Valid only at VCC = 4.5V to 5.5 V. WRAL 1 00 01XXXXXXX 01XXXXXX D 7 – D0 D 15 – D0 Writes all memory locations. Valid only at VCC = 5.0V ±10% and Disable Register cleared. EWDS 1 00 00XXXXXXX 00XXXXXX Disables all programming instructions.

3378F–SEEPR –04/04 WRITE (WRITE): The Write (WRITE) instruction contains the 8 or 16 bits of data to be written into the specified memory location. The self-timed programming cycle tWP starts after the last bit of data is received at serial data input pin DI. The DO pin outputs the READY/BUSY status of the part if CS is brought high after being kept low for a minimum of 250 ns (t CS ). A logic “0” at DO indicates that programming is still in progress. A logic “1” indicates that the memory location at the specified address has been written with the data pattern contained in the instruction and the part is ready for further instructions. A READY/BUSY status cannot be obtained if the CS is brought high after the end of the self-timed programming cycle t WP . ERASE ALL (ERAL): The Erase All (ERAL) instruction programs every bit in the mem- ory array to the logic “1” state and is primarily used for testing purposes. The DO pin outputs the READY/BUSY status of the part if CS is brought high after being kept low for a minimum of 250 ns (t CS ). The ERAL instruction is valid only at VCC = 5.0V ± 10%. WRITE ALL (WRAL) : The Write All (WRAL) instruction programs all memory locations with the data patterns specified in the instruction. The DO pin outputs the READY/BUSY status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS ). The WRAL instruction is valid only at VCC = 5.0V ± 10%. ERASE/WRITE DISABLE (EWDS): To protect against accidental data disturb, the Erase/Write Disable (EWDS) instruction disables all programming modes and should be executed after all programming operations. The operation of the READ instruction is independent of both the EWEN and EWDS instructions and can be executed at any time. Timing Diagrams Synchronous Data Timing Note: 1. This is the minimum SK period.

3378F–SEEPR –04/04 Notes: 1. A 8 is a DON’T CARE value, but the extra clock is required. 2. A7 is a DON’T CARE value, but the extra clock is required. READ Timing EWEN Timing Organization Key for Timing Diagrams I/O AT93C56A (2K) AT93C66A (4K) x 8 x 16 x 8 x 16 AN A8 (1) A7 (2) A8 A7 D N D 7 D 15 D 7 D 15 High Impedance tCS CS 11 ...001 SK DI tCS

3378F–SEEPR –04/04 EWDS Timing WRITE Timing WRAL Timing (1) Note: 1. Valid only at VCC = 4.5V to 5.5V . CS tCS SK DI 1 0 000 ... SK CS tCS tWP DO HIGH IMPEDANCE BUSY READY CS SK DI O HIGH IMPEDANCE BUSY READY 1 0 0 1 ... D N tCS tWP ... D00

3378F–SEEPR –04/04 ERASE Timing ERAL Timing (1) Note: 1. Valid only at VCC = 4.5V to 5.5V . SK 1 1 ...1 CS DI A N tCS tSV tDF tWP AN-1 AN-2 A0 CHECK STATUS STANDBY READY BUSYDO HIGH IMPEDANCE HIGH IMPEDANCE SK CS DI 1 1 000 DO HIGH IMPEDANCE HIGH IMPEDANCE READY BUSY CHECK STATUS STANDBY tWP tCS tSV tDF

3378F–SEEPR –04/04 Note: For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics table. Ordering Code Package Operation Range A T93C56A-10PI-2.7 A T93C56A-10SI-2.7 A T93C56AW-10SI-2.7 A T93C56A-10TI-2.7 A T93C56AU3-10UI-2.7 A T93C56AY1-10YI-2.7 8P3 8S1 8S2 8A2 8U3-1 8Y1 Industrial T emperature (−40°C to 85°C) A T93C56A-10PI-1.8 A T93C56A-10SI-1.8 A T93C56AW-10SI-1.8 A T93C56A-10TI-1.8 A T93C56AU3-10UI-1.8 A T93C56AY1-10YI-1.8 8P3 8S1 8S2 8A2 8U3-1 8Y1 Industrial T emperature (−40°C to 85°C) A T93C56A-10SU-2.7 A T93C56A-10SU-1.8 A T93C56A-10TU-2.7 A T93C56A-10TU-1.8 8S1 8S1 8A2 8A2 Lead-free/Halogen-free/ Industrial T emperature (−40°C to 85°C) A T93C56A-10SQ-2.7 8S1 Lead-free/Halogen-free/ High Grade/Extended Temperature (−40°C to 125°C) A T93C56A-10SE-2.7 8S1 High Grade/Extended Temperature (−40°C to 125°C) Package Type 8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8S2 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) 8A2 8-lead, 0.170” Wide, Thin Shrink Small Outline Package (TSSOP) 8U3-1 8-ball, die Ball Grid Array Package (dBGA2) 8Y1 8-lead, 4.90 mm x 3.00 mm Body, Dual Footprint, Non-leaded, Miniature Array Package (MAP) Options −−−−2.7 Low-voltage (2.7V to 5.5V) 1.8 Low-voltage (1.8V to 5.5V)

3378F–SEEPR –04/04 Note: For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics table. Ordering Code Package Operation Range A T93C66A-10PI-2.7 A T93C66A-10SI-2.7 A T93C66AW-10SI-2.7 A T93C66A-10TI-2.7 A T93C66AU3-10UI-2.7 A T93C66AY1-10YI-2.7 8P3 8S1 8S2 8A2 8U3-1 8Y1 Industrial (−40°C to 85°C) A T93C66A-10PI-1.8 A T93C66A-10SI-1.8 A T93C66AW-10SI-1.8 A T93C66A-10TI-1.8 A T93C66AU3-10UI-1.8 A T93C66AY1-10YI-1.8 8P3 8S1 8S2 8A2 8U3-1 8Y1 Industrial (−40°C to 85°C) A T93C66A-10SU-2.7 A T93C66A-10SU-1.8 A T93C66A-10TU-2.7 A T93C66A-10TU-1.8 8S1 8S1 8A2 8A2 Lead-free/Halogen-free/ Industrial Temperature (−40°C to 85°C) A T93C66A-10SQ-2.7 8S1 Lead-free/Halogen-free/ High Grade/Extended T emperature (−40°C to 125°C) A T93C66A-10SE-2.7 8S1 High Grade/Extended T emperature (−40°C to 125°C) Package Type 8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8S2 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) 8A2 8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) 8U3-1 8-ball, die Ball Grid Array Package (dBGA2) 8Y1 8-lead, 4.90 mm x 3.00 mm Body, Dual Footprint, Non-leaded, Miniature Array Package (MAP) Options −−−−2.7 Low-voltage (2.7V to 5.5V) −−−−1.8 Low-voltage (1.8V to 5.5V)

3378F–SEEPR –04/04 Packaging Information 8P3 – PDIP

2325 Orchard Parkway

San Jose, CA 95131 TITLE DRAWING NO. R REV. 8P3, 8-lead, 0.300" Wide Body, Plastic Dual In-line Package (PDIP) 01/09/02 8P3 B D E e Lb2 b A2 A N eA c

4 PLCS

(Unit of Measure = inches) SYMBOL MIN NOM MAX NOTE Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information. 2. Dimensions A and L are measured with the package seated in JEDEC seating plane Gauge GS-3. 3. D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed 0.010 inch. 4. E and eA measured with the leads constrained to be perpendicular to datum. 5. Pointed or rounded lead tips are preferred to ease insertion. A 0.210 2 A2 0.115 0.130 0.195 b 0.014 0.018 0.022 5 b2 0.045 0.060 0.070 6 b3 0.030 0.039 0.045 6 c 0.008 0.010 0.014 D 0.355 0.365 0.400 3 D1 0.005 3 E 0.300 0.310 0.325 4 E1 0.240 0.250 0.280 3 e 0.100 BSC eA 0.300 BSC 4 L 0.115 0.130 0.150 2

3378F–SEEPR –04/04 8S1 – JEDEC SOIC 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TITLE DRAWING NO. R REV. Note: 10/7/03 8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) 8S1 B COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE A1 0.10 – 0.25 These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. A 1.35 – 1.75 b 0.31 – 0.51 C 0.17 – 0.25 D 4.80 – 5.00 E1 3.81 – 3.99 E 5.79 – 6.20 e 1.27 BSC L 0.40 – 1.27 ∅ 0˚ – 8˚ Top View End View Side View e B D A N E C L

3378F–SEEPR –04/04 8S2 – EIAJ SOIC San Jose, CA 95131 TITLE DRAWING NO. R REV. 8S2, 8-lead, 0.209" Body, Plastic Small Outline Package (EIAJ) 10/7/03 8S2 C COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE Notes: 1. This drawing is for general information only; refer to EIAJ Drawing EDR-7320 for additional information. 2. Mismatch of the upper and lower dies and resin burrs are not included. 3. It is recommended that upper and lower cavities be equal. If they are different, the larger dimension shall be regarded. 4. Determines the true geometric position. A 1.70 2.16 A1 0.05 0.25 b 0.35 0.48 5 C 0.15 0.35 5 D 5.13 5.35 E1 5.18 5.40 2, 3 E 7.70 8.26 L 0.51 0.85 ∅ 0˚ 8˚ e 1.27 BSC 4 End View Side View e b A D E N C L Top View

3378F–SEEPR –04/04 8A2 – TSSOP San Jose, CA 95131 TITLE DRAWING NO. R REV. 5/30/02 COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE D 2.90 3.00 3.10 2, 5 E 6.40 BSC E1 4.30 4.40 4.50 3, 5 A –– 1.20 A2 0.80 1.00 1.05 b 0.19 – 0.30 4 e 0.65 BSC L 0.45 0.60 0.75 L1 1.00 REF 8A2 , 8-lead, 4.4 mm Body, Plastic Thin Shrink Small Outline Package (TSSOP) Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, etc. 2. Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed 0.15 mm (0.006 in) per side. 3. Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25 mm (0.010 in) per side. 4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07 mm. 5. Dimension D and E1 to be determined at Datum Plane H. 8A2 B Side View End ViewTop View A L D 123 N b Pin 1 indicator this corner E e

3378F–SEEPR –04/04 8U3-1 – dBGA2 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TITLE DRAWING NO. R REV. PO8U3-1 A 6/24/03 COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE 8U3-1, 8-ball, 1.50 x 2.00 mm Body, 0.50 mm pitch, Small Die Ball Grid Array Package (dBGA2) A 0.71 0.81 0.91 A1 0.10 0.15 0.20 A2 0.40 0.45 0.50 b 0.20 0.25 0.30 D 1.50 BSC E 2.00 BSC e 0.50 BSC e1 0.25 REF d 1.00 BSC d1 0.25 REF 1. Dimension 'b' is measured at the maximum solder ball diameter. This drawing is for general information only. Bottom View

8 SOLDER BALLS

E Top View PIN 1 BALL PAD CORNER A Side View PIN 1 BALL PAD CORNER e 678 d (e1) (d1)

3378F–SEEPR –04/04 8Y1 – MAP A –– 0.90 A1 0.00 – 0.05 D 4.70 4.90 5.10 E 2.80 3.00 3.20 D1 0.85 1.00 1.15 E1 0.85 1.00 1.15 b 0.25 0.30 0.35 e 0.65 TYP L 0.50 0.60 0.70 PIN 1 INDEX AREA D E A A1 b 8 7 6 e L PIN 1 INDEX AREA 1 2 34 A Top View End View Bottom View Side View San Jose, CA 95131 TITLE DRAWING NO. R REV. 8Y1, 8-lead (4.90 x 3.00 mm Body) MSOP Array Package (MAP) Y1 C8Y1 2/28/03 COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE

Printed on recycled paper. 3378F–SEEPR –04/04 xM Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company ’s standard warranty which is detailed in Atmel’s T erms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems. Atmel Corporation Atmel Operations San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 Chinachem Golden Plaza

77 Mody Road Tsimshatsui

Tel: (852) 2721-9778 Fax: (852) 2722-1369 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Memory San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 Microcontrollers San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 La Chantrerie BP 70602

44306 Nantes Cedex 3, France

13106 Rousset Cedex, France

1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland Tel: (44) 1355-803-000 Fax: (44) 1355-242-743 RF/Automotive Theresienstrasse 2 Postfach 3535

74025 Heilbronn, Germany

1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom Avenue de Rochepleine BP 123

38521 Saint-Egreve Cedex, France

www.atmel.com/literature © Atmel Corporation 2004 . All rights reserved. Atmel® and combinations thereof, are the registered trademarks, and dBGA™ is the trademark of Atmel Corporation or its subsidiaries. Other terms and product names may be the trademarks of others.