Download PDFAT93C46_05 ATMEL
Document overview
- Manufacturer or author: Provided By digicamel.com
- PDF pages: 21
Technical content
Features
- Low-voltage and Standard-voltage Operation – 2.7 (V CC = 2.7V to 5.5V) – 1.8 (V CC = 1.8V to 5.5V) User-selectable Internal Organization – 1K: 128 x 8 or 64 x 16 – 2K: 256 x 8 or 128 x 16 – 4K: 512 x 8 or 256 x 16 Three-wire Serial Interface 2 MHz Clock Rate (5V) Self-timed Write Cycle (10 ms max) High Reliability – Endurance: 1 Million Write Cycles – Data Retention: 100 Years Automotive Grade, Extended Temperature and Lead-Free/Halogen-Free Devices Available 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead MAP, 8-lead TSSOP, and 8-ball dBGA2 Packages
Description
The AT93C46/56/66 provides 1024/2048/4096 bits of serial electrically erasable pro- grammable read-only memory (EEPROM), organized as 64/128/256 words of 16 bits each (when the ORG pin is connected to VCC), and 128/256/512 words of 8 bits each (when the ORG pin is tied to ground). The de vice is optimized for use in many indus- trial and commercial applications where low-power and low-voltage operations are essential. The AT93C46/56/66 is available in space-saving 8-lead PDIP , 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead MAP , 8-lead TSSOP , and 8-lead dBGA2 packages. The AT93C46/56/66 is enabled through the Chip Select pin (CS) and accessed via a three-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SK). Upon receiving a Read instruction at DI, the address is decoded and the data is clocked out serially on the DO pin. The Write cycle is completely self-timed, and no separate Erase cycle is required before Write. The Write cycle is only enabled when the part is in the Erase/Write Enable state. When CS is brought high following the initiation of a Write cycle, the DO pin outputs the Ready/Busy status of the part. Table 1. Pin Configurations
- This device is not recom-
2 AT93C46/56/66
Figure 1. Block Diagram
Note: 1. This parameter is characterized and is not 100% tested. Note: 1. V IL min and VIH max are reference only and are not tested. Table 2. Pin Capacitance(1) Table 3. DC Characteristics
4 AT93C46/56/66
Note: 1. This parameter is characterized and is not 100% tested. Table 4. AC Characteristics
Note: The Xs in the address field represent DON’T CARE values and must be clocked. Notes: 1. This device is not recommended for new designs. Please refer to AT93C56A.
- This device is not recommended for new designs. Please refer to AT93C66A.
Table 5. Instruction Set for the AT93C46 Table 6. Instruction Set for the AT93C56(1) and AT93C66(2)
6 AT93C46/56/66
0172Z–SEEPR–9/05 Functional The AT93C46/56/66 is accessed via a simple and versatile three-wire serial communi- cation interface. Device operation is controlled by seven instructions issued by the host processor. A valid instruction starts with a rising edge of CS and consists of a start bit (logic “1”) followed by the appropriate op code and the desired memory address location. READ (READ): The Read (READ) instruction contains the address code for the mem- ory location to be read. After the instruction and address are decoded, data from the selected memory location is available at the serial output pin DO. Output data changes are synchronized with the rising edges of serial clock SK. It should be noted that a dummy bit (logic “0”) precedes the 8- or 16-bit data output string. ERASE/WRITE ENABLE (EWEN): To assure data integrity, the part automatically goes into the Erase/Write Disable (EWDS) state when power is first applied. An Erase/Write Enable (EWEN) instruction must be executed first before any programming instructions can be carried out. Please note that once in the EWEN state, programming remains enabled until an EWDS instruction is executed or V CC power is removed from the part. ERASE (ERASE): The Erase (ERASE) instruction programs all bits in the specified memory location to the logical “1” state. The self-timed erase cycle starts once the Erase instruction and address are decoded. The DO pin outputs the Ready/Busy status of the part if CS is brought high after being kept low for a minimum of 250 ns (t CS). A logic “1” at pin DO indicates that the selected memory location has been erased and the part is ready for another instruction. WRITE (WRITE): The Write (WRITE) instruction contains the 8 or 16 bits of data to be written into the specified memory location. The self-timed programming cycle t WP starts after the last bit of data is received at serial data input pin DI. The DO pin outputs the Read/Busy status of the part if CS is brought high after being kept low for a minimum of 250 ns (t CS). A logic “0” at DO indicates that programming is still in progress. A logic “1” indicates that the memory location at the specified address has been written with the data pattern contained in the instruction and the part is ready for further instructions. A Ready/Busy status cannot be obtained if the CS is brought high after the end of the self- timed programming cycle tWP . ERASE ALL (ERAL): The Erase All (ERAL) instruction programs every bit in the mem- ory array to the logic “1” state and is primarily used for testing purposes. The DO pin outputs the Ready/Busy status of the part if CS is brought high after being kept low for a minimum of 250 ns (t CS). The ERAL instruction is valid only at VCC = 5.0V ± 10%. WRITE ALL (WRAL): The Write All (WRAL) instruction programs all memory locations with the data patterns specified in the instruction. The DO pin outputs the Ready/Busy status of the part if CS is brought high after being kept low for a minimum of 250 ns (t CS). The WRAL instruction is valid only at VCC = 5.0V ± 10%. ERASE/WRITE DISABLE (EWDS): To protect against accidental data disturb, the Erase/Write Disable (EWDS) instruction disables all programming modes and should be executed after all programming operations. The operation of the Read instruction is independent of both the EWEN and EWDS instructions and can be executed at any time.
Figure 2. Synchronous Data Timing Note: 1. This is the minimum SK period. Notes: 1. This device is not recommended for new designs. Please refer to AT93C56A.
- This device is not recommended for new designs. Please refer to AT93C66A.
- A 8 is a don’t care value, but the extra clock is required.
- A 7 is a don’t care value, but the extra clock is required.
Table 7. Organization Key for Timing Diagrams
8 AT93C46/56/66
Figure 3. READ Timing Figure 4. EWEN Timing Figure 5. EWDS Timing
10 AT93C46/56/66
Figure 9. ERAL Timing(1) Note: 1. Valid only at V CC = 4.5V to 5.5V.
0172Z–SEEPR–9/05 Notes: 1. For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the Table 3 on page 3 and Table 4 on page 4. 2. Available in waffle pack and wafer form, order as SL719 for wafer form. Bumped die available upon request. Ordering Code Package Operation Range AT93C46-10PI-2.7 AT93C46-10SI-2.7 AT93C46R-10SI-2.7 AT93C46W-10SI-2.7 AT93C46-10TI-2.7 8P3 8S1 8S1 8S2 8A2 Industrial (−40°C to 85°C) AT93C46-10PI-1.8 AT93C46-10SI-1.8 AT93C46R-10SI-1.8 AT93C46W-10SI-1.8 AT93C46-10TI-1.8 8P3 8S1 8S1 8S2 8A2 Industrial (−40°C to 85°C) AT93C46-10PU-2.7 AT93C46-10PU-1.8 AT93C46-10SU-2.7 AT93C46-10SU-1.8 AT93C46W-10SU-2.7 AT93C46W-10SU-1.8 AT93C46-10TU-2.7 AT93C46-10TU-1.8 AT93C46Y1-10YU-2.7 AT93C46Y1-10YU-1.8 AT93C46Y5-10YU-2.7 AT93C46Y5-10YU-1.8 AT93C46U3-10UU-2.7 AT93C46U3-10UU-1.8 8P3 8P3 8S1 8S1 8S2 8S2 8A2 8A2 8Y1 8Y1 8Y5 8Y5 8U3-1 8U3-1 Lead-free/Halogen-free/ Industrial Temperature (−40°C to 85°C) AT93C46-W2.7-11 (2) AT93C46-W1.8-11(2) Die Sale Die Sale Industrial (−40°C to 85°C) Package Type 8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8S2 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) 8A2 8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) 8U3-1 8-ball, Die Ball Grid Array Package (dBGA2) 8Y1 8-lead, 4.90 mm x 3.00 mm Body, Dual Footprint, Non-leaded, Miniature Array Package (MAP) 8Y5 8-lead, 2.00 mm x 3.00 mm Body, Dual Footprint, Non-leaded, Miniature Array Package (MAP) Options −2.7 Low Voltage (2.7V to 5.5V) −1.8 Low Voltage (1.8V to 5.5V) R Rotated Pinout
12 AT93C46/56/66
0172Z–SEEPR–9/05 Notes: 1. This device is not recommended for new designs. Please refer to AT93C56A. 2. For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in Table 3 on page 3 and Table 4 on page 4. AT93C56(1) Ordering Information Ordering Code(2) Package Operation Range AT93C56-10PI-2.7 AT93C56-10SI-2.7 AT93C56W-10SI-2.7 AT93C56-10TI-2.7 AT93C56Y1-10YI-2.7 8P3 8S1 8S2 8A2 8Y1 Industrial (−40°C to 85°C) AT93C56-10PI-1.8 AT93C56-10SI-1.8 AT93C56W-10SI-1.8 AT93C56-10TI-1.8 AT93C56Y1-10YI-1.8 8P3 8S1 8S2 8A2 8Y1 Industrial (−40°C to 85°C) Package Type 8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8S2 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) 8A2 8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) 8Y1 8-lead, 4.90 mm x 3.00 mm Body, Dual Footprint, Non-leaded, Miniature Array Package (MAP) Options −2.7 Low Voltage (2.7V to 5.5V) 1.8 Low Voltage (1.8V to 5.5V)
0172Z–SEEPR–9/05 Notes: 1. This device is not recommended for new designs. Please refer to AT93C66A. 2. For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in Table 3 on page 3 and Table 4 on page 4. AT93C66(1) Ordering Information Ordering Code(2) Package Operation Range AT93C66-10PI-2.7 AT93C66-10SI-2.7 AT93C66W-10SI-2.7 AT93C66-10TI-2.7 AT93C66Y1-10YI-2.7 8P3 8S1 8S2 8A2 8Y1 Industrial (−40°C to 85°C) AT93C66-10PI-1.8 AT93C66-10SI-1.8 AT93C66W-10SI-1.8 AT93C66-10TI-1.8 AT93C66Y1-10YI-1.8 8P3 8S1 8S2 8A2 8Y1 Industrial (−40°C to 85°C) Package Type 8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8S2 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) 8A2 8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) 8Y1 8-lead, 4.90 mm x 3.00 mm Body, Dual Footprint, Non-leaded, Miniature Array Package (MAP) Options −2.7 Low Voltage (2.7V to 5.5V) −1.8 Low Voltage (1.8V to 5.5V)
14 AT93C46/56/66
0172Z–SEEPR–9/05 Packaging Information 8P3 – PDIP
2325 Orchard Parkway
San Jose, CA 95131 TITLE DRAWING NO. R REV. 8P3, 8-lead, 0.300" Wide Body, Plastic Dual In-line Package (PDIP) 01/09/02 8P3 B D E e Lb2 b A2 A N eA c
4 PLCS
(Unit of Measure = inches) SYMBOL MIN NOM MAX NOTE Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information. 2. Dimensions A and L are measured with the package seated in JEDEC seating plane Gauge GS-3. 3. D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed 0.010 inch. 4. E and eA measured with the leads constrained to be perpendicular to datum. 5. Pointed or rounded lead tips are preferred to ease insertion. A 0.210 2 A2 0.115 0.130 0.195 b 0.014 0.018 0.022 5 b2 0.045 0.060 0.070 6 b3 0.030 0.039 0.045 6 c 0.008 0.010 0.014 D 0.355 0.365 0.400 3 D1 0.005 3 E 0.300 0.310 0.325 4 E1 0.240 0.250 0.280 3 e 0.100 BSC eA 0.300 BSC 4 L 0.115 0.130 0.150 2
0172Z–SEEPR–9/05 8S1 – JEDEC SOIC 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TITLE DRAWING NO. R REV. Note: 10/7/03 8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) 8S1 B COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE A1 0.10 – 0.25 These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. A 1.35 – 1.75 b 0.31 – 0.51 C 0.17 – 0.25 D 4.80 – 5.00 E1 3.81 – 3.99 E 5.79 – 6.20 e 1.27 BSC L 0.40 – 1.27 ∅ 0˚ – 8˚ Top View End View Side View e B D A N E C L
16 AT93C46/56/66
0172Z–SEEPR–9/05 8S2 – EIAJ SOIC San Jose, CA 95131 TITLE DRAWING NO. R REV. 8S2, 8-lead, 0.209" Body, Plastic Small Outline Package (EIAJ) 10/7/03 8S2 C COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE Notes: 1. This drawing is for general information only; refer to EIAJ Drawing EDR-7320 for additional information. 2. Mismatch of the upper and lower dies and resin burrs are not included. 3. It is recommended that upper and lower cavities be equal. If they are different, the larger dimension shall be regarded. 4. Determines the true geometric position. A 1.70 2.16 A1 0.05 0.25 b 0.35 0.48 5 C 0.15 0.35 5 D 5.13 5.35 E1 5.18 5.40 2, 3 E 7.70 8.26 L 0.51 0.85 ∅ 0˚ 8˚ e 1.27 BSC 4 End View Side View e b A D E N C L Top View
0172Z–SEEPR–9/05 8A2 – TSSOP San Jose, CA 95131 TITLE DRAWING NO. R REV. 5/30/02 COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE D 2.90 3.00 3.10 2, 5 E 6.40 BSC E1 4.30 4.40 4.50 3, 5 A – – 1.20 A2 0.80 1.00 1.05 b 0.19 – 0.30 4 e 0.65 BSC L 0.45 0.60 0.75 L1 1.00 REF 8A2, 8-lead, 4.4 mm Body, Plastic Thin Shrink Small Outline Package (TSSOP) Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, etc. 2. Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed 0.15 mm (0.006 in) per side. 3. Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25 mm (0.010 in) per side. 4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07 mm. 5. Dimension D and E1 to be determined at Datum Plane H. 8A2 B Side View End ViewTop View A L D 123 N b Pin 1 indicator this corner E e
18 AT93C46/56/66
0172Z–SEEPR–9/05 8U3-1 – dBGA2 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TITLE DRAWING NO. R REV. PO8U3-1 A 6/24/03 COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE 8U3-1, 8-ball, 1.50 x 2.00 mm Body, 0.50 mm pitch, Small Die Ball Grid Array Package (dBGA2) A 0.71 0. 81 0.91 A1 0.10 0.15 0.20 A2 0.40 0.45 0.50 b 0.20 0.25 0. 30 D 1.50 B SC E 2.00 B SC e 0.50 B SC e1 0.25 REF d 1.00 B SC d1 0.25 REF 1. Dimension “b” is measured at the maximum solder ball diameter. This drawing is for general information only. Bottom View
8 SOLDER BALLS
E Top View PIN 1 BALL PAD CORNER A Side View PIN 1 BALL PAD CORNER e 678 d (e1) (d1)
0172Z–SEEPR–9/05 8Y1 – MAP A – – 0.90 A1 0.00 – 0.05 D 4.70 4.90 5.10 E 2.80 3.00 3.20 D1 0.85 1.00 1.15 E1 0.85 1.00 1.15 b 0.25 0.30 0.35 e 0.65 TYP L 0.50 0.60 0.70 PIN 1 INDEX AREA D E A A1 b 8 7 6 e L PIN 1 INDEX AREA 1 2 34 A Top View End View Bottom View Side View San Jose, CA 95131 TITLE DRAWING NO. R REV. 8Y1, 8-lead (4.90 x 3.00 mm Body) MSOP Array Package (MAP) Y1 C8Y1 2/28/03 COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE
20 AT93C46/56/66
0172Z–SEEPR–9/05 8Y5 – MAP San Jose, CA 95131 TITLE DRAWING NO. R REV. 8Y5, 8-lead 2.0 x 3.0 mm Body, 0.50 mm Pitch, Mini-Map, Dual No Lead Package (DFN) A8Y5 11/12/03 Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-229, for proper dimensions, tolerances, datums, etc. 2. Dimension b applies to metallized terminal and is measured between 0.15 mm and 0.30 mm from the terminal tip. If the terminal has the optional radius on the other end of the terminal, the dimension should not be measured in that radius area. COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE D 2.00 BSC E 3.00 BSC D2 1.40 1.50 1.60 E2 1.75 1.85 1.95 A – – 0.90 A1 0.0 0.02 0.05 A2 – – 0.85 A3 0.20 REF L 0.20 0.30 0.40 e 0.50 BSC b 0.20 0.25 0.30 2 Pin 1 Index Area E D A A2 A1 D2 b (8x) Pin 1 ID L (8x) e (6x) 1.50 REF . Bottom View Top View Side View
Printed on recycled paper. 0172Z–SEEPR–9/05 Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL ’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL ’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTOR Y WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO , THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICU LAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR I NCIDEN- TAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF AT MEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or co mpleteness of the contents of this document and reserves the rig ht to make changes to specifications and product descriptions at any time without notice. Atmel does not make any commitment to update the information contained her ein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not int ended, authorized, or warranted for use as components in applications in tended to support or sustain life. Atmel Corporation Atmel Operations San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 Chinachem Golden Plaza
77 Mody Road Tsimshatsui
Tel: (852) 2721-9778 Fax: (852) 2722-1369 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Memory San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 Microcontrollers San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 La Chantrerie BP 70602
44306 Nantes Cedex 3, France
13106 Rousset Cedex, France
1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland Tel: (44) 1355-803-000 Fax: (44) 1355-242-743 RF/Automotive Theresienstrasse 2 Postfach 3535
74025 Heilbronn, Germany
1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom Avenue de Rochepleine BP 123
38521 Saint-Egreve Cedex, France
www.atmel.com/literature © Atmel Corporation 2005 . All rights reserved. Atmel ®, logo and combinations thereof, Everywhere Y ou Are ® and others, are registered trademarks or trademarks of Atmel Corporation or its subsid iaries. Other terms and product names may be trademarks of others.