AT42QT1012-MAH

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Document overview

• Manufacturer or author: Provided By digicamel.com
• PDF pages: 28

Technical content

Features

• Number of Keys: – One, toggle mode (touch-on/touch-off), plus programmable auto-off delay and external cancel – Configurable as either a single key or a proximity sensor  Technology: – Patented spread-spectrum charge-transfer (direct mode)  Key outline sizes: – 6 mm x 6 mm or larger (panel thickness dependent); widely different sizes and shapes possible  Electrode design: – Solid or ring electrode shapes  PCB Layers required: –O n e  Electrode materials: – Etched copper, silver, carbon, Indium Tin Oxide (ITO)  Electrode substrates: – PCB, FPCB, plastic films, glass  Panel materials: – Plastic, glass, composites, painted surfaces (low particle density metallic paints possible)  Panel thickness: – Up to 12 mm glass, 6 mm plastic (electrode size and Cs dependent)  Key sensitivity: – Settable via external capacitor (Cs)  Interface: – Digital output, active high or active low (hardware configurable)  Moisture tolerance: –G o o d  Power: – 1.8V ~ 5.5V; 32 µA at 1.8V  Package: – 6-pin SOT23-6 (3 x 3 mm) RoHS compliant – 8-pin UDFN/USON (2 x 2 mm) RoHS compliant  Signal processing: – Self-calibration, auto drift compensation, noise filtering One-channel Toggle-mode Touch Sensor IC with Power Management Functions AT42QT1012 9543D–AT42–08/10

9543D–AT42–08/10 AT42QT1012 1. Pinout and Schematic

1.1 Pinout Configurations

1.1.1 6-pin SOT23-6 1.1.2 8-pin UDFN/USON VDD TIME SNSK VSS OUT SNS QT1012 Pin 1 ID OUT SNSK VSS SNS VDD TIME N/C N/C 1 8 QT1012

9543D–AT42–08/10 AT42QT1012

1.2 Pin Descriptions

1.3 Schematics

1.3.1 6-pin SOT23-6 Figure 1-1. Basic Circuit Configuration (active high output, toggle on/off, no auto switch off) Table 1-1. Pin Listing 6-Pin 8-Pin Name Type Description If Unused, Connect To... 15 O U T O (1) Output state. To switched circuit and output polarity selection resistor (Rop) 2 4 Vss P Ground 3 1 SNSK I/O Sense pin. To Cs capacitor and to sense electrode Cs + key

48 S N S I / O

Sense pin. To Cs capacitor and multiplier configuration resistor (Rm). Rm must be fitted and connected to either VSS or VDD. See Section 3.11.4 on page 13 for details. Cs

57 V d d P P o w e r

66 T I M E I

Timeout configuration pin. Must be connected to either VSS, VDD, OUT or an RC network. See Section 3.11 on page 11 for details. – 2 N/C – Not connected Do not connect – 3 N/C – Not connected Do not connect 1. I/O briefly on power-up I Input only I/O Input and output O Output only, push-pull P Ground or power VDD TIME VSS OUT 1 Rop VDD CS SNSK SNS4 3RS Note: bypass capacitor to be tightly wired between VDD and VSS and kept close to pin 5. SENSE ELECTRODE Cby Rm

9543D–AT42–08/10 AT42QT1012 1.3.2 8-pin UDFN/USON Figure 1-2. Basic Circuit Configuration (active high output, toggle on/off, no auto switch off) Re Figure 1-1 on page 3 and Figure 1-2, check the following sections for component values:  Cs capacitor (Cs) – see Section 4.2 on page 20  Sample resistor (Rs) – see Section 4.3 on page 20  Voltage levels – see Section 4.4 on page 20  Output polarity selection resistor (Rop) – see Section 3.9 on page 10  Rm resistor – see Section 3.11.2 on page 11  Bypass capacitor (Cby) – see page 21 VDD TIME VSS OUT 5 Rop VDD CS SNSK SNS8 1RS Note: bypass capacitor to be tightly wired between VDD and VSS and kept close to pin 7. SENSE ELECTRODE Cby Rm N/C N/C3

9543D–AT42–08/10 AT42QT1012 2. Overview of the AT42QT1012

2.1 Introduction

The AT42QT1012 (QT1012) is a single key device featuring a touch on/touch off (toggle) output with a programmable auto switch-off capability. The QT1012 is a digital burst mode charge-transfer (QT™ ) sensor designed specifically for touch controls. It includes all hardware and signal processing functions necessary to provide stable sensing under a wide variety of changing conditio ns; only low cost, noncritical components are required for operation. With its tiny low-cost pac kages, this device can suit almost any product needing a power switch or other toggle-mode cont rolled function, especially power control of small appliances and battery-operated products. A unique “green” feature of the QT1012 is the timeout function, which can turn off power after a time delay. Like all QTouch ™ devices, the QT1012 features automati c self-calibration, drift compensation, and spread-spectrum burst modulation in order to provide for the most reliable touch sensing possible.

2.2 Basic Operation

Figure 1-1 on page 3 and Figure 1-2 on page 4 show basic circuits for the 6-pin and 8-pin devices. The QT1012 employs bursts of charge-transfer c ycles to acquire its signal. Burst mode permits power consumption in the microamp range, dramatically reduces RF emissions, lowers susceptibility to EMI, and yet permits excellent response time. Internally the signals are digitally processed to reject impulse noise, using a “conse nsus” filter which requires four consecutive confirmations of a detection before the output is activated. The QT switches and charge measurement hardware functions are all internal to the QT1012.

2.3 Electrode Drive

Figure 2-1 on page 6 shows the sense electrode connections (SNS, SNSK) for the QT1012. For optimum noise immunity, the electrode should only be connected to the SNSK pin. In all cases the sample capacitor Cs should be much larger than the load capacitance (Cx). Typical values for Cx are 5 – 20 pF while Cs is usually 2.2 – 50 nF. Note: Cx is not a physical discrete component on the PCB, it is the capacitance of the touch electrode and wiring. It is show in Figure 2-1 on page 6 to aid understanding of the equivalent circuit. Increasing amounts of Cx destroy gain, therefore it is important to limit the amount of load capacitance on both SNS terminals. This can be done, for example, by minimizing trace lengths and widths and keeping these traces away from power or ground traces or copper pours. The traces, and any components associated with SNS and SNSK, will become touch sensitive and should be treated with caution to limit the touch area to the desired location. To endure that the correct output mode is selected at power-up, the OUT trace should also be carefully routed.

9543D–AT42–08/10 AT42QT1012 A series resistor, Rs, should be placed in li ne with SNSK to the electrode to suppress electrostatic discharge (ESD) and electromagnetic compatibility (EMC) effects. Figure 2-1. Sense Connections

2.4 Sensitivity

2.4.1 Introduction

The sensitivity on the QT1012 is a function of things like the value of Cs, electrode size and capacitance, electrode shape and orientation, the composition and aspect of the object to be sensed, the thickness and composition of any overlaying panel material, and the degree of ground coupling of both sensor and object.

2.4.2 Increasing Sensitivity

In some cases it may be desirable to increase sensitivity; for example, when using the sensor with very thick panels having a low dielectric constant, or when the device is used as a proximity sensor. Sensitivity can often be increased by using a larger electrode or reducing panel thickness. Increasing electrode size can have dimi nishing returns, as high values of Cx will reduce sensor gain. The value of Cs also has a dramatic effect on sensitivity, and this can be increased in value with the trade-off of a slower response time and more power. Increasing the electrode's surface area will not substantially increase touch sensitivity if its diameter is already much larger in surface area than the object being detected. Panel material can also be changed to one having a higher dielectric constant, which will better help to propagate the field. Ground planes around and under the electrode and its SNSK trace will c ause high Cx loading and destroy gain. The possible signal-to-noise ratio benefits of ground area are more than negated by the decreased gain from the circuit, and so ground areas around electrodes are discouraged. Metal ar eas near the electrode will reduce the field strength and increase Cx loading and should be avoided, if possible. Keep ground away from the electrodes and traces.

2.4.3 Decreasing Sensitivity

In some cases the QT1012 may be too sensitive. In this case gain can be easily lowered further by decreasing Cs. VDD TIME VSS OUT 1 VDD CS SNSK SNS4 3RS SENSE ELECTRODE Cx Cby

9543D–AT42–08/10 AT42QT1012 3. Operation Specifics

3.1 Acquisition Modes

3.1.1 Introduction

The OUT pin of the QT1012 can be configured to be active high or active low.  If active high then: – “on” is high – “off” is low  If active low then: – “on” is low – “off” is high

3.1.2 OUT Pin

The QT1012 runs in Low Power (LP) mode. In this mode it sleeps for approximately 80 ms at the end of each burst, saving power but slowing response. On detecting a possible key touch, it temporarily switches to fast mode until either the key touch is confirmed or found to be spurious (via the detect integration process).  If the touch is confirmed, the OUT pin is t oggled and the QT1012 returns to LP mode (see Figure 3-1).  If the touch is not valid then the chip returns to LP mode but the OUT pin remains unchanged (see Figure 3-2 on page 7). Figure 3-1. Low Power Mode: Touch Confirmed (Output in Off Condition) Figure 3-2. Low Power Mode: Touch Denied (Output in Off Condition) SNSK Sleep Fast detect integrator Key touch~80 ms Sleep Sleep OUT SNSK Sleep Fast detect integrator Key touch~80 ms Sleep Sleep OUT Sleep

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3.2 Detect Threshold

The device detects a touch when the signal has crossed a threshold level. The threshold level is fixed at 10 counts.

3.3 Detect Integrator

It is desirable to suppress detections generated by electrical noise or from quick brushes with an object. To accomplish this, the QT1012 incorporates a detect integration (DI) counter that increments with each detection until a limit is reached, after which the output is activated. If no detection is sensed prior to the final count, the counter is reset immediately to zero. In the QT1012, the required count is four. The DI can also be viewed as a “consensus filter ” that requires four successive detections to create an output.

3.4 Recalibration Timeout

If an object or material obstructs the sense electrode the signal may rise enough to create a detection, preventing further operation. To stop this, the sensor includes a timer which monitors detections. If a detection exceeds the timer setting, the sensor performs a full recalibration. This does not toggle the output state but ensures that the QT1012 will detect a new touch correctly. The timer is set to activate this feature after ~60s. This will vary slightly with Cs.

3.5 Forced Sensor Recalibration

The QT1012 has no recalibration pin; a forced recalibration is accomplished when the device is powered up or after the recalibration timeout. However, supply drain is low so it is a simple matter to treat the entire IC as a controllable load; driving the QT1012’s Vdd pin directly from another logic gate or a microcontroller port will serve as both power and “forced recalibration”. The source resistance of most CMOS gates and microcontrollers is low enough to provide direct power without a problem.

3.6 Drift Compensation

Signal drift can occur because of c hanges in Cx and Cs over time. It is crucial that drift be compensated for, otherwise false detections, nondetections, and sensitivity shifts will follow. Drift compensation (Figure 3-3 on page 9) is performed by making the reference level track the raw signal at a slow rate, but only while there is no detection in effect. The rate of adjustment must be performed slowly, otherwise legitimate detections could be ignored. The QT1012 drift compensates using a slew-rate limited change to the reference level; the threshold and hysteresis values are slaved to this reference. Once an object is sensed, the drift com pensation mechanism ceases since the signal is legitimately high, and therefore should not cause the reference level to change.

9543D–AT42–08/10 AT42QT1012 Figure 3-3. Drift Compensation The QT1012's drift compensation is asymmetric; the reference level drift-compensates in one direction faster than it does in the other. Spec ifically, it compensates faster for decreasing signals than for increasing signals. Increasi ng signals should not be compensated for quickly, since an approaching finger could be compensated for partially or entirely before even approaching the sense electrode. However, an obstruction over the sense pad, for which the sensor has already made full allowance, could suddenly be removed leaving the sensor with an artificially elevated reference level and thus become insensitive to touch. In this latter case, the sensor will compensate for the object's removal very quickly. With large values of Cs and small values of Cx, drift compensation will appear to operate more slowly than with the converse. Note that the positive and negative drift compensation rates are different.

3.7 Response Time

The QT1012's response time is highly dependent on the run mode and burst length, which in turn is dependent on Cs and Cx. With increasing Cs, response time slows, while increasing levels of Cx reduce response time.

3.8 Spread Spectrum

The QT1012 modulates its internal oscillator by ±7.5 percent during the measurement burst. This spreads the generated noise over a wider band, reducing emission levels. This also reduces susceptibility since there is no longer a single fundamental burst frequency. Threshold Signal Hysteresis Reference Output

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3.9 Output Polarity Selection

The output (OUT pin) of the QT1012 can be configured to have an active high or active low output by means of the output configuration resistor Rop. The resistor is connected between the output and either Vss or Vdd (see Figure 3-4 and Table 3-1). A typical value for Rop is 100 k. Figure 3-4. Output Polarity (6-pin SOT23) Note that some devices such as Digital Transistors have an inte rnal biasing network that will naturally pull the OUT pin to its inactive state. If these are being used then the resistor Rop is not required (see Figure 3-5). Figure 3-5. Output Connected to Digital Transistor (6-pin SOT23) Table 3-1. Output Configuration Name (Vop) Function (Output Polarity) Vss Active high Vdd Active low VDD OUT VSS VDD Rop

3 SNSK Vop

4 SNS

3 SNSK

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3.10 Output Drive

The OUT pin can sink or source up to 2 mA. When a large value of Cs (>20 nF) is used the OUT current should be limited to <1 mA to prevent gain-shifting side effects, which happen when the load current creates voltage drops on the die and bonding wires; these small shifts can materially influence the signal level to cause detection instability.

3.11 Auto Off Delay

3.11.1 Introduction

In addition to toggling the output on/off with a key touch, the QT1012 can automatically switch the output off after a time, typically ±10 percent of the nominal stated time. This feature can be used to save power in situations where the switched device could be left on inadvertently. The QT1012 has:  three predefined delay times (Section 3.11.2)  the ability to set a user-programmed delay (Section 3.11.3 on page 12)  the ability to override the auto off delay (Section 3.11.5 on page 17) The TIME and SNS pins are used to configure the Auto Off delay and must always be connected in one of the ways described in Section 3.11.2.

3.11.2 Auto Off – Predefined Delay

To configure the predefined delay the TIME pin is hard wired to Vss, Vdd or OUT as shown in Table 3-2 on page 12 and Table 3-3 on page 12. This provides nominal values of 15 minutes, 60 minutes or infinity (remains on until toggled off). A single 1 M resistor (Rm) is connected between the SNS pin and the logic level Vm to provide three auto off functions: delay multiplication, delay override and delay retriggering. On power-up the logic level at Vm is assessed and the dela y multiplication factor is set to x1 or x24 accordingly (see Figure 3-6 on page 12 , Table 3-2 on page 12 and Table 3-3 on page 12 ). At the end of each acquisition cycle the logic level of Vm is monitored to see if an Auto off delay override is required (see Section 3.11.5 on page 17). Setting the delay multiplier to x24 will decrease the key sensitivity. To compensate, it may be necessary to increase the value of Cs.

9543D–AT42–08/10 AT42QT1012 Figure 3-6. Predefined Delay

3.11.3 Auto Off – User-programmed Delay

If a user-programmed delay is required, a RC network (resistor and capacitor) can be used to set the auto-off delay (see Table 3-5 on page 13 and Figure 3-7 on page 13). The delay time is dependent on the RC time constant (Rt x Ct), the output polarity and the supply voltage. Section 3.11.4 on page 13 gives full details of how to configure the QT1012 to have auto-off delay times ranging from minutes to hours. Table 3-2. Predefined Auto-off Delay (Active High Output) Vt Auto-off Delay (t o) Vss Infinity (remain on until toggled to off) Vdd 15 minutes OUT 60 minutes Table 3-3. Predefined Auto-off Delay (Active Low Output) Vt Auto-off Delay (t o) Vss 15 minutes Vdd Infinity (remain on until toggled to off) OUT 60 minutes Table 3-4. Auto-off Delay Multiplier Vm Auto-off Delay Multiplier Vss t o x 1 Vdd t o x 24 VDD OUT VSS

14 SNS

9543D–AT42–08/10 AT42QT1012 Figure 3-7. Programmable Delay

3.11.4 Configuring the User-programmed Auto-off Delay

The QT1012 can be configured to give auto-off delays ranging from minutes to hours by means of a simple RC network and the delay multiplier input. With the delay multiplier set at x1 the auto-off delay is calculated as follows: Delay value = integer value of x 15 seconds And Rt x Ct = Note: Rt is in k, Ct is in nF , Delay is in seconds. K values are obtained from Figure 3-8 on page 14. To ensure correct operation it is recommended that the value of is between 4 and 240. Values outside this range may be interpreted as the hard wired options TIME linked to OUT and TIME linked to “off” respectively, causing the QT1012 to use the relevant predefined auto-off delays. K values (19 and 22) are obtained from Figure 3-8 on page 14. Note: Rt is in k, Ct is in nF . VDD VSS VDD Table 3-5. Programmable Auto-off Delay (Example) Vm = Vss (delay multiplier = 1), Vdd = 3.5V Output Type Auto Off Delay (Seconds) Active high (Rt x Ct x 15) / 19 Active low (Rt x Ct x 15) / 22 Rt Ct Delay K Rt Ct

9543D–AT42–08/10 AT42QT1012 Figure 3-8. Typical Values of K Versus Supply Voltage The charts in Figure 3-8 show typical values of K versus supply voltage for a QT1012 with active high or active low output. Example using the formula to calculate Rt and Ct Requirements:  Active high output (Vop connected to VSS)  Auto-off delay nominal 45 minutes V D D = 3 . 5 V Proceed as follows: 1. Calculate Auto-off delay in seconds 45 x 60 = 2700 2. Obtain K from Figure 3-8, K= 22.8 3. Calculate Rt x Ct = = 4104 4. Decide on a value for Rt or Ct (for example, Ct = 47 nF) 5. Calculate Rt = = 87 k 6. Verify that = 179 (which is between 4 and 240) As an alternative to calculation, Figure 3-9 and Figure 3-10 on page 16 show charts of typical curves of auto-off delay against resistor and capa citor values for active high and active low outputs at various values of VDD (delay multiplier = x1). Active High Output 22 . 533 . 544 . 55 VDD (Volts) RC divisor (K) Active Low Output 19.05 19.1 19.15 19.2 19.25 19.3 19.35 19.4 22 . 5 33 . 544 . 55 VDD (Volts) RC divisor (K) 2700 22.8 4104 RtxCt

9543D–AT42–08/10 AT42QT1012 Figure 3-9. Auto-off Delay, Active High Output Vm = Vss (delay multiplier = x1) 5V Active High 500 1000 1500 2000 2500 3000 3500 0 50 100 150 200 250 Timing Resistor Rt (K ohms) Auto Off Delay (seconds) Ct = 100nF Ct = 47nF Ct = 22nF Ct = 10nF 4V Active High 500 1000 1500 2000 2500 3000 3500 4000 0 50 100 150 200 250 Timing Resistor Rt (K ohms) Auto Off Delay (seconds) Ct = 100nF Ct = 47nF Ct = 22nF Ct = 10nF 3V Active High 500 1000 1500 2000 2500 3000 3500 4000 0 50 100 150 200 250 Timing Resistor Rt (K ohms) Auto Off Delay (seconds) Ct = 100nF Ct = 47nF Ct = 22nF Ct = 10nF 2V Active High 500 1000 1500 2000 2500 3000 3500 4000 0 50 100 150 200 250 Timing Resistor Rt (K ohms) Auto Off Delay (seconds) Ct = 100nF Ct = 47nF Ct = 22nF Ct = 10nF

9543D–AT42–08/10 AT42QT1012 Example using a chart to calculate Rt and Ct Requirements:  Active low output (Vop connected to VSS)  Auto-off delay 25 minutes V D D = 4 V 1. Calculate Auto-off delay in seconds 25 x 60 = 1500. 2. Find = 1500 on the 4V chart in Figure 3-10. 3. This shows the following suit able Ct / Rt combinations: – 100 nF / 20 k –4 7n F / 4 0k –2 2n F / 9 0k –1 0n F / 1 9 0k Note: the Auto-off delay times shown are nominal and will vary from chip to chip and with capacitor and resistor tolerance. Figure 3-10. Auto-off Delay, Active Low Output Vm = Vss (delay multiplier = x1) 5V Active Low 500 1000 1500 2000 2500 3000 3500 4000 0 50 100 150 200 250 Timing Resistor Rt (K ohms) Auto Off Delay (seconds) Ct = 100nF Ct = 47nF Ct = 22nF Ct = 10nF 4V Active Low 500 1000 1500 2000 2500 3000 3500 4000 0 50 100 150 200 250 Timing Resistor Rt (K ohms) Auto Off Delay (seconds) Ct = 100nF Ct = 47nF Ct = 22nF Ct = 10nF 3V Active Low 500 1000 1500 2000 2500 3000 3500 0 50 100 150 200 250 Timing Resistor Rt (K ohms) Auto Off Delay (seconds) Ct = 100nF Ct = 47nF Ct = 22nF Ct = 10nF 2V Active Low 500 1000 1500 2000 2500 3000 3500 0 50 100 150 200 250 Timing Resistor Rt (K ohms) Auto Off Delay (seconds) Ct = 100nF Ct = 47nF Ct = 22nF Ct = 10nF 1500

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3.11.5 Auto Off – Overriding the Auto Off Delay

In normal operation the QT1012 output is turned off automatically after the auto-off delay. In some applications it may be useful to extend the auto-off delay (“sustain” function) or to switch the output off immediately (“cancel” function). This can be achieved by pulsing the voltage on the delay multiplier resistor Rm as shown in Figure 3-11 and Figure 3-12 on page 18. To ensure the pulse is detected it must be present for typical times as shown in Table 3-6. While Vm is held in the override state the QT1012 inhibits bursts and waits for Vm to return to its original state. When Vm returns to its original state the QT1012 performs a sensor recalibration before continuing in its current output state. Figure 3-11. Override Pulse (Delay Multiplier x1) Table 3-6. Time Delay Pulse Pulse Duration Action tp – series of short pulses, typically 65 ms “Sustain”/retrigger (reload auto-off delay counter) tp – long pulse, typically 250 ms “Cancel”/switch output to off state and inhibit further touch detection until Vm returns to original state VDD VSS VDD

9543D–AT42–08/10 AT42QT1012 Figure 3-12. Override Pulse (Delay Multiplier x24) Figure 3-13 shows override pulses being applied to a QT1012 with delay multiplier set to x1. Figure 3-13. Overriding Auto Off VDD VSS VDD C toff CC C OUT PPP P - override (reload auto off delay) O - switch output off (t burst time + 50ms) C - sensor recalibration off Bursts O P – override (reload auto off delay) O – switch output off C – sensor recalibration

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3.12 Examples of Typical Applications

Figure 3-14. Application 1 Active low, driving PNP transistor, auto off time 375s x 24 = 9000s = 2.5 hours Auto off time obtained from 3V chart in Figure 3-10 on page 16 Figure 3-15. Application 2 Active high, driving high impedance, auto off time 315s x 1 = 5.25 minutes Auto off time obtained from 5V chart in Figure 3-9 on page 15 Load VDD TIME VSS OUT 1 10k +3V SNSK SNS4 SENSE ELECTRODE 100nF 47nF 2.2k DTA143 CS RS Rt Ct Rm VDD TIME VSS OUT 1 10k +5V SNSK SNS4 SENSE ELECTRODE 100nF 47nF 100k CS Rt Ct Rs Rop Rm

9543D–AT42–08/10 AT42QT1012 4. Circuit Guidelines

4.1 More Information

Refer to Application Note QTAN0002, Secrets of a Successful QTouch™ Design and the Touch Sensors Design Guide (both downloadable from the Atmel ® website), for more information on construction and design methods.

4.2 Sample Capacitor

Cs is the charge sensing sample capacitor. The required Cs value depends on the thickness of the panel and its dielectric constant. Thicker panels require larger values of Cs. Typical values are 2.2 nF to 50 nF depending on the sensitivity required; larger values of Cs demand higher stability and better dielectric to ensure reliable sensing. The Cs capacitor should be a stable type, such as X7R ceramic or PPS film. For more consistent sensing from unit to unit, 5 percent tolerance capacitors are recommended. X7R ceramic types can be obtained in 5 percent tolerance at little or no extra cost. In applications where high sensitivity (long burst length) is required the use of PPS capacitors is recommended. For battery powered operation a higher value sample capacitor may be required.

4.3 Rs Resistor

Series resistor Rs is in line with the electrode connection and should be used to limit ESD currents and to suppress radio frequency interference (RFI). It should be approximately 4.7 k to 33 k. Although this resistor may be omitted, the device may become susceptible to external noise or RFI. See Application Note QTAN0002, Secrets of a Successful QTouch™ Design , for details of how to select these resistors.

4.4 Power Supply and PCB Layout

See Section 5.2 on page 22 for the power supply range. If the power supply is shared with another electronic system, care should be taken to ensure that the supply is free of digital spikes, sags, and surges which can adversely affect the QT1012. The QT1012 will track slow changes in Vdd, but it can be badly affected by rapid voltage fluctuations. It is highly recommended that a separate voltage regulator be used just for the QT1012 to isolate it from power supply shifts caused by other components. If desired, the supply can be regulated using a Low Dropout (LDO) regulator, although such regulators often have poo r transient line and load stability. See Application Note QTAN0002, Secrets of a Successful QTouch™ Design , for further information on power supply considerations. Parts placement: The chip should be placed to minimize the SNSK trace length to reduce low frequency pickup, and to reduce stray Cx which degrades gain. The Cs and Rs resistors (see Figure 1-1 on page 3) should be placed as close to the body of the chip as possible so that the trace between Rs and the SNSK pin is very short, thereby reducing the antenna-like ability of this trace to pick up high frequency signals and feed them directly into the chip. A ground plane can be used under the chip and the associated discrete components, but the trace from the Rs resistor and the electrode should not run near ground, to reduce loading. For best EMC performance the circuit should be made entirely with SMT components.

9543D–AT42–08/10 AT42QT1012 Electrode trace routing: Keep the electrode trace (and the electrode itself) away from other signal, power, and ground traces including over or next to ground planes. Adjacent switching signals can induce noise onto the sensing signal ; any adjacent trace or ground plane next to, or under, the electrode trace will cause an increase in Cx load and desensitize the device. Bypass Capacitor: Important – For proper operation a 100 nF (0.1 µF) ceramic bypass capacitor must be used directly between Vdd and Vss, to prevent latch-up if there are substantial Vdd transients; for example, dur ing an ESD event. The bypass capacitor should be placed very close to the Vss and Vdd pins.

4.5 Power On

On initial power up, the QT1012 requires approximately 250 ms to power on to allow power supplies to stabilize. During this time the OUT pin state is not valid and should be ignored. Note that recalibration takes approximately 200 ms, so the QT1012 takes approximately 450 ms in total from initial power on to become active.

9543D–AT42–08/10 AT42QT1012 5. Specifications

5.1 Absolute Maxi mum Specifications

5.2 Recommended O perating Conditions

5.3 AC Specifications

Operating temperature -40°C to +85°C Storage temperature -55°C to +125°C VDD 0 to +6.5V Max continuous pin current, any control or drive pin ±20 mA Short circuit duration to Vss, any pin Infinite Short circuit duration to Vdd, any pin Infinite Voltage forced onto any pin -0.6V to (V DD + 0.6) Volts CAUTION: Stresses beyond those listed under Absolute Maximum Specifications may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum specification conditions for extended periods may affect device reliability V DD +1.8 to 5.5V Short-term supply ripple + noise ±20 mV Long-term supply stability ±100 mV Cs value 2.2 to 50 nF Cx value 5 to 20 pF Vdd = 3.0V, Cs = 10 nF, Cx = 5 pF, Ta = recommended range, unless otherwise noted Parameter Description Min Typ Max Units Notes T RC Recalibration time 200 ms Cs, Cx dependent TPC Charge duration 3 µs ±7.5% spread spectrum variation TPT Transfer duration 6 µs ±7.5% spread spectrum variation TG1 Time between end of burst and start of the next (Fast mode) 2.6 ms TG2 Time between end of burst and start of the next (LP mode) 80 ms Increases with decreasing V DD TBL Burst length 1.86 ms VDD, Cs and Cx dependent. See Section 4.2 for capacitor selection. TR Response time 100 ms

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5.4 Signal Processing

5.5 DC Specifications

Vdd = 3.0V, Cs = 10 nF, Cx = 5 pF, Ta = recommended range, unless otherwise noted Description Min Typ Max Units Notes Threshold differential 10 counts Hysteresis 2 counts Consensus filter length 4 samples Vdd = 3.0V, Cs = 4.7 nF, Cx = 5 pF, short charge pulse, Ta = recommended range, unless otherwise noted Parameter Description Min Typ Max Units Notes V DD Supply voltage 1.8 5.5 V IDD Supply current 124 µA 1.8V 2.0V 3.0V 4.0V 5.0V V DDS Supply turn-on slope 100 V/s Required for proper start-up VIL Low input logic level 0.2 Vdd 0.3 Vdd V Vdd = 1.8V – 2.4V Vdd = 2.4V – 5.5V VHL High input logic level 0.7 Vdd 0.6 Vdd V Vdd = 1.8V – 2.4V Vdd = 2.4V – 5.5V VOL Low output voltage 0.6 V OUT, 4 mA sink VOH High output voltage V DD-0.7 V OUT, 1 mA source IIL Input leakage current ±1 µA CX Load capacitance range 0 100 pF AR Acquisition resolution 9 14 bits

9543D–AT42–08/10 AT42QT1012

5.6 Mechanical Dimensions

5.6.1 6-pin SOT23 TITLE DRAWING NO. GPC REV. Package Drawing Contact: p ackagedrawings@atmel.com 6ST1TAQ A 6ST1, 6-lead, 2.90 x 1.60 mm Plastic Small Outline MAX NOTESYMBOL MIN NOM COMMON DIMENSIONS (Unit of Measure = mm) A – – 1.45 A1 0 – 0.15 A2 0.90 – 1. 30 D 2. 80 2.90 3.00 2 E 2.60 2. 80 3.00 E1 1.50 1.60 1.75 L 0. 30 0.45 0.55 e 0.95 B SC b 0. 30 – 0.50 3 c 0.09 – 0.20 θ 0° – 8° Notes: 1. This package is compliant with JEDEC specification MO-178 Variation AB 2. Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrustion or gate burrs shall not exceed 0.25 mm per end. 3. Dimension b does not include dambar protrusion. Allowable dambar protrusion shall not cause the lead width to exceed the maximum b dimension by more than 0.08 mm 4. Die is facing down after trim/form. 6/30/08 Side View E E1 D e A2 A C C0.10 0.25 LO A2 A A1 C C0.10 A A SEE VIEW BC SEATING PLANE SEATING PLANE SEATING PLANE c b Pin #1 ID 2 3 5 4 Top View View B View A-A

9543D–AT42–08/10 AT42QT1012 5.6.2 8-pin UDFN/USON TITLE DRAWING NO.GPC REV. Package Drawing Contact: p ackagedrawings@atmel.com 8MA4YAG A 8PAD, 2x2x0.6 mm body, 0.5 mm pitch, 0.9x1.5 mm exposed pad, Saw singulated Thermally enhanced plastic ultra thin dual flat no lead package (UDFN/USON) 12/17/09 COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE A – – 0.60 A1 0.00 – 0.05 b 0.20 – 0. 30 D 1.95 2.00 2.05 D2 1.40 1.50 1.60 E 1.95 2.00 2.05 E2 0. 80 0.90 1.00 e – 0.50 – L 0.20 0. 30 0.40 K 0.20 –– TOP VIEW BOTTOM VIEW Note: 1. ALL DIMENSIONS ARE IN mm. ANGLES IN DEGREES. 2. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS COPLANARITY SHALL NOT EXCEED 0.05 mm. 3. WARPAGE SHALL NOT EXCEED 0.05 mm. 4. REFER JEDEC MO-236/MO-252 Pin 1 ID E D 1 2 3 4 8 7 6 5 b e K L 0.05 SIDE VIEW A c c0.05 c C0.2

9543D–AT42–08/10 AT42QT1012

5.7 Part Marking

5.7.1 AT42QT1012– 6-pin SOT23-6

5.7.2 AT42QT1012– 8-pin UDFN/USON

5.8 Part Number

5.9 Moisture Sensiti vity Level (MSL)

AT42QT1012-TSHR 6-pin SOT23 RoHS compliant IC AT42QT1012-MAH 8-pin UDFN/USON RoHS compliant IC MSL Rating Peak Body Temperature Specifications MSL1 260 oC IPC/JEDEC J-STD-020 1012Pin 1 ID Abbreviated Part Number: AT42QT1012 Pin 1 ID 1012 HEC YZZ Pin 1 Class code (H = Industrial, green NiPdAu) Die Revision (Example: “E” shown) Assembly Location Code (Example: “C” shown) Lot Number Trace code (Variable text) Last Digit of Year (Variable text) Abbreviated Part Number: AT42QT1012

9543D–AT42–08/10 AT42QT1012 Associated Documents  Application Note – QTAN0002, Secrets of a Successful QTouch™ Design U s e r G u i d e – Touch Sensors Design Guide

Revision History

Revision No. History Revision A – August 2009  Initial release for chip revision 2.4 Revision B – September 2009  Changes to Cs value. Revision C – May 2010  Updated for chip revision 3.1 Revision D – August 2010  Updated for chip revision 3.3

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