AT27C512R ATMEL

Document overview

  • Manufacturer or author: Provided By digicamel.com
  • PDF pages: 15

Technical content

Features

  • Fast Read Access Time – 45 ns  Low-Power CMOS Operation – 100 µA Max Standby – 20 mA Max Active at 5 MHz  JEDEC Standard Packages – 28-lead PDIP – 32-lead PLCC – 28-lead TSOP and SOIC  5V ± 10% Supply  High-Reliability CMOS Technology – 2,000V ESD Protection – 200 mA Latchup Immunity  Rapid Programming Algorithm – 100 µs/Byte (Typical)  CMOS and TTL Compatible Inputs and Outputs  Integrated Product Identification Code  Industrial and Automotive Temperature Ranges  Green (Pb/Halide-free) Packaging Option 1. Description The AT27C512R is a low-power, high-performance 524,288-bit one-time programma- ble read-only memory (OTP EPROM) organized 64K by 8 bits. It requires only one 5V power supply in normal read mode operation. Any byte can be accessed in less than 45 ns, eliminating the need for speed reducing WAIT states on high-performance microprocessor systems. Atmel’s scaled CMOS technology provides high-speed, lower active power consump- tion, and significantly faster programming. Power consumption is typically only 8 mA in Active Mode and less than 10 µA in Standby. The AT27C512R is available in a choice of industry-standard JEDEC-approved one- time programmable (OTP) plastic PDIP, PLCC, SOIC, and TSOP packages. All devices feature two-line control (CE , OE) to give designers the flexibility to prevent bus contention. With 64K byte storage capability, the AT27C512R allows firmware to be stored reli- ably and to be accessed by the system without the delays of mass storage media. Atmel’s AT27C512R has additional features to ensure high quality and efficient pro- duction use. The Rapid Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100 µs/byte. The Integrated Product Identifi cation Code electronically identifies the device and manufacturer. This feature is used by industry-standard programming equipment to select the proper programming algorithms and voltages. 512K (64K x 8) OTP EPROM AT27C512R 0015O–EPROM–12/07

0015O–EPROM–12/07 AT27C512R 2.1 28-lead PDIP/SOIC Top View 2.2 32-lead PLCC Top View Note: PLCC Package Pins 1 and 17 are Don’t Connect. A15 A12 GND VCC A14 A13 A11 OE/VPP A10 CE NC A11 NC OE/VPP A10 CE GND NC A12 A15 NC VCC A14 A13 2.3 28-lead TSOP Top View – Type 1 A15 A12 A10 CE GND OE/VPP A11 A13 A14 VCC 2. Pin Configurations Pin Name Function A0 - A15 Addresses O0 - O7 Outputs CE Chip Enable OE/VPP Output Enable/ Program Supply NC No Connect

0015O–EPROM–12/07 AT27C512R 3. System Considerations Switching between active and standby conditions via the Chip Enable pin may produce tran- sient voltage excursions. Unless accommodated by the system design, these transients may exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the V CC and Ground terminals of the device, as close to the device as possible. Additionally, to stabi lize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the V CC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array. 4. Block Diagram Note: 1. Minimum voltage is -0.6V DC which may undershoot to -2.0V fo r pulses of less than 20 ns. Maximum output pin voltage is VCC + 0.75V DC which may overshoot to +7.0 volts for pulses of less than 20 ns. 5. Absolute Maximum Ratings* Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and func- tional operation of the device at these or any other conditions beyond those indicated in the opera- tional sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Voltage on Any Pin with (1) Voltage on A9 with VPP Supply Voltage with

0015O–EPROM–12/07 AT27C512R Notes: 1. X can be V IL or VIH. 2. Refer to Programming Characteristics. 4. Two identifier bytes may be selected. All Ai inputs are held low (V IL), except A9 which is set to VH and A0 which is toggled low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte. Note: 1. V CC must be applied simultaneously with or before OE/VPP, and removed simultaneously with or after OE/VPP.. 6. Operating Modes Mode/Pin CE OE/VPP Ai Outputs Read V IL VIL Ai D OUT Output Disable V IL VIH X (1) High Z Standby V IH X(1) X High Z Rapid Program(2) VIL VPP Ai D IN PGM Inhibit V IH VPP X(1) High Z Product Identification(4) VIL VIL A9 =VH (3) A0 = VIH or VIL A1 - A15 = VIL Identification Code 7. DC and AC Operating Cond itions for Read Operation AT27C512R -45 -70 Operating Temp.(Case) Auto. -40 ° C - 125° C VCC Supply 5V ± 10% 5V ± 10% 8. DC and Operating Characteristics for Read Operation Symbol Parameter Condition Min Max Units ILI Input Load Current V IN = 0V to VCC Ind. ±1 µA Auto. ±5 µA ILO Output Leakage Current V OUT = 0V to VCC Ind. ±5 µA Auto. ±10 µA ISB VCC (1) Standby Current ISB1 (CMOS), CE = VCC ± 0.3V 100 µA ISB2 (TTL), CE = 2.0 to VCC + 0.5V 1 mA ICC VCC Active Current f = 5 MHz, I OUT = 0 mA, CE = VIL 20 mA VIL Input Low Voltage -0.6 0.8 V VIH Input High Voltage 2.0 V CC + 0.5 V VOL Output Low Voltage I OL = 2.1 mA 0.4 V VOH Output High Voltage I OH = -400 µA 2.4 V

0015O–EPROM–12/07 AT27C512R Note: 1. See AC Waveforms for Read Operation. 10. AC Waveforms for Read Operation(1) surement reference levels for all other speed grades are VOL = 0.8V and VOH = 2.0V. Input AC drive levels are VIL = 0.45V and VIH = 2.4V. 2. OE /VPP may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE. 3. OE /VPP may be delayed up to tACC - tOE after the address is valid without impact on tACC. 4. This parameter is only sampled and is not 100% tested. 5. Output float is defined as t he point when data is no longer driven. 9. AC Characteristics for Read Operation Symbol Parameter Condition AT27C512R Units -45 -70 Min Max Min Max tACC (1) Address to Output Delay CE = OE/VPP = VIL 45 70 ns tCE (1) CE to Output Delay OE /VPP = VIL 45 70 ns tOE (1) OE/VPP to Output Delay CE = VIL 20 30 ns tDF (1) OE/VPP or CE High to Output Float, Whichever Occurred First 20 25 ns tOH Output Hold from Address, CE or OE/VPP, Whichever Occurred First 77 n s

0015O–EPROM–12/07 AT27C512R 11. Input Test Waveforms and Measurement Levels 12. Output Test Load Note: 1. C L = 100 pF including jig capacitance, except for the -45 devices, where CL = 30 pF . Note: 1. Typical values for nominal supply voltage. Th is parameter is only sampled and is not 100% tested. tR, tF < 5 ns (10% to 90%) For -45 devices only: tR, tF < 20 ns (10% to 90%) For -70 devices: 13. Pin Capacitance f = 1 MHz, T = 25°C (1) Symbol Typ Max Units Conditions CIN 46 p F V IN = 0V COUT 81 2 p F V OUT = 0V

0015O–EPROM–12/07 AT27C512R 14. Programming Waveforms(1) Notes: 1. The Input Timing Reference is 0.8V for V IL and 2.0V for VIH. 2. t OE and tDFP are characteristics of the device but must be accommodated by the programmer. 15. DC Programming Characteristics Symbol Parameter Test Conditions Limits UnitsMin Max ILI Input Load Current V IN = VIL,VIH ±10 µA VIL Input Low Level -0.6 0.8 V VIH Input High Level 2.0 V CC + 1 V VOL Output Low Voltage I OL = 2.1 mA 0.4 V VOH Output High Voltage I OH = -400 µA 2.4 V ICC2 VCC Supply Current (Program and Verify) 25 mA IPP2 OE/VPP Current CE = VIL 25 mA VID A9 Product Identification Voltage 11.5 12.5 V

0015O–EPROM–12/07 AT27C512R Notes: 1. V CC must be applied simultaneously or before OE/VPP and removed simultaneously or after OE/VPP. 2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven – see timing diagram. 3. Program Pulse width tolerance is 100 µsec ± 5%. 16. AC Programming Characteristics Symbol Parameter Test Conditions (1) Limits UnitsMin Max tAS Address Setup Time Input Rise and Fall Times (10% to 90%) 20 ns Input Pulse Levels 0.45V to 2.4V Input Timing Reference Level 0.8V to 2.0V Output Timing Reference Level 0.8V to 2.0V 2µ s tOES OE/VPP Setup Time 2 µs tOEH OE/VPP Hold Time 2 µs tDS Data Setup Time 2 µs tAH Address Hold Time 0 µs tDH Data Hold Time 2 µs tDFP CE High to Output Float Delay(2) 01 3 0 n s tVCS VCC Setup Time 2 µs tPW CE Program Pulse Width(3) 95 105 µs tDV Data Valid from CE(2) 1µ s tVR OE/VPP Recovery Time 2 µs tPRT OE/VPP Pulse Rise Time During Programming 50 ns 17. Atmel’s AT27C512R Integrated Product Identification Code Codes Pins Hex DataA0 O7 O6 O5 O4 O3 O2 O1 O0 M a n u f a c t u r e r 000011110 1 E D e v i c e T y p e 100001101 0 D

0015O–EPROM–12/07 AT27C512R 18. Rapid Programming Algorithm A 100 µs CE pulse width is used to program. The address is set to the first location. V CC is raised to 6.5V and OE /VPP is raised to 13.0V. Each address is first programmed with one 100 µs CE pulse without verification. Then a verification/reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 100 µs pulses are applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is considered failed. After the byte verifies properly, the next address is selected until all have been checked. OE/VPP is then lowered to VIL and VCC to 5.0V. All bytes are read again and compared with the original data to determine if the device passes or fails.

0015O–EPROM–12/07 AT27C512R 19. Ordering Information Note: 1. The 28-pin SOIC package is not recommended for new designs.

19.1 Standard Package

(ns) ICC (mA) Ordering Code Package Operation RangeActive Standby 45 20 0.1 AT27C512R-45JI AT27C512R-45PI AT27C512R-45RI AT27C512R-45TI 32J 28P6 28R (1) 28T Industrial (-40° C to 85° C) 70 20 0.1 AT27C512R-70JI AT27C512R-70PI AT27C512R-70RI AT27C512R-70TI 32J 28P6 28R (1) 28T Industrial (-40° C to 85° C) 20 0.1 AT27C512R-70JA AT27C512R-70PA AT27C512R-70RA 32J 28P6 28R (1) Automotive (-40° C to 125° C) Note: Not recommended for new designs. Use Green package option.

19.2 Green Package (Pb/Halide-free)

(ns) ICC (mA) Ordering Code Package Operation RangeActive Standby 45 20 0.1 AT27C512R-45JU AT27C512R-45PU AT27C512R-45RU AT27C512R-45TU 32J 28P6 28R(1) 28T Industrial (-40° C to 85° C) 70 20 0.1 AT27C512R-70JU AT27C512R-70PU AT27C512R-70RU AT27C512R-70TU 32J 28P6 28R(1) 28T Industrial (-40° C to 85° C) Package Type 32J 32-Lead, Plastic J-Leaded Chip Carrier (PLCC) 28P6 28-Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) 28R 28-Lead, 0.330" Wide, Plastic Gull Wing Small Outline (SOIC) 28T 28-Lead, Thin Small Outline Package (TSOP)

0015O–EPROM–12/07 AT27C512R Packaging Information 19.3 32J – PLCC DRAWING NO. REV.

2325 Orchard Parkway

San Jose, CA 95131R TITLE 32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC) B32J 10/04/01 1.14(0.045) X 45˚ PIN NO. 1 IDENTIFIER 1.14(0.045) X 45˚ 0.51(0.020)MAX 0.318(0.0125) 0.191(0.0075) 45˚ MAX (3X) A B1 E2 B e E1 E D COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE Notes: 1. This package conforms to JEDEC reference MS-016, Variation AE. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254 mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. Lead coplanarity is 0.004" (0.102 mm) maximum. A 3.175 – 3.556 A1 1.524 – 2.413 A2 0.381 – – D 12.319 – 12.573 D1 11.354 – 11.506 Note 2 D2 9.906 – 10.922 E 14.859 – 15.113 E1 13.894 – 14.046 Note 2 E2 12.471 – 13.487 B 0.660 – 0.813 B1 0.330 – 0.533 e 1.270 TYP

0015O–EPROM–12/07 AT27C512R 19.4 28P6 – PDIP San Jose, CA 95131 TITLE DRAWING NO. R REV. 28P6, 28-lead (0.600"/15.24 mm Wide) Plastic Dual Inline Package (PDIP) B28P6 09/28/01 PIN B REF E C L SEATING PLANE A 0º ~ 15º D e eB COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE A – – 4.826 A1 0.381 – – D 36.703 – 37.338 Note 2 E 15.240 – 15.875 E1 13.462 – 13.970 Note 2 B 0.356 – 0.559 B1 1.041 – 1.651 L 3.048 – 3.556 C 0.203 – 0.381 eB 15.494 – 17.526 e 2.540 TYP Notes: 1. This package conforms to JEDEC reference MS-011, Variation AB. 2. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010").

0015O–EPROM–12/07 AT27C512R 19.5 28R – SOIC A 2. 39 – 2.79 A1 0.050 – 0. 356 D 1 8.00 – 1 8.50 Note 1 E 11.70 – 12.50 E1 8.59 – 8.79 Note 1 B 0. 356 – 0.50 8 C 0.20 3 – 0. 305 L 0.94 – 1.27 e 1.27 TYP PIN 1 0º ~ 8º San Jose, CA 95131 TITLE DRAWING NO. R REV. 28R, 28-lead, 0.330" Body Width, Plastic Gull Wing Small Outline (SOIC) C28R 5/18/2004 COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE A E C e D L B Note: 1. Dimensions D and E1 do not include mold Flash or protrusion. Mold Flash or protrusion shall not exceed 0.25 mm (0.010").

0015O–EPROM–12/07 AT27C512R 19.6 28T – TSOP San Jose, CA 95131 TITLE DRAWING NO. R REV. 28T, 28-lead (8 x 13.4 mm) Plastic Thin Small Outline Package, Type I (TSOP) C28T 12/06/02 PIN 1 0º ~ 5º D1 D Pin 1 Identifier Area be E A c L GAGE PLANESEATING PLANE COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE Notes: 1. This package conforms to JEDEC reference MO-183. 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion on E is 0.15 mm per side and on D1 is 0.25 mm per side. 3. Lead coplanarity is 0.10 mm maximum. A – – 1.20 A1 0.05 – 0.15 A2 0.90 1.00 1.05 D 13.20 13.40 13.60 D1 11.70 11.80 11.90 Note 2 E 7.90 8.00 8.10 Note 2 L 0.50 0.60 0.70 L1 0.25 BASIC b 0.17 0.22 0.27 c 0.10 – 0.21 e 0.55 BASIC

0015O–EPROM–12/07 Headquarters International Atmel Corporation San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Asia Room 1219 Chinachem Golden Plaza

77 Mody Road Tsimshatsui

Tel: (852) 2721-9778 Fax: (852) 2722-1369 Atmel Europe Le Krebs 8, Rue Jean-Pierre Timbaud BP 309

78054 Saint-Quentin-en-

9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Product Contact Web Site www.atmel.com Technical Support eprom@atmel.com Sales Contact www.atmel.com/contacts Literature Requests www.atmel.com/literature Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL ’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL ’S WEB SITE, ATMEL ASSUMES NO LI ABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTOR Y WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICU LAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR I NCIDEN- TAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATME L HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or co mpleteness of the contents of this document and reserves the ri ght to make changes to specifications and product descriptions at any time without notice. Atmel does not make any commitment to update the information contained her ein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not int ended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2007 Atmel Corporation. All rights reserved. Atmel ®, logo and combinations thereof, and others ar e registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others.