AT27C2048 ATMEL

Document overview

  • Manufacturer or author: Provided By digicamel.com
  • PDF pages: 9

Technical content

Features

  • Fast Read Access Time - 55 ns
  • Low Power CMOS Operation – 100 µA Maximum Standby – 35 mA Maximum Active at 5 MHz
  • JEDEC Standard Packages – 40-Lead 600 mil PDIP – 44-Lead PLCC – 40-Lead TSOP (10 mm X 14 mm)
  • Direct Upgrade from 512K bit and 1M bit (AT27C516 and AT27C1024) EPROMs
  • 5V ± 10% Power Supply
  • High Reliability CMOS Technology – 2,000V ESD Protection – 200 mA Latchup Immunity
  • Rapid™ Programming Algorithm - 50 µs/word (typical)
  • CMOS and TTL Compatible Inputs and Outputs
  • Integrated Product Identification Code
  • Commercial and Industrial Temperature Ranges

Description

The AT27C2048 is a low-power, high performance 2,097,152-bit one-time program- mable read only memory (OTP EPROM) organized 128K by 16 bits. It requires a sin- gle 5V power supply in normal read mode operation. Any word can be accessed in less than 55 ns, eliminating the need for speed-reducing WAIT states. The by-16 organization makes this part ideal for high-performance 16 and 32 bit microprocessor systems. TSOP Top View Type 1 A10 A11 A12 A13 A14 A15 A16 PGM VCC VPP CE O15 O14 O13 O12 O11 O10 GND OE GND PDIP Top View VPP CE O15 O14 O13 O12 O11 O10 GND OE VCC PGM A16 A15 A14 A13 A12 A11 A10 GND PLCC Top View O12 O11 O10 GND NC A13 A12 A11 A10 GND NC OE DC O13 O14 O15 CE VPP DC VCC PGM A16 A15 A14 2-Megabit (128K x 16) OTP EPROM AT27C2048 0632B-A–06/97 Pin Configurations Note: Both GND pins must be con- nected. Pin Name Function A0 - A16 Addresses O0 - O15 Outputs CE Chip Enable OE Output Enable PGM Program NC No Connect Note: PLCC package pins 1 and 23 are DON’T CONNECT. (continued)

In read mode, the AT27C2048 typically consumes 15 mA. Standby mode supply current is typically less than 10 µA. The AT27C2048 is available in industry standard JEDEC-approved one-time programmable (OTP) plastic PDIP, PLCC, and TSOP packages. The device features two-line control (CE , OE) to eliminate bus contention in high-speed systems. With high density 128K word storage capability, the AT27C2048 allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media. Atmel’s AT27C2048 has additional features that ensure high quality and efficient production use. The Rapid ™ Pro- gramming Algorithm reduces the time required to program the part and guarantees reliable programming. Program- ming time is typically only 50 µs/word. The Integrated Prod- uct Identification Code electronically identifies the device and manufacturer. This feature is used by industry stan- dard programming equipment to select the proper program- ming algorithms and voltages. System Considerations Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these tran- sients may exceed data sheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high frequency, low inherent inductance, ceramic capacitor should be uti- lized for each device. This capacitor should be connected between the V CC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array.

Absolute Maximum Ratings* Voltage on Any Pin with Voltage on A9 with (1) VPP Supply Voltage with Operating Modes Notes: 1. X can be VIL or VIH. 2. Refer to the Programming characteristics. 4. T wo identifier words may be selected. All Ai inputs are held low (VIL), except A9, which is set to VH , and A0, which is toggled low (VIL) to select the Manufacturer’s Identification word and high (VIH) to select the Device Code word. 5. Standby VCC current (ISB ) is specified with VPP = VCC . VCC > VPP will cause a slight increase in ISB . Mode/Pin CE OE PGM Ai V PP Outputs Read V IL VIL X(1) Ai X (1) D OUT Output Disable X V IH XXX H i g h Z Standby V IH XX X X (5) High Z Rapid Program(2) VIL VIH VIL Ai V PP D IN PGM Verify V IL VIL VIH Ai V PP D OUT PGM Inhibit V IH XX X V PP High Z Product Identification(4) VIL VIL X A9 = VH (3) A0 = VIH or VIL A1 - A16 = VIL VCC Identification Code *NOTICE: Stresses beyond those listed under “Absolute Maxi- mum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other condi- tions beyond those indicated in the operational sec- tions of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Maximum voltage is -0.6V dc which may undershoot to - 2.0V for pulses of less than 20 ns. Maximum output pin voltage is V CC + 0.75V dc which may overshoot to +7.0V for pulses of less than 20 ns.

DC and AC Operating Conditions for Read Operation DC and Operating Characteristics for Read Operation Notes: 1. V CC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. 2. V PP may be connected directly to VCC , except during programming. The supply current would then be the sum of ICC and IPP. AC Characteristics for Read Operation Notes: 1. 2, 3, 4, 5. See the AC Waveforms for Read Operation diagram. AT27C2048 Operating Temperature (Case) V CC Power Supply 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10% Symbol Parameter Condition Min Max Units ILI Input Load Current V IN = 0V to VCC ± 1 µA ILO Output Leakage Current V OUT = 0V to VCC ± 5 µA IPP1 (2) VPP (1) Read/Standby Current V PP = VCC 10 µA ISB VCC (1) Standby Current ISB1 (CMOS) CE = VCC ± 0.3V 100 µA ISB2 (TTL) CE = 2.0 to VCC + 0.5V 1m A ICC VCC Active Current f = 5 MHz, IOUT = 0 mA, CE = VIL 35 mA VIL Input Low Voltage -0.6 0.8 V VIH Input High Voltage 2.0 V CC + 0.5 V VOL Output Low Voltage I OL = 2.1 mA 0.4 V VOH Output High Voltage I OH = -400 µA2 . 4 V AT27C2048 Symbol Parameter Condition Min Max Min Max Min Max Min Max Min Max Units tACC (3) Address to Output Delay CE = OE = VIL 55 70 90 120 150 ns tCE (2) CE to Output Delay OE = VIL 55 70 90 120 150 ns tOE (2)(3) OE to Output Delay CE = VIL 20 30 35 40 50 ns tDF (4)(5) OE or CE High to Output Float, whichever occurred first 20 20 20 30 35 ns t OH (4) Output Hold from Address, CE or OE, whichever occurred first 77000 n s

AC Waveforms for Read Operation(1) 2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE . 3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC . 4. This parameter is only sampled and is not 100% tested. 5. Output float is defined as the point when data is no longer driven. Input Test Waveforms and Measurement Levels For -55 devices only: tR , tF < 5 ns (10% to 90%) For -70, -90, -12 and -15 devices: tR , tF < 20 ns (10% to 90%) Pin Capacitance (f = 1 MHz T = 25°C)(1) Note: Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. Typ Max Units Conditions C IN 41 0 p F V IN = 0V C OUT 81 2 p F V OUT = 0V Output Test Load Note: CL = 100 pF including jig capacitance, except for the -55 devices, where CL = 30 pF .

Programming Waveforms (1) Notes: 1. The Input Timing Reference is 0.8V for VIL and 2.0V for VIH. 2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer. 3. When programming the AT27C2048, a 0.1 µF capacitor is required across VPP and ground to suppress spurious voltage transients. DC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V Limits Symbol Parameter Test Conditions Min Max Units ILI Input Load Current V IN = VIL, VIH ±10 µA VIL Input Low Level -0.6 0.8 V VIH Input High Level 2.0 V CC + 0.5 V VOL Output Low Voltage I OL = 2.1 mA 0.4 V VOH Output High Voltage I OH = -400 µA2 . 4 V ICC2 VCC Supply Current (Program and Verify) 50 mA IPP2 VPP Supply Current CE = VIL 30 mA VID A9 Product Identification Voltage 11.5 12.5 V

AC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V Notes: 1. V CC must be applied simultaneously or before VPP and removed simultaneously or after VPP. 2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven —see timing diagram. 3. Program Pulse width tolerance is 50 µsec ± 5%. Atmel’s 27C2048 Intergrated Product Identification Code Symbol Test Conditions(1) AC Conditions of Test Limits UnitsParameter Min Max tAS Address Setup Time Input Rise and Fall Times (10% to 90%) 20ns Input Pulse Levels 0.45V to 2.4V Input Timing Reference Level 0.8V to 2.0V Output Timing Reference Level 0.8V to 2.0V 2 µs tOES OE Setup Time 2 µs tDS Data Setup Time 2 µs tAH Address Hold Time 0 µs tDH Data Hold Time 2 µs tDFP OE High to Output Float Delay(2) 0 130 ns tVPS VPP Setup Time 2 µs tVCS VCC Setup Time 2 µs tPW PGM Program Pulse Width(3) 47.5 52.5 µs tOE Data Valid from OE 150 ns tPRT VPP Pulse Rise Time During Programming 50 ns Codes Pins Hex DataA0 015-08 O7 O6 O5 O4 O3 O2 O1 O0 Manufacturer 0 0 000111100 0 1 E Device Type 1 0 111101110 0 F 7

Rapid Programming Algorithm A 50 µs CE pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and VPP is raised to 13.0V. Each address is first programmed with one 50 µ s CE pulse without verification. Then a verifica- tion/reprogramming loop is executed for each address. In the event a word fails to pass verification, up to 10 succes- sive 50 µs pulses are applied with a verification after each pulse. If the word fails to verify after 10 pulses have been applied, the part is considered failed. After the word verifies properly, the next address is selected until all have been checked. V PP is then lowered to 5.0V and VCC to 5.0V. All words are read again and compared with the original data to determine if the device passes or fails.

Ordering Information

(ns) ICC (mA) Active Standby Ordering Code Package Operation Range 55 35 0.1 AT27C2048-55JC AT27C2048-55PC AT27C2048-55VC 44J 40P6 40V Commercial (0°C to 70°C) 35 0.1 AT27C2048-55JI AT27C2048-55PI AT27C2048-55VI 44J 40P6 40V Industrial (-40°C to 85°C) 70 35 0.1 AT27C2048-70JC AT27C2048-70PC AT27C2048-70VC 44J 40P6 40V Commercial (0°C to 70°C) 35 0.1 AT27C2048-70JI AT27C2048-70PI AT27C2048-70VI 44J 40P6 40V Industrial (-40°C to 85°C) 90 35 0.1 AT27C2048-90JC AT27C2048-90PC AT27C2048-90VC 44J 40P6 40V Commercial (0°C to 70°C) 35 0.1 AT27C2048-90JI AT27C2048-90PI AT27C2048-90VI 44J 40P6 40V Industrial (-40°C to 85°C) 120 35 0.1 AT27C2048-12JC AT27C2048-12PC AT27C2048-12VC 44J 40P6 40V Commercial (0°C to 70°C) 35 0.1 AT27C2048-12JI AT27C2048-12PI AT27C2048-12VI 44J 40P6 40V Industrial (-40°C to 85°C) 150 35 0.1 AT27C2048-15JC AT27C2048-15PC AT27C2048-15VC 44J 40P6 40V Commercial (0°C to 70°C) 35 0.1 AT27C2048-15JI AT27C2048-15PI AT27C2048-15VI 44J 40P6 40V Industrial (-40°C to 85°C) Package Type 44J 44 Lead, Plastic J-Leaded Chip Carrier (PLCC) 40P6 40 Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) 40V 40 Lead, Plastic Thin Small Outline Package (TSOP) 10 x 14 mm