Download PDFAT27C010-70JU ATMEL
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Fast read access time – 45ns Low-power CMOS operation – 100µA max standby – 25mA max active at 5MHz JEDEC standard packages – 32-lead PDIP – 32-lead PLCC 5V ±10% supply High-reliability CMOS technology – 2000V ESD protection – 200mA latchup immunity Rapid programming algorithm – 100 µs/byte (typical) CMOS- and TTL-compatible inputs and outputs Integrated product identification code Industrial temperature range Green (Pb/halide-free) packaging option 1. Description The Atmel® AT27C010 is a low-power, high-performance 1,048,576-bit, one-time pro- grammable, read-only memory (OTP EPROM) organized as 128K by 8 bits. Thedevice requires only one 5V power supply in normal read mode operation. Any byte can be accessed in less than 45ns, eliminating the need for speed reducing WAIT states on high- performance microprocessor systems. In read mode, the AT27C010 typically consumes only 8mA. Standby mode supply current is typically less than 10µA. The AT27C010 is available in a choice of industry standard, JEDEC approved, one-time pro- grammable (OTP) PDIP and PLCC packages. All devices feature two-line control ( CE, OE) to give designers the flexibility to prevent bus contention. With 128K byte storage capability, the AT27C010 allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media. The AT27C010 has additional features to ensure high quality and efficient production use. The rapid programming algorithm reduces the time required to program the part and guar- antees reliable programming. Programming time is typically only 100 µs/byte. The integrated product identification code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper pro- gramming algorithms and voltages. 1Mb (128K x 8) One-time Programmable, Read-only Memory Atmel AT27C010 0321N–EPROM–4/11
0321N–EPROM–4/11 Atmel AT27C010 2. Pin configurations s 3. System considerations Switching between active and standby conditions via the chip enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed datasheet limits, resulting in device nonconformance. At a minimum, a 0.1µF, high-frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the V CC and ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7µF bulk electrolytic capacitor should be utilized, again connected between the VCC and ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array. Figure 3-1. Block diagram Pin name Function A0 - A16 Addresses O0 - O7 Outputs CE Chip enable OE Output enable PGM Program strobe NC No connect A14 A13 A11 OE A10 CE GND A12 A15 A16 VPP VCC PGM NC 32-lead PLCC Top view VPP A16 A15 A12 GND VCC PGM NC A14 A13 A11 OE A10 CE 32-lead PDIP Top view
0321N–EPROM–4/11 Atmel AT27C010 4. Absolute maximum ratings* Note: 1. Minimum voltage is -0.6V DC, which may undershoot to -2.0V for pulses of less than 20ns. Maximum output pin voltage is VCC + 0.75V DC, which may overshoot to +7.0V for pulses of less than 20ns. 5. DC and AC characteristics Table 5-1. Operating modes Note: 1. X can be V IL or VIH. 2. Refer to programming characteristics. 3. V H = 12.0 ± 0.5V. 4. Two identifier bytes may be selected. All Ai inputs are held low (V IL), except A9, which is set to VH, and A0, which is toggled low (VIL) to select the manufacturer’s identification byte and high (VIH) to select the device code byte. Table 5-2. DC and AC operating conditions for read operation imum ratings” may cause permanent damage to the device. This is a stress rating only, and func- tional operation of the device at these or any other conditions beyond those indicated in the opera- tional sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Voltage on any pin with (1) Voltage on A9 with (1) VPP supply voltage with Mode/Pin CE OE PGM Ai V PP Outputs Read V IL VIL X(1) Ai X D OUT Output disable X V IH X X X High Z Standby V IH X X X X High Z Rapid program(2) VIL VIH VIL Ai V PP DIN PGM verify V IL VIL VIH Ai V PP DOUT PGM inhibit V IH XX X V PP High Z Product identification(4) VIL VIL X A9 = VH (3) A0 = VIH or VIL A1 - A16 = VIL X Identification code Atmel AT27C010 -45 -70 Operating temp. (case) Ind. -40 C - 85C -40 C - 85C VCC power supply 5V 10% 5V 10%
0321N–EPROM–4/11 Atmel AT27C010 Table 5-3. DC and operating characteristics for read operation Notes: 1. V CC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. 2. V PP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and IPP. Table 5-4. AC characteristics for read operation Figure 5-1. AC waveforms for read operation (1) 2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE. 3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC. 4. This parameter is only sampled, and is not 100% tested. 5. Output float is defined as the point when data is no longer driven. Symbol Parameter Condition Min Max Units ILI Input load current V IN = 0V to VCC Ind. ±1µ A ILO Output leakage current V OUT = 0V to VCC Ind. ±5µ A IPP1(2) VPP (1)) read/standby current V PP = VCC 10 µA ISB VCC (1) standby current ISB1 (CMOS), CE = VCC± 0.3V 100 µA ISB2 (TTL), CE = 2.0 to VCC + 0.5V 1 mA ICC VCC active current f = 5MHz, I OUT = 0mA, CE = VIL 25 mA VIL Input low voltage -0.6 0.8 V VIH Input high voltage 2.0 V CC + 0.5 V VOL Output low voltage I OL = 2.1mA 0.4 V VOH Output high voltage I OH = -400µA 2.4 V Symbol Parameter Condition Atmel AT27C010 Units -45 -70 Min Max Min Max tACC (3) Address to output delay CE = OE = VIL 45 70 ns tCE (2) CE to output delay OE = VIL 45 70 ns tOE (2)(3) OE to output delay CE = VIL 20 30 ns tDF (4)(5) OE or CE high to output float, whichever occurred first 20 25 ns tOH Output hold from address, CE or OE, whichever occurred first 7 7 ns
0321N–EPROM–4/11 Atmel AT27C010 Figure 5-4. Programming Waveforms (1) Notes: 1. The input timing reference is 0.8V for V IL and 2.0V for VIH. 2. t OE and tDFP are characteristics of the device, but must be accommodated by the programmer. 3. When programming the Atmel AT27C010, a 0.1µF capacitor is required across V PP and ground to suppress spurious volt- age transients.
0321N–EPROM–4/11 Atmel AT27C010 Table 5-6. DC programming characteristics Table 5-7. AC programming characteristics Notes: 1. V CC must be applied simultaneously with or before VPP and removed simultaneously with or after VPP. 2. This parameter is only sampled, and is not 100% tested. Output float is defined as the point where data is no longer driven. See timing diagram. 3. Program pulse width tolerance is 100µsec ±5%. Table 5-8. The Atmel AT27C010 integrated product identification code TA = 25 5°C, VCC = 6.5 0.25V, VPP = 13.0 0.25V Symbol Parameter Test conditions Limits UnitsMin Max ILI Input load current V IN = VIL, VIH 10 µA VIL Input low level -0.6 0.8 V VIH Input high level 2.0 V CC + 1 V VOL Output low voltage I OL = 2.1mA 0.4 V VOH Output high voltage I OH = -400µA 2.4 V ICC2 VCC supply current (program and verify) 40 mA IPP2 VPP supply current CE = PGM = VIL 20 mA VID A9 product identification voltage 11.5 12.5 V TA = 25 ± 5°C, VCC = 6.5 ± 0.25 V, VPP = 13.0 ± 0.25V Symbol Parameter Test conditions (1) Limits UnitsMin Max tAS Address setup time Input rise and fall times (10% to 90%) 20ns Input pulse levels 0.45V to 2.4V Input timing reference level 0.8V to 2.0V Output timing reference level 0.8V to 2.0V 2µ s tCES CE setup time 2 µs tOES OE setup time 2 µs tDS Data setup time 2 µs tAH Address hold time 0 µs tDH Data hold time 2 µs tDFP OE high to output float delay(2) 0 130 ns tVPS VPP setup time 2 µs tVCS VCC setup time 2 µs tPW PGM program pulse width(3) 95 105 µs tOE Data valid from OE 150 ns tPRT VPP pulse rise time during programming 50 ns Codes Pins Hex dataA0 O7 O6 O5 O4 O3 O2 O1 O0 Manufacturer 0 0 0 0 1 1 1 1 0 1E Device type 1 0 0 0 0 0 1 0 1 05
0321N–EPROM–4/11 Atmel AT27C010 6. Rapid programming algorithm A 100µs PGM pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and VPP is raised to 13.0V. Each address is first programmed with one 100µs PGM pulse without verification. Then a verification/reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 100µs pulses are applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is considered failed. After the byte verifies properly, the next address is selected until all have been checked. V PP is then lowered to 5.0V and VCC to 5.0V. All bytes are read again and compared with the original data to determine if the device passes or fails. Figure 6-1. Rapid programming algorithm
0321N–EPROM–4/11 Atmel AT27C010 7. Ordering information Green package option (Pb/halide-free) tACC (ns) ICC (mA) Atmel ordering code Package Lead finish Operation rangeActive Standby 45 25 0.1 AT27C010-45JU 32J Matte tin Industrial (-40C to 85C) 70 25 0.1 AT27C010-70JU AT27C010-70PU 32J 32P6 Matte tin Matte tin Industrial (-40C to 85C) Package type 32J 32-lead, plastic, J-leaded chip carrier (PLCC) 32P6 32-lead, 0.600" wide, plastic, dual inline package (PDIP)
0321N–EPROM–4/11 Atmel AT27C010 8. Package Information 32J – PLCC DRAWING NO. REV. TITLE 32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC) B32J 10/04/01 1.14(0.045) X 45° PIN NO. 1 IDENTIFIER 1.14(0.045) X 45° 0.51(0.020)MAX 0.318(0.0125) 0.191(0.0075) 45° MAX (3X) A B1 E2 B e E1 E D COMMON DIMENSIONS (Unit of measure = mm) SYMBOL MIN NOM MAX NOTE Package Drawing Contact: packagedrawings@atmel.com Notes: 1. This package conforms to JEDEC reference MS-016, Variation AE. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. Lead coplanarity is 0.004" (0.10mm) maximum. A 3.175 – 3.556 A1 1.524 – 2.413 A2 0.381 – – D 12.319 – 12.573 D1 11.354 – 11.506 Note 2 D2 9.906 – 10.922 E 14.859 – 15.113 E1 13.894 – 14.046 Note 2 E2 12.471 – 13.487 B 0.660 – 0.813 B1 0.330 – 0.533 e 1.270 TYP
0321N–EPROM–4/11 Atmel AT27C010 32P6 – PDIP TITLE DRAWING NO. REV. Package Drawing Contact: packagedrawings@atmel.com 32P6, 32-lead (0.600"/15.24mm wide) Plastic Dual Inline Package (PDIP) B32P6 09/28/01 PIN B REF E C L SEATING PLANE A 0º ~ 15º D e eB COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE A – – 4.826 A1 0.381 – – D 41.783 – 42.291 Note 1 E 15.240 – 15.875 E1 13.462 – 13.970 Note 1 B 0.356 – 0.559 B1 1.041 – 1.651 L 3.048 – 3.556 C 0.203 – 0.381 eB 15.494 – 17.526 e 2.540 TYP Note: 1. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25mm (0.010").
0321N–EPROM–4/11 Atmel AT27C010 9. Revision history Doc. Rev. Date Comments 0321N 04/2011 Remove TSOP package Add lead finish to ordering information 0321M 12/2007
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