AS2591 AMSCO

Document overview

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Technical content

Rev. 1.0 Page 1 May 1999 Key Features q q 16-digit LCD driver on a 44 pin CMOS chip q q Operating voltage range: 3.2 to 4.8V q q Low power consumption: max. 150 µA q q Driving 7-segment displays with up to 16 digits and 12 symbols q q Option for 12 digits q q Buffer for 32 digits q q 4 backplanes q q 2-wire interface q q On chip timer for showing elapsed time q q Contrast adjustable q q On chip oscillator using 32.768 kHz crystal q q Compatible with AS2525 Block Diagramme General Description The AS2591 is a CMOS integrated circuit for driving a liquid crystal display intended for use in telephones. The driver can be used with 12- or 16-digit LCDs. The 2-wire serial interface is compatible with the AS2525, single-chip handsfree telephone circuit. The device is designed for LCDs with 4 backplanes and 24 or 31 segments providing 12 or 16 7-segment digits and 12 symbols. The AS2591 also includes a timer for showing elapsed time in minutes and seconds. The contrast can be adjusted through the serial interface. Package Available in 44 pin TQFP. SERIAL I/F SEGMENT DECODER DIGIT MEMORY

32 DIGITS

32.768 kHz AS2591 DATA ADDRESS CONTROL COM1-4 S1_n S2_n Figure 1: Block diagram Austria Mikro Systeme International AG 16-Digit LCD Driver CMOS Integrated Circuit

Rev. 1.0 Page 2 May 1999 Pin Description Pin # Name Type Description S2_10 S1_10 S2_11 S1_11 S2_12 S1_12 S2_13 S1_13 S2_14 S1_14 S2_15 S1_15 AO Segment Outputs Output pins for driving segments of LCD.

13 CS DI Chip Select

Chip select signal from CPU (e.g. AS2525).

14 DI DI Data Input

Data input pin for serial interface.

15 SCLK DI Serial Clock Input

Clock input pin for serial interface.

16 VDD Supply Positive Voltage Supply

This pin is the positive power supply for the device.

17 VSS Supply Negative Voltage Supply

This pin is the negative power supply for the device. XTAL1 XTAL2 Oscillator Pins Oscillator pins for connection of a 32.768 kHz crystal.

20 VLCD AI LCD Reference Voltage

This is the input pin for setting the internal LCD reference voltage (see also Figure 4: Supply arrangement). COM1 COM2 COM3 COM4 AO Backplane Outputs Ouput pins for driving backplanes of LCD. Continues…

Rev. 1.0 Page 3 May 1999 Pin # Name Type Description S2_0 S1_0 S2_1 S1_1 S2_2 S1_2 S2_3 S1_3 S2_4 S1_4 S2_5 S1_5 S2_6 S1_6 S2_7 S1_7 S2_8 S1_8 S2_9 S1_9 AO Segment Outputs Output pins for driving segments of LCD. DI: Digital Input AI: Analogue Input DO: Digital Output AO: Analogue Output DI/O: Digital Input/Output AI/O: Analogue Input/output Pin Configuration AS2591 S1_9 S2_9 S1_8 S2_8 S1_7 S2_7 S1_6 S2_6 S1_5 S2_5 S1_4 S2_4 S1_3 S2_3 S1_2 S2_2 S1_1 S2_1 S1_0 S2_0 COM4 COM3 S2_10 S1_10 S2_11 S1_11 S2_12 S1_12 S2_13 S1_13 S2_14 S1_14 S2_15 S1_15 C S D I SC LK VD D V SS XTAL1 XTAL2 VLC D C O M 1 C O M 2 Figure 2: Pin configuration

Rev. 1.0 Page 4 May 1999 Typical Application Figure 3: Typical Application See also application note AN525 for further information.

Rev. 1.0 Page 5 May 1999 Functional Description AS2591 is a CMOS mixed-mode integrated circuit for driving LCDs with 4 backplanes and 24 or 31 segments providing 12 or 16 7-segment digits and 12 symbols. The device is controlled via a simple 2-wire bus and a chip-select signal. The device also includes an elapse-time counter which is started 5 seconds after power-up and incremented every second. The timer is re-started whenever the device gets a WRITE-DIGIT or SHIFT&WRITE command within the first 5 counts (except commands for displaying digits "-", " o ", "o"). The content of the timer is displayed 5 second after receiving the last WRITE-DIGIT, SHIFT&WRITE or BLINKING command. The normal display appears immediately after receiving a WRITE- DIGIT, SHIFT&WRITE, or BLINKING command. Supply Arrangement The device is supplied through VDD . The internal reference voltages (V33, V23, and V13) for the backplane and segment outputs are set at pin VLCD . With VLCD set to 3.27V the segment output voltage is 2.97V (middle). This voltage can be programmed through the serial bus to 2.83V (low) or 3.09V (high) for optimising the contrast of the LCD. The 1/3, 2/3, and 3/3 voltages are generated internally (see Figure 4: Supply arrangement). In applications with varying VDD , it is recommended to insert a voltage regulator at VLCD in order to assure a constant contrast (see also application note AN525 for further information). VDD VSS From AS2525 VLCD VDD V33 Contrast control V23 V13 Contrast control Figure 4: Supply arrangement LCD Digit Code Code [HEX]: 01 02 03 04 05 06 07 08 09 00 Number: 1 2 3 4 5 6 7 8 9 0 Display: | |_| |_| |_| |_| |_| | | |_| Code [HEX]: 0A 0B 0C 0D 0E 0F 10 11 12 13 14 Letters/Signs: a b c d e f # * - ( ) Display: |_| | | |_| |_| Code [HEX]: 15 16 17 18 19 1A 1B 1C 1D 1E 1F Letters/Signs: H I L N O P R T U " Display: |_| | | | | | |_| |_| |_|

Rev. 1.0 Page 6 May 1999 LCD Symbols Each symbol is associated with a fixed digit address. The circuit has 12 symbols implemented associated with the lower 12 addresses. Table 1: Symbol Overview Enabled Address Name Description Always y0 KL Key lock activated Optional y1 SP Loudspeaker on Always y2 MT Mute activated Optional y3 MF DTMF dialling mode selected Optional y4 LD Loop disconnect (pulse) dialling mode selected Optional y5 Vol Volume control keys activated. Remains on 2 seconds after last volume key pressure Always y6 MR Memory redial key has been pressed. Remains on until next key pressure Always y7 BO Bell off. Indicates that ringer has been turn off. Always y8 SH Shift; indicates that shift key has been pressed. Remains on untill next key pressure Optional y9 - Not used Optional y10 RD Indicates that last number redial has been activated Always y11 PG Indicates program mode Symbol data are not effected by a BLINKING or by a WRITE&SHIFT command. Symbols will be displayed independently from selecting the upper bank of the 32 digit buffer to be displayed. The symbol displayed depends on the layout of the LCD display. If the layout of the 12/16 digit LCD displays can be done similar, the symbol mapping does not need to be stored in the EEPROM. Serial Interface The serial interface uses the pins CS (chip select), SCLK (serial clock line), and DI (data input). A frame consists of a 3-bit command and 5-bit data (see Figure 5: Frame of serial interface). Commands are executed self-timed by the internal clock and commence at the falling edge of the CS signal. CS SCLK DI C3 C2 C1 D4 D3 D2 D1 D0 MSB LSB Figure 5: Frame of serial interface

Rev. 1.0 Page 7 May 1999 Table 2: Commands Command [bin] Data [bin]/name

Description

000 address Set pointer to address. If address is > 16/12, the upper bank of the 32-digit buffer will be displayed. In case of a 12-digit display, up to address 23 will be displayed, and if address is > 24 a third bank up to 32 will be displayed (see Table 4: 12-digit display and Table 5: 16-digit display). 001 digit_code Write digit code to active address. 010 digit_code Shift & write digit code to address 0 (right most digit). Address pointer is set to 0.. 011 1xBFS Blinking ON at address: BF blinking frequency S enabled/disabled 00 1.33 Hz 0 blinking 01 2.00 Hz 1 static off 10 0.67 Hz 11 1.00 Hz 0xxxx Blinking OFF at address 100 1xxxx Symbol ON at address 0xxxx Symbol OFF at address 101 00xxx Clear all digits, symbols, blinking, reset address to 0 10xxx Clear all digits, blinking, reset address to 0 01xxx Hide elapse time for 5 seconds. 11xxx Hide elapse time permanently (note: Hide is reset by above command 101 01xxx). 110 xxFTM Reserved for test modes 111 0xZxx Display OFF and Cleared. Z delay time 0 5 seconds 1 no delay 1CCND Display ON (resets the off timer) CC contrast voltage ND number of digits 00 low 00 12 digits 01 middle 01 16 digits 10 high 10 not allowed 11 not allowed 11 not allowed

Rev. 1.0 Page 8 May 1999 Digit Layout a b c d e f g yn Figure 6: Digit Layout COM1 - 4 = common backplane signals S1_n, S2_n = segment signals n = 0 is most right digit, n= 11 is most left digit for 12-digit displays, and n = 15 is most left digit for 16-digit displays. Table 3: Backplanes and segments COM1 COM2 COM3 COM4 S1_n a f e yn S2_n b g c d Segment Allocation Table 4: 12-digit display Symbol Address y11 y10 y9 y8 y7 y6 y5 y4 y3 y2 y1 y0 AS2525 PG RD - SH BO MR Vol LD MF MT SP KL Digits Normal 11 10 9 8 7 6 5 4 3 2 1 0 Upper 1 23 22 21 20 19 18 17 16 15 14 13 12 Upper 2 31 30 29 28 27 26 25 24 Table 5: 16-digit display Symbol Addr. y11 y10 y9 y8 y7 y6 y5 y4 y3 y2 y1 y0 AS2525 PG RD - SH BO MR Vol LD MF MT SP KL Digits Normal 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Digits Upper 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 The symbols in bold are always enabled and other symbols can be enabled through the serial interface. Symbols will be displayed independently from selecting the upper bank of the 32 digit buffer to be displayed. The AS2591 incorporates a buffer for 32 digits. Digits are entered from the most right position and shifted left by new entries (see also Table 2: Commands ).

Rev. 1.0 Page 9 May 1999

Electrical Characteristics

Absolute Maximum Ratings* *Exceeding these figures may cause permanent damage. Functional operation under these conditions is not permitted. Recommended Operating Range Symbol Parameter Conditions Min. Typ. Max. Units VDD Operating Voltage 3.2 4.0 4.8 V VLCD LCD Reference Voltage 2.5 3.0 3.5 V TAMB Ambient Operating Temp. Range -25 +70 °C fOSC Oscillator Frequency 32.768 kHz DC Characteristics Recommended operating conditions unless otherwise specified. Symbol Parameter Conditions Min. Typ.* Max. Units IDD Operating Supply CurrentUnloaded 150 µA IDD0 Idle Current Idle mode, oscillator not running 1 µA V33 Contrast Output Voltage at COM1-4 and S1-2_n Pins VLCD = 3.27V Contrast voltage low Contrast voltage middle Contrast voltage high 2.83 2.97 3.09 V V V VIL Input Low Voltage VSS 0.3 VDD V VIH Input High Voltage 0.7 VDD VDD V * Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing.

Rev. 1.0 Page 10 May 1999 Recommended operating conditions unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Units FLCD LCD Frame Frequency 61 64 67 Hz tOFF-TIMER Off Timer 4.75 5 5.25 sec fBLINK Blinking Frequency BF = 00 BF = 01 BF = 10 BF = 11 1.33 2.00 0.67 1.00 Hz Hz Hz Hz R COM Output Impedance of Backplane Outputs 150 kohm R SEG Output Impedance of Segment Outputs 150 kohm Package Outline

44 Pin TQFP

Devices sold by Austria Mikro Systeme Int. AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. Austria Mikro Systeme Int. AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement Austria Mikro Systeme Int. AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with Austria Mikro Systeme Int. AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by Austria Mikro Systeme Int. AG for each application. Copyright © 1999, Austria Mikro Systeme International AG , Schloss Premstätten, 8141 Unterpremstätten, Austria. Trademarks Registered®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. Austria Mikro Systeme Int. AG reserves the right to change or discontinue this product without notice.