AS1500-TZ

AS1500 AMSCO

Document overview

• Manufacturer or author: Provided By digicamel.com
• PDF pages: 8

Technical content

Revision 1.0, Oct 2004 Page 1 of 8 Key Features - 256-Position - Available in four Resistance values - AS1500 resistance 10kOhms - AS1501 resistance 20kOhms - AS1502 resistance 50kOhms - AS1503 resistance 100kOhms - Power Shutdown —Less than 1 µA - 3-Wire SPI-Compatible Serial Data Input - 10 MHz Update Data Loading Rate - 2.7 V to 5.5 V Single-Supply Operation - Temperature Range –40°C to +125°C - Package SO-8 - Compatible to AD8400 General Description The AS1500 is a digital potentiometer with 256 programmable steps. The values of the resistor can be controlled via 3 wire serial interface capable to handle programming rates up to 10MHz. The AS1500 is available in four different resistor values. The AS1500 incorporates a 10k Ω, the AS1501 a 20k Ω, the AS1502 a 50k Ω and the AS1503 a 100k Ω fixed resistor. The wiper contact taps the fixed resistor at points determined by the 8-bit digital code word. The resistance between the wiper and the endpoint of the resistor is linear. The switching action is performed in a way that no glitches occur. Furthermore the AS150x product family includes a shutdown mode, where it consumes less than 1µA. The AS150x is available in an 8-pin SOIC package. All parts are guaranteed to operate over the extended industrial temperature range of –40°C to +125°C.

Applications

• Line Impedance Matching - Volume Control, Panning - Mechanical Potentiometer Replacement - Power Supply Adjustment - Programmable Filters, Delays, Time Constants Figure 1 Pinout andfunctional Block Diagram of Digital Potentiometer AS150x family PRELIMINARY FACT SHEET Digital Potentiometer AS1500/AS1501/AS1502/AS1503 DATASHEET 8-Bit Latch

10 Bit

A W B VDD GND AS1500 W VDD GND CSN AS150x Top View CK AB SDI

Revision 1.0, Oct 2004 Page 2 of 8 ABSOLUTE MAXIMUM RATINGS (TA = 25°C, unless otherwise noted.) Parameter Limits VDD to GND –0.3V, +7V VA, VB, VW to GND 0V, VDD AX – BX, AX – WX, BX – WX ±20mA Digital Input and Output Voltage to GND 0V, +7V Operating Temperature Range –40°C to +125°C Maximum Junction Temperature (TJ max) 150°C Storage Temperature –65°C to +150°C Package body temperature 1 260°C Package Power Dissipation (TJ max – TA) / θJA ESD 2 1kV Table 1: Absolute Maximum Ratings Pin Name Description

1 B Terminal B RDAC

2 GND Ground

Chip Select Input, Active Low. When CS returns high, data in the serial input register is loaded into the DAC register.

4 SDI Serial Data Input

5 CK Serial Clock Input, Positive Edge Triggered. 6V D D Positive power supply, specified for operation at both 3V and 5V.

7 W Wiper RDAC

8 A Terminal A RDAC

Table 2: Pin Function Description 1 The reflow peak soldering temperature (body temperature) is specified according IPC/JEDEC J-STD-020C “Moisture/Reflow Sensiti vity Classification for non hermetic Solid State Surface Mount Devices”. 2 HBM MIL-Std883E 3015.7methods.

Revision 1.0, Oct 2004 Page 3 of 8 AS1500 / AS1501 – SPECIFICATIONS VDD = 3V±10% or 5V±10%, V A = VDD, V B = 0V, –40°C ≤ TA ≤ +125°C unless otherwise noted. ELECTRICAL CHARACTERISTICS – 10k and 20k VERSIONS Parameter Symbol Conditions Min Typ 3 Max Unit DC CHARACTERISTICS RHEOSTAT MODE TA = 25°C, VDD = 5V, AS1500, Version: 10k Ω 81 0 1 2 kΩNominal Resistance 4 RAB TA = 25°C, VDD = 5V, AS1501, Version: 20k Ω 16 20 24 kΩ Resistance Tempco 5 ∆RAB /∆T VAB = VDD, Wiper = No Connect 500 ppm/°C Wiper Resistance R W VDD = 5V 20 100 200 Ω Resistor Differential NL 6 R-DNL R WB , VDD = 5V, V A = No Connect –1 ±1/4 +1 LSB Resistor Integral NL R-INL R WB , VDD = 5V, V A = No Connect –2 ±1/2 +2 LSB DC CHARACTERISTICS POTENTIOMETER DIVIDER Resolution N 8 Bits VDD = 5.5V T A = 25°C –2 ±1/2 +2 LSBIntegral Nonlinearity INL VDD = 2.7V T A = 25°C –2 ±1/2 +2 LSB VDD = 5.5V T A = 25°C –1 ±1/4 +1 LSBDifferential Nonlinearity DNL VDD = 2.7V T A = 25°C –1 ±1/4 +1 LSB Voltage Divider Tempco ∆VW /∆T Code = 80 H 15 ppm/°C Full-Scale Error V WFSE Code = FF H, VDD = 5.5V –4 –2.8 0 LSB Zero-Scale Error V WZSE Code = 00 H, VDD = 5.5V 0 1.3 2 LSB RESISTOR TERMINALS Voltage Range 7 VA, B, W 0V D D V Capacitance 8 Ax, Bx C A, B f =1MHz, Measured to GND, Code = 80 H 75 pF Capacitance Wx C W f =1MHz, Measured to GND, Code = 80 H 120 pF DIGITAL INPUTS AND OUTPUTS Input Logic High V IH VDD = 5V 2.4 V Input Logic Low V IL VDD = 5V 0.8 V Input Logic High V IH VDD = 3V 2.1 V Input Logic Low V IL VDD = 3V 0.6 V Input Current I IH , I IL VIN = 5V or 0V, VDD = 5V ±1 µA Input Capacitance C IL 5p F POWER SUPPLIES Power Supply Range VDD 2.7 5.5 V Supply Current (CMOS) IDD V IH = VDD or V IL = 0V, VDD = 5.5V 0.1 1 µA Supply Current (TTL) 9 IDD V IH = 2.4V or 0.8V, VDD = 5.5V 0.9 4 mA Power Dissipation (CMOS) 10 PDISS VIH = VDD or V IL = 0V, VDD = 5.5V 27.5 µW AS1500, Version: 10k Ω -54 -25 dBPower Supply Suppression Ratio PSSR VDD = 5V + 0.5V P sine wave @ 1kHz AS1501, Version: 20k Ω -52 -25 dB DYNAMIC CHARACTERISTICS 11 BW_10k RWB = 10k Ω, VDD = 5V 1000 kHzBandwidth –3dB Bandwidth –3dB BW_20k RWB = 20k Ω, VDD = 5V 500 kHz Total Harmonic Distortion THD W VA = 1V RMS + 2V DC , V B = 2V DC , f = 1kHz 0.003 % tS_10k RWB = 5k Ω, V A = VDD, V B = 0V, ±1% Error Band 2µ s VW Settling Time tS_20k RWB = 10k Ω, V A = VDD, V B = 0V, ±1% Error Band 4µ s eNWB _10k RWB = 5k Ω, f =1kHz 9 nV/ √ HzResistor Noise Voltage eNWB _20k RWB = 10k Ω, f =1kHz 13 nV/ √ Hz Table 3: Electrical Characteristics – 10k and 20k Versions 3 Typicals represent average readings at 25°C and VDD = 5V. 4 Wiper is not connected. I AB = 350µA for the 10k Ω version and 175µA for the 20k Ω version. 5 All Tempcos are guaranteed by design and not subject to production test. 6 Terminal A is not connected. I W = 350µA for the 10k Ω version and 175µA for the 20k Ω version. 7 Resistor terminals A, B, W have no limitations on polarity with respect to each other. 8 All capacitances are guaranteed by design and not subject to production test. Resistor-terminal capacitance tests are measured with 2.5V bias on the measured terminal. The remaining resistor terminals are left open circuit. 9 Worst-case supply current consumed when input logic level at 2.4V, standard characteristic of CMOS logic. 10 P DISS is calculated from (IDD×VDD). CMOS logic level inputs result in minimum power dissipation. 11 All dynamic characteristics are guaranteed by design and not subject to production test. All dynamic characteristics use VDD=5 V.

Revision 1.0, Oct 2004 Page 4 of 8 AS1502 / AS1503 – SPECIFICATIONS VDD = 3V±10% or 5V±10%, V A = VDD, V B = 0V, –40°C ≤ TA ≤ +125°C unless otherwise noted. ELECTRICAL CHARACTERISTICS – 50k and 100k VERSIONS Parameter Symbol Conditions Min Typ 12 Max Unit DC CHARACTERISTICS RHEOSTAT MODE TA = 25°C, VDD = 5V, AS1502, Version: 50k Ω 40 50 60 kΩNominal Resistance 13 RAB TA = 25°C, VDD = 5V, AS1503, Version: 100k Ω 80 100 120 kΩ Resistance Tempco 14 ∆RAB /∆T VAB = VDD, Wiper = No Connect 500 ppm/°C Wiper Resistance R W VDD = 5V 20 100 200 Ω Resistor Differential NL 15 R-DNL R WB , VDD = 5V, V A = No Connect –1 ±1/4 +1 LSB Resistor Integral NL R-INL R WB , VDD = 5V, V A = No Connect –2 ±1/2 +2 LSB DC CHARACTERISTICS POTENTIOMETER DIVIDER Resolution N 8 Bits VDD = 5.5V T A = 2 5 ° C – 4± 1+ 4 L S BIntegral Nonlinearity INL VDD = 2.7V T A = 2 5 ° C – 4± 1+ 4 L S B VDD = 5.5V T A = 25°C –1 ±1/4 +1 LSBDifferential Nonlinearity DNL VDD = 2.7V T A = 25°C –1 ±1/4 +1 LSB Voltage Divider Tempco ∆VW /∆T Code = 80 H 15 ppm/°C Full-Scale Error V WFSE Code = FF H, VDD = 5.5V –1 –0.25 0 LSB Zero-Scale Error V WZSE Code = 00 H, VDD = 5.5V 0 0.1 1 LSB RESISTOR TERMINALS Voltage Range 16 VA, B, W 0V D D V Capacitance 17 Ax, Bx C A, B f = 1MHz, Measured to GND, Code = 80 H 15 pF Capacitance Wx C W f = 1MHz, Measured to GND, Code = 80 H 80 pF DIGITAL INPUTS AND OUTPUTS Input Logic High V IH VDD = 5V 2.4 V Input Logic Low V IL VDD = 5V 0.8 V Input Logic High V IH VDD = 3V 2.1 V Input Logic Low V IL VDD = 3V 0.6 V Input Current I IH , I IL VIN = 5V or 0V, VDD = 5V ±1 µA Input Capacitance C IL 5p F POWER SUPPLIES Power Supply Range VDD 2.7 5.5 V Supply Current (CMOS) IDD V IH = VDD or V IL = 0V, VDD = 5.5V 0.1 1 µA Supply Current (TTL) 18 IDD V IH = 2.4V or 0.8V, VDD = 5.5V 0.9 4 mA Power Dissipation (CMOS) 19 PDISS VIH = VDD or V IL = 0V, VDD = 5.5V 27.5 µW AS1502, Version: 50k Ω -43 tbd. dBPower Supply Suppression Ratio PSSR VDD = 5V + 0.5V P sine wave @ 1kHz AS1503, Version: 100k Ω -48 tbd. dB DYNAMIC CHARACTERISTICS 20 BW_50k RWB = 50k Ω, VDD = 5V 220 kHzBandwidth –3dB Bandwidth –3dB BW_100k RWB = 100k Ω, VDD = 5V 110 kHz Total Harmonic Distortion THD W VA = 1V RMS + 2V DC , V B = 2V DC , f = 1kHz 0.003 % tS_50k RWB = 50k Ω, V A = VDD, V B = 0V, ±1% Error Band 9µ s VW Settling Time tS_100k RWB = 100k Ω, V A = VDD, V B = 0V, ±1% Error Band 18 µs eNWB _50k RWB = 50k Ω, f = 1kHz 20 nV/ √ Hz Resistor Noise Voltage eNWB _100 k RWB = 100k Ω, f = 1kHz 29 nV/ √ Hz Table 4: Electrical Characteristics – 50k and 100k Versions 12 Typicals represent average readings at 25°C and VDD = 5V. 13 Wiper is not connected. I AB = 70µA for the 50k Ω version and 35µA for the 100k Ω version. 14 All Tempcos are guaranteed by design and not subject to production test. 15 Terminal A is not connected. I W = 70µA for the 50k Ω version and 35µA for the 100k Ω version. 16 Resistor terminals A, B, W have no limitations on polarity with respect to each other. 17 All capacitances are guaranteed by design and not subject to production test. Resistor-terminal capacitance tests are measured with 2.5V bias on the measured terminal. The remaining resistor terminals are left open circuit. 18 Worst-case supply current consumed when input logic level at 2.4V, standard characteristic of CMOS logic. 19 P DISS is calculated from (IDD×VDD). CMOS logic level inputs result in minimum power dissipation. 20 All dynamic characteristics are guaranteed by design and not subject to production test. All dynamic characteristics use VDD=5 V.

Revision 1.0, Oct 2004 Page 5 of 8 AS150x – SPECIFICATIONS (VDD = 3V±10% or 5V±10%, VA = VDD, VB = 0V, –40°C ≤TA≤+125°C unless otherwise noted.) ELECTRICAL CHARACTERISTICS–ALL VERSIONS Parameter Sym- bol Conditions Min Typ

21 Max Unit

SWITCHING CHARACTERISTICS 22, 23 Input Clock Pulsewidth tCH , t CL Clock Level High or Low 50 ns Data Setup Time t DS 5n s Data Hold Time t DH 5n s CSN Setup Time t CSS 10 ns CSN High Pulsewidth tCSW 10 ns CK Fall to CSN Rise Hold Time tCSH 0n s CSN Rise to Clock Rise Setup tCS1 10 ns Table 5: Switching Characteristics Detailed Description Serial-Programming Programming of the AS150x is done via the 3 wire serial interface. The three input signals are serial data input (SDI), clock(CK) and chip select (CS). A programming sequence consists of 10-bit, where the last eight bit contain the code word for the resistor value. The first two bits A1 and A0 have to be low(see Table ). The data is shifted into the internal 10 Bit register with the rising edge of the CK signal. With the rising edge of the CSN signal the data becomes valid and the resistance is updated (see figure 2). A detailed block diagram is shown in figure 3. A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 0 0 MSB Data LSB Table 6: Serial data format (16 bits) 21 Typicals represent average readings at 25°C and VDD=5V. 22 Guaranteed by design and not subject to production test. Resistor-terminal capacitance tests are measured with 2.5V bias on the measured terminal. The remaining resistor terminals are left open circuit. 23 See timing diagram for location of measured values. All input control voltages are specified with t R = t F = 1ns (10% to 90% of VDD) and timed from a voltage level of 1.6V. Switching characteristics are measured using VDD=3V or 5V. To avoid false clocking, a minimum input logic slew rate of 1V/µs should be maintained. Figure 2: Timing Diagram Figure 3: Detailed Timing Diagram Rheostat Operation The digital potentiometer family AS150x offers nominal resistor values of 10k Ω, 20 k Ω, 50k Ω and 100k Ω. The resistor has 256 contact points where the wiper can access the resistor. The 8-bit code word determines the position of the wiper and is decoded through an internal logic. The lowest code 00h is related to the terminal B. The resistance is then only determined by the wiper resistance (100 Ω). The resistance for the next code 01h is the nominal resistor RAB (10k Ω, 20 k Ω, 50k Ω or 100k Ω) divided through 256 plus the wiper resistor. In case of AS1501 (10k Ω) the total resistance is 39 Ω+100 Ω=139 Ω. Accordingly the resistor for code 02h is 78 Ω+100 Ω=178 Ω. The last code 255h does not connect to terminal A directly (see Figure 5). So the maximum value is 10000 Ω - 39 Ω +100 Ω = 10061 Ω. The general formula for the calculation of the resistance R WB is: RWB (Dx)= (Dx)/256 ⋅RAB + R W where R AB is the nominal resistance between terminal A and B, R W is the wiper resistance and D X is the 8-Bit Code word. In Table 7 the resistor values between the wiper and terminal B for AS1501 are given for specific codes D X. In the zero-scale condition the wiper resistance of 100 Ω remains present. VOUT CS CK SD VD DAC Register A1 A0D 7D 6D 5D 4D 3D 2D 1D 0 SDI VOUT CK CSN VDD ±1% Error ±1% AX or AX or tD tD tC tCS tCS tCS tCS tS tCL

Revision 1.0, Oct 2004 Page 7 of 8

Package Information

The AS150x family is offered in a 8-pin SOIC package:

Revision 1.0, Oct 2004 Page 8 of 8 Package Dimensions in Inch and mm (values for N = 8 Pin package are valid):

Ordering Information

Part Resistor Pin Package Delivery Form AS1500 10k Ω 8-pin SOIC Tubes AS1501 20k Ω 8-pin SOIC Tubes AS1502 50k Ω 8-pin SOIC Tubes AS1503 100k Ω 8-pin SOIC Tubes AS1500-T 10k Ω 8-pin SOIC T&R AS1501-T 20k Ω 8-pin SOIC T&R AS1502-T 50k Ω 8-pin SOIC T&R AS1503-T 100k Ω 8-pin SOIC T&R For Pb-free package use suffix ‘-Z‘ Copyright Copyright © 2004 austriamicrosystems. Trademarks registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. To the best of its knowledge, austriamicrosystems asserts that the information contained in this publication is accurate and correct. Contact austriamicrosystems AG A 8141 Schloss Premstätten, Austria T. +43 (0) 3136 500 0 F. +43 (0) 3136 525 01 info@austriamicrosystems.com