AS1120_1 AMSCO

Document overview

  • Manufacturer or author: Provided By digicamel.com
  • PDF pages: 13

Technical content

1 General Description

The AS1120 is available in a 64-pin LQFP package. Figure 1. Application Diagram

2 Key Features

3 Applications

sumption and single-supply requirements.

4 Pinout and Packaging

Figure 2. Pin Assignments (Top View) and Markings Table 1. Pin Descriptions 6 TEST Test pin. This pin must be tied to pin V DD.

7 DATAOUT Serial Data Output

8 CLKIN Shift Register Clock

9 LOAD Load Strobe from Shift Register to Latch

10 DATAIN Serial Data Input

11 BPLIN Backplane Input

12 BPLOUT Backplane Output

13 RESETN Active-Low Asynchronous Reset

15 OSC

43 V DD Positive Power Supply

48 N/C

64 LCD4117LCD0

63 LCD40

62 LCD39

61 LCD38

60 LCD37

59 LCD36

58 LCD35

57 LCD34

56 LCD33

55 LCD32

54 LCD31

53 LCD30

52 LCD29

51 LCD28

50 LCD27

49 N/C

47 LCD26

46 LCD25

45 LCD24

44 LCD23

43 V DD

42 V SS

41 LCD22

40 LCD21

39 LCD20

38 LCD19

37 LCD18

36 LCD17

35 LCD16

34 LCD15

33 N/C

5 Absolute Maximum Ratings

Table 2. Absolute Maximum Ratings

6 Electrical Characteristics

Table 3. Electrical Characteristics CMOS Input Pin: TEST (VDD = 5V, TAMB = -40 to +85 ºC unless otherwise noted). CMOS Output Pins: BPLOUT, DATAOUT (VDD = 5V, TAMB = -40 to +85 ºC unless otherwise noted). CMOS Output Pin: LCDxx (VDD = 5V, TAMB = -40 to +85 ºC unless otherwise noted). Oscillator Pin: OSC (VDD = 5V, TAMB = -40 to +85 ºC unless otherwise noted).

Figure 3. Signal Waveform Timing Table 4. Timing Characteristics

  1. LOAD must be high while RESETN is active (low).
  2. LOAD can stay low for more than one CLKIN cycle.

7 Detailed Description

9) to increase the number of LCD segments. is possible to mix segments of different display crystal types. pin is shifted in the first bit of the internal shift register and the other bits are shifted ahead of the first bit. shifted into the shift register. Note: The shift register is cleared at when the AS1120 is reset. (BPLIN). The XOR function is necessary to generate the appropriate signals to drive the LCD segments. Note: At reset the latch register is cleared, thus no LCD segment will be active at power-on. high as is shown in Figure 4. Note: During synchronous mode, a clock on BPLIN must be applied to avoid the risk of damaging the LCD crystal. Figure 4. Synchronous Mode Timing Diagram

46 CLKIN Cycles

8 CLKIN Cycles

the use of the AS1120 internal clock. Figure 5. Timing Diagram for Preloading the Shift Register LOAD low for 8+1 BPLIN cycles. The display will be updated at the 8th BPLIN rising edge while LOAD is Low. In case of internal BPLIN generation through the internal oscillator BPLIN = fOSC/16. Figure 6. Timing Diagram for Updating the Display in Asynchronous Mode segments with the common backplane.

9 BPLIN Cycles

nal. If there is no rising edge at pin OSC, BPLOUT will simply buffer the signal at pin BPLIN. DD is supplied; note that pin BPLOUT is stopped during a reset. connected to pin OSC, a clock signal whose frequency is equal to fOSC divided by 16 will be present at pin BPLOUT. Note: Internal mode requires that pin BPLIN be connected to pin BPLOUT. quency and the generated frequency increases as indicated in Table 6. Figure 7. AS1120 Clock Circuit should be presented at pin BPLIN, which will be regenerated and presented at pin BPLOUT. Table 5. Backplane Source Generation Selection Table 6. Oscillator Error Rate

8 Application Information

The AS1120 can support all types of static LCD displays. Figure 8. Cascaded Configuration

14 VSSOSC

42 VSS

The devices are available in an 64-pin LQFP package. Figure 9. 64-pin LQFP Package

www.austriamicrosystems.com Revision 1.05 11 - 13 AS1120 Datasheet - Application Information Notes: 1. All dimensioning and tolerancing conform to ANSI Y14.5M-1982. 2. Top package may be smaller than bottom package by 0.15mm. 3. Datums A-B and -D- to be determined at datum plane -H-. 4. Dimensions D and E are to be determined at seating plane -C-. 5. Dimensions D1 and E1 do not include mold protrusion. Allowable mold protrusion is 0.25mm per side. D1 and E1 are body size dimensions including mold mismatch. 6. Detail of pin1 identifier is optional but must be located within the zone indicated. 7. Dimension b does not include dambar protrusion. Allowable dambar protrusion is 0.08mm in excess of the b dimension at maximum material condition. Dambar cannot be locatedon the lower radius or the foot. 8. Exact shape of each corner is optional. 9. These dimensions apply to the flat section of the lead between 0.10 and 0.25mm from the lead tip. 10. All dimensions are in millimeters. CONTROL DIMENSIONS ARE IN MILLIMETERS SYMBOL MILLIMETER MIN. NOM. MAX. 0.20 1.60 0.150.05 1.35 1.40 1.45 16.00 BSC. 14.00 BSC. 14.00 BSC. 16.00 BSC. 0.08 0.20 0.08 0° 3.5° 7° 11° 12° 13° 11° 12° 13° 0.200.09 0.45 0.60 0.75

1.00 REF

D E c 64L SYMBOL MILLIMETER MIN. NOM. MAX. 0.30 0.35 0.45 0.80 BSC. 12.00 12.00 0.20 0.20 0.20 0.10 b e aaa bbb ccc ddd

9 Ordering Information

The device is available as the standard product shown in Table 7. All devices are RoHS compliant and free of halogene substances. Table 7. Ordering Information

www.austriamicrosystems.com Revision 1.05 13 - 13 AS1120 Datasheet Copyrights Copyright © 1997-2009, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. Disclaimer Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. Contact Information Headquarters austriamicrosystems AG A-8141 Schloss Premstaetten, Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com/contact-us