AS1109_1 AMSCO
Document overview
- Manufacturer or author: Provided By digicamel.com
- PDF pages: 26
Technical content
Datasheet sections
- 1 General Description
- 2 Key Features
- 3 Applications
- 4 Pinout
- 5 Absolute Maximum Ratings
- 6 Electrical Characteristics
- 7 Typical Operating Characteristics
- 8 Detailed Description
- 9 Application Information
- 10 Package Drawings and Markings
- 11 Ordering Information
1 General Description
register stores the currently displayed data. temperature, open-LED, and shorted-LED conditions. LED/shorted-LED diagnostics results. mode to minimize display flicker during fault testing. QFN (4x4mm) and the 16-pin SSOP-150 package. Figure 1. Main Diagram and Pin Assignments
2 Key Features
3 Applications
els, emergency light indicators, and traffic signs.
16 VDD
15 REXT
14 SDO
13 OEN
9 OUTN48OUTN3
12 OUTN7
11 OUTN6
10 OUTN5
4 Pinout
Figure 2. Pin Assignments (Top View) Table 1. Pin Descriptions
31 C L K
mode, the rising edge of the CLK signal is used to switch error modes. input sense for diagnostic modes. output drivers to sink current independent of the AS1109 mode. 0 = Output drivers are enabled. 1 = Output drivers are disabled. 0 = Global error mode returned an error. EXT) to GND, to setup the load current.
5 Absolute Maximum Ratings
Table 2. Absolute Maximum Ratings State Surface Mount Devices”. packages is matte tin (100% Sn).
- Min/max values are load dependent.
6 Electrical Characteristics
VDD = +3.0 to +5.5V, TAMB = -40 to +85°C (unless otherwise specified). Typical values measured at VDD = 5V, TAMB = 25°C. Table 3. Electrical Characteristics
transfer between two cascaded LED drivers. Table 4. Switching Characteristics Table 3. Electrical Characteristics (Continued)
7 Typical Operating Characteristics
Figure 3. Output Current vs. REXT, Figure 4. Relative Output Current Error vs. V DD, Figure 5. Output Current vs. VDS; Figure 6. Output Current vs. V DS; Figure 7. Relative IOUT Error vs. Temperature Figure 8. Output Current vs. V DD
8 Detailed Description
tions for LED display systems, especially LED traffic sign applications. of LEDs. The AS1109 guarantees to endure 15V maximum at the outputs. on-the-run or in low-current diagnostic mode (see page 15). Figure 9. Block Diagram
Figure 12. Data Input Timing Diagram Figure 13. Data Input Example Timing Diagram
8 CLK Pulses
Figure 14. Switching Global Error Mode Timing Diagram modes clock pulses are needed (see Table 5). Note: To test all LEDs, a test pattern that turns on all LEDs must be input to the AS1109. Note: For a valid result SDI must be 1 for the first device. Table 5. Global Error Mode Selections
0 Don't Care Over-Temperature
TFLAG = SDO = 1: No over-temperature warning. TFLAG = SDO = 0: Over-temperature warning. 1 Enabled Open-LED Detection OFLAG = SDO = 1: No open-LED error. OFLAG = SDO = 0: Open-LED error. 2 Enabled Shorted-LED Detection SFLAG = SDO = 1: No shorted-LED error. SFLAG = SDO = 0: Shorted-LED error.
3 Don't Care Low-Current Diagnostic
4 Don't Care Shutdown Mode SDI = 1: Wakeup
can be run to identify which AS1109, or LED produced the error. Note: When no error has occurred, the detailed error report can be skipped, setting LD and subsequently OEN low. LED detection can be started with 1 clock pulse during error detection mode while the output port is turned on. Note: LEDs which are turned off at test time cannot be tested. conditions. This can be achieved by reducing the VLED voltage or by adding additional diodes, resistors or LED’s. Note: LEDs which are turned off at test time cannot be tested. perature status is aquired at the rising edge of OEN and stored internally. Table 6. Open LED Detection Modes Table 7. Shorted LED Detection Modes Table 8. Overtemperature Modes
load on the next rising edge of pin LD. This data will show at the output drivers, at the falling edge of OEN. 8bit data word represents the temperature flag of the chip. Figure 15. Detailed Temperature Warning Report Timing Diagram The 0 in the detailed temperature warning report indicates that IC4 is the device with the over-temperature condition. Note: In an actual report there are no spaces in the output. For detailed timing information see Timing Diagrams on page 9.
The detailed open-LED error report can be read out immediately after global error mode has been run. Figure 16. Detailed Open-LED Error Report Timing Diagram a test pattern where all LEDs are on at test time. (see Low-Current Diagnostic Mode on page 15) to reduce onscreen flickering. Note: In an actual report there are no spaces in the output. LEDs turned off during test time cannot be tested. For detailed timing information see Timing Diagrams on page 9.
Figure 17. Detailed Shorted-LED Error Report Timing Diagram this test should be run after starting low-current diagnostic mode (see Low-Current Diagnostic Mode on page 15). Showing IC1 as the device with two shorted LEDs at position 6 and 7, and IC4 with one shorted LED at position 4. Note: In an actual report there are no spaces in the output. LEDs turned off during test time cannot be tested. initiated prior to running a detailed error report to reduce this on-screen flickering. external components required. LD, a test pattern displaying all 1s can be written to the shift register which will be used for the next error-detection test. ately increase to normal levels and the detailed error report can be read out entering error-detection mode. For detailed timing information see Timing Diagrams on page 9.
9 Application Information
any delay, or by entering into low-current diagnosis mode. cycle (see Figure 20). LEDs that are turned off cannot be tested and their digits at the error output must be ignored. Figure 20. Normal Operation with Error Detection During Operation – 128 Cascaded AS1109s detection mode can be started anytime, and does not require any SDI input (see Figure 21). Figure 21. Low-Current Diagnosis Mode with Internal All 1s Test Pattern – 128 Cascaded AS1109s
www.austriamicrosystems.com Revision 1.18 19 - 26 AS1109 Data Sheet - Application Information Constant Current In LED display applications, the AS1109 provides virtually no current variations from channel-to-channel and from AS1109-to-AS1109. This is mostly due to 2 factors: ! While IOUT ≥ 50mA, the maximum current skew is less than ±2% between channels and less than ±2% between AS1109 devices. ! In the saturation region, the characteristics curve of the output stage is flat (see Figure 5 on page 7). Thus, the out- put current can be kept constant regardless of the variations of LED forward voltages (VF). Adjusting Output Current The AS1109 scales up the reference current (IREF) set by external resistor (REXT) to sink a current (IOUT) at each out- put port. As shown in Figure 3 on page 7 the output current in the saturation region is extremely flat so that it is possi- ble to define it as target current (IOUT TARGET). IOUT TARGET can be calculated by: VREXT = 1.253V (EQ 1) IREF = VREXT/REXT (if the other end of REXT is connected to ground) (EQ 2) IOUT TARGET = IREF*15 = (1.253V/REXT)*15 (EQ 3) Where: REXT is the resistance of the external resistor connected to pin REXT. VREXT is the voltage on pin REXT. The magnitude of current (as a function of REXT) is around 100mA at 186Ω, 50.52mA at 372Ω and 25.26mA at 744Ω. Figure 3 on page 7 shows the relationship curve between the IOUT TARGET of each channel and the corresponding external resistor (REXT). Package Power Dissipation The maximum allowable package power dissipation (PD) is determined as: PD(MAX) = (TJ-TAMB)/RTH(J-A) (EQ 4) When 8 output channels are turned on simultaneously, the actual package power dissipation is: PD(ACT) = (IDD*VDD) + (IOUT*Duty*VDS*8) (EQ 5) Therefore, to keep PD(ACT) ≤ PD(MAX), the allowable maximum output current as a function of duty cycle is: IOUT = {[(TJ-TAMB)/RTH(J-A)]-(IDD*VDD)}/VDS/Duty/8 (EQ 6) Where: TJ = 150ºC Delayed Outputs The AS1109 has graduated delay circuits between outputs. These delay circuits can be found between OUTNn and constant current block. The fixed delay time is 20 ns (typ) where OUTN0 has no delay, OUTN1 has 20ns delay, OUTN2 has 40ns delay ... OUTN7 has 140ns delay. This delay prevents large inrush currents, which reduce power supply bypass capacitor requirements when the outputs turn on (see Figure 12 on page 10) Switching-Noise Reduction LED drivers are frequently used in switch-mode applications which normally exhibit switching noise due to parasitic inductance on the PCB. Load Supply Voltage Considering the package power dissipation limits (see EQ 4:6), the AS1109 should be operated within the range of VDS = 0.4 to 1.0V. For example, if VLED is higher than 5V, VDS may be so high that PD(ACT) > PD(MAX) where VDS = VLED - VF. In this case, the lowest possible supply voltage or a voltage reducer (VDROP) should be used. The voltage reducer allows VDS = (VLED -VF) - VDROP. Note: Resistors or zener diodes can be used as a voltage reducer as shown in Figure 24.
Figure 24. Voltage Reducer using Resistor (Left) and Zener Diode (Right)
The device is available in an 16-pin SOIC-150 package. Figure 25. 16-pin SOIC-150 Package
- Lead coplanarity should be 0 to 0.10mm (.004”) max.
a. Top: matte (charmilles #18- 30). b. All sides: matte (charmilles #18- 30). c. Bottom: smooth or matte (charmilles #18- 30).
- All dimensions excluding mold flashes and end flash from the
package body shall not exceed 0.25mm (.010”) per side (D).
- Detail of pin #1 identifier are optional but must be located
- Dimensions are in millimeters.
Figure 26. 16-pin SSOP-150 Package
- Lead coplanarity should be 0 to 0.10mm (.004”) max.
a. Top: matte (charmilles #18- 30). b. All sides: matte (charmilles #18- 30). c. Bottom: smooth or matte (charmilles #18- 30).
- All dimensions excluding mold flashes and end flash from the
package body shall not exceed 0.25mm (.010”) per side (D).
- Dimensions “b” does not include dambar protrusion/intrusion
- Dimensions are in millimeters.
Figure 27. 16-pin QFN 4x4mm Packages
0.08 C11 NX Seating
www.austriamicrosystems.com Revision 1.18 24 - 26 AS1109 Data Sheet - Pack age Drawings and Markings Notes: 1. Dimensioning and tolerancing conform to ASME Y14.5M-1994. 2. All dimensions are in millimeters; angles in degrees. 3. N is the total number of terminals. 4. The terminal #1 identifier and terminal numbering convention shall conform to JEDEC 95 SPP-012. Details of termi- nal #1 identifier are optional but must be located within the zone indicated. The terminal #1 identifier may be either a mold or marked feature. 5. Dimension b applies to metallized terminal and is measured between 0.15 and 0.30mm from terminal tip. If one end of the terminal has the optional radius, the b dimension should not be measured in that radius area. 6. Dimensions ND and NE refer to the number of terminals on each D and E side, respectively. 7. Depopulation is possible in a symmetrical fashion. 8. Figure 27 is shown for illustration only and does not represent any specific variation. 9. All variations may be constructed per Figure 27, however variations may alternately be constructed between square or rectangle shape per dimensions D and E. 10. Refer to the Dimensions Table for a complete set of dimensions. 11. Bilateral coplanarity zone applies to the exposed heat sink slug as well as the terminals. 12. Depending on the method of lead termination at the edge of the package, pullback (L1) may be present. L minus L1 to be ≥ 0.33mm.
The device is available as the standard products shown in Table 9. All devices are RoHS compliant and free of halogene substances. Table 9. Ordering Information
www.austriamicrosystems.com Revision 1.18 26 - 26 AS1109 Data Sheet Copyrights Copyright © 1997-2009, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, trans- lated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. Disclaimer Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austria- microsystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current informa- tion. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life- sustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the tech- nical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. Contact Information Headquarters austriamicrosystems AG A-8141 Schloss Premstaetten, Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com/contact-us