AS1100_1 AMSCO
Document overview
- Manufacturer or author: Provided By digicamel.com
- PDF pages: 17
Technical content
1 General Description
programmed via a conventional 4 wire serial interface. so that continuous reprogramming is not necessary. required to set the current through the LED display. modes support easy debugging.
2 Key Features
3 Applications
Figure 1. Typical Application Diagram – Single Cell to 3.3V Synchronous Boost Converter
8 Digits
8 SegmentsGNDGND
4 Pin Assignments
Figure 2. Pin Assignments (Top View) Table 1. Pin Descriptions display. In shutdown mode the AS1100 switches the outputs to VDD. GND 4, 9 Both GND pins must be connected. data is latched into the register. segment is turned off the output is connected to GND. and therefore the brightness. clock cycles. The output is never set to high impedance.
24 DOUTDIN
5 Absolute Maximum Ratings
Table 2. Absolute Maximum Ratings State Surface Mount Devices”. packages is matte tin (100% Sn).
6 Electrical Characteristics
VDD = 5V, RSET = 9.53kΩ±1%, TA = TMIN to TMAX, unlesss otherwise noted. Table 3. Electrical Characteristics
7 Typical Operating Characteristics
Figure 3. Segment Driver Capability, Figure 4. Segment Current versa R SET
8 Detailed Description
Programming of the AS1100 is done via 4 wire serial interface. A programming sequence consists of 16-bit packages. Table 4. The first 4 Bits D15-D12 are don’t care, D11-D8 contain the address and D7-D0 contain the data. The first bit is D15, the most significant bit (MSB). The exact timing is given in Figure 5. Figure 5. Timing Diagram Table 4. Serial data format (16bits) shutdown, display test, and reset/external clock register. the display test function overrides the shutdown mode.
After powering up the system all register are reset, so that the display is blank. The AS1100 starts the shutdown mode. internal decoder is disabled, data register and intensity register are set to the minimum value. consists of the numbers 0-9, E,H, L,P and -. In register 09h a logic high enables the decoder for the appropriate digit. display is shown (see Figure 6). steps and is shown in Table 10. An internal pulse width modulator controls the intensity of the display. portions of the display (leading zeros). Table 5. Register address map
Table 6. Shutdown Register Format (address (hex) = 0xXC Table 7. Decode-mode Register Examples (address (hex) = 0xX9 Table 8. Code B font
0 X 0000 1111110
1 X 0001 0110000
2 X 0010 1101101
3 X 0011 1111001
4 X 0100 0110011
5 X 0101 1011011
6 X 0110 1011111
7 X 0111 1110000
8 X 1000 1111111
9 X 1001 1111011
Table 9. No-decode mode data bits and corresponding segment lines
Figure 6. Standard 7-segment LED Table 10. Intensity register format (address (hex) = 0xXA) Table 11. Scan -limit register format (address (hex) = 0xXB)
Note: The AS1100 remains in display-test mode until the display-test register is reconfigured for normal operation. registers (except reg. E) to default state. For standard operation the register contents should be "00h". Table 12. Maximum segment current for 1-, 2-, or 3-digit displays Table 13. Display-test register format (address (hex) = 0xXF) Table 14. Reset and External Clock Register (address (hex) = oxXE)
9 Application Information
current in ISET. The right values for ISET are given in Table 15. The maximum current the AS1100 can drive is 40mA. acceptable limits for ambient temperature, segment current, and the LED forward-voltage drop. Table 15. RSET vs segment current and LED forward voltage
Figure 7. Application example as LED dot matrix driver The AS1100 can be cascaded as well. The DOUT pin must be connected to the DIN pin of the following AS1100. Table 16. Package thermal resistance data
24 Narrow DIP +75ºC/W
24 Wide SO +85ºC/w
www.austriamicrosystems.com Revision 1.33 13 - 17 AS1100 Data Sheet - Application Information Computing Power Dissipation The upper limit for power dissipation (PD) for the AS1100 is determined from the following equation: PD = (VDD x 0.5mA) + (VDD - VLED)(DUTY x ISEG x N) (EQ 1) Where: VDD = supply voltage DUTY = duty cycle set by intensity register N = number of segments driven (worst case is 8) VLED = LED forward voltage ISEG = segment current set by RSET Dissipation Example: ISEG = 40mA, N = 8, DUTY = 31/32, VLED = 1.8V at 40mA, VDD = 5.25V Thus, for a PDIP package θ JA = +75°C/W (from Table 13), the maximum allowed ambient temperature TA is given by: TJ,MAX = TA + PD x θJA = 150°C = TA +1.07W x 75°C/W. Where: TA = +69.7°C. The TA limit for SO Packages in the dissipation example above is +59.0°C.
The device is available in a SOIC-24 package and PDIP-24 package . Figure 8. SOIC-24 package Diagram Table 17. SOIC-24 package Dimensions
Figure 9. PDIP-24 package Diagram Table 18. PDIP-24 package Dimensions
Table 19. Ordering Information
www.austriamicrosystems.com Revision 1.33 17 - 17 AS1100 Data Sheet Copyrights Copyright © 1997-2007, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. Disclaimer Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. Contact Information Headquarters austriamicrosystems AG A-8141 Schloss Premstaetten, Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com/contact