APEC2007 POWERINT

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Energy-Efficient Peak-Current Controlled Power Conversion IC Family Delivers 3 to 28 Watts in Universal-Input Flyback Power Supplies By Kent Wong and John Jovalusky APEC 2007 Anaheim, California

APEC 2007 Session T8: Semiconductor Devices Slide# 2 Scope of Paper and Presentation

Introduction of IC control scheme concept and its benefits
IC operation and power supply interaction
Defining the state machine state-change criteria and limits
Descriptions of IC pin functionality & important internal functions
Power supply performance results
Conclusion

APEC 2007 Session T8: Semiconductor Devices Slide# 3 Introduction: Basic IC Functionality

ON/OFF control enables/disables MOSFET switching cycles
Since MOSFET & controller are integrated, IDRAIN is sensed directly
Enabled cycle switch on-time ends when IDRAIN reaches ILIMIT

APEC 2007 Session T8: Semiconductor Devices Slide# 4 Basic Functionality Continued: State Machine Operation and Supply Stability/Responsiveness

State machine adjusts ILIMIT based on number of consecutive enabled or disabled cycles
Pole-zero placement, slope compensation and gain/phase bode plotting are eliminated
Transient load responsiveness is fast yet stable, and equal to or better than that of a well compensated PWM controlled power supply

APEC 2007 Session T8: Semiconductor Devices Slide# 5 Overview of How IC Interacts with Power Supply

VOUT is compared to a reference (Zener Diode)
When VOUT > ref set-point, Zener and opto-LED conduct, photo- transistor pulls current from EN/UV pin, which disables switching
As switching cycles are skipped, VOUT drops below ref set-point, Zener and opto-LED stop conducting…, which enables switching Controller continually enables/disables MOSFET switching to keep VOUT in regulation

APEC 2007 Session T8: Semiconductor Devices Slide# 6 State Machine Operational Overview & Benefits

Since cycles are skipped while VOUT > the reference set point, ON/OFF control realizes very low no-load power consumption
The state machine automatically adjusts the MOSFET ILIMIT according to the load (ILIMIT is raised as the load increases and lowered as the load decreases)

APEC 2007 Session T8: Semiconductor Devices Slide# 7 Defining State-Machine State-Change Limits

Frequency boundary between CCM and DCM operation The boundary frequency between CCM and DCM operation of a peak current limited, ON/OFF controlled, flyback converter is determined by the steady-state minimum inductor current (IMIN ) as a function of ILIMIT min IN L O s LIMIT s in L s oLIMITS in LIMIT L o S LIMIT Vn V L TIL T V n T V I I L T VIL n where 1:nL is the transformer primary to secondary turns ratio, Ts is the switching period (1/frequency), L is the primary winding inductance value, V IN and VO are the input and output voltages and D is the duty cycle. Solving for the inductance at which IMIN = 0 gives the CCM/ DCM boundary, and yields the critical switching frequency value of ) || (1 IN L O LIMIT crit Vn V L If =(2)

APEC 2007 Session T8: Semiconductor Devices Slide# 8 State-Machine State-Change Limits, continued

Power Delivery in DCM versus CCM Power delivery in DCM is simply When operating in CCM, power delivery is a little more complex When a switching cycle is skipped in CCM and steady state operation ceases, the inductor current perturbation, , must be taken into account. Thus, the inductor current, , at the end of the cycle following the skipped cycle is and the power delivered in a train of m CCM switching cycles in time (m+1)Ts following a perturbation, , would thus be s LIMITDCM O f LIP 2 )]2 s IN L O LIMITIN L OLIMIT O IN L IN O LIMIT L O O OCCM O LfVn VI Vn V I I V V n VVI I n DV I V P −=+ +=+−= = ) 0 (Li ) (min i Ip− i in L o LIN L O s LIMIT i in L o Lp V n Vi Vn V L TIV n minmin −+−=−+ =− ) 0 (Li min i IN L L IN L s m i LIMLIM s p m i LIM s CCM O V n Vi Vn V L TImIT m Li I IT m (3) (4) (5) (6)

APEC 2007 Session T8: Semiconductor Devices Slide# 9 Defining State Machine State-Change Criteria Case Power & fs are minimum. Pertinent to the intermediate and the full ILIMIT states Power delivery and fs are at a maximum. Pertinent to the intermediate ILIMIT states and the lowest ILIMIT state DCM only One switching cycle followed by ) 1 (−n skipped cycles, clks fnf )1(= , uses Equation 3: clk state LIMf LInP 2 min 1)1( −= ) 1 (−n switching cycles followed by one skipped cycle, clks fn nf )1( −= , uses Equation 3: clk state LIMf LIn nP 2 max 1)1( − DCM @ min fs CCM @ max fs One switching cycle followed by ) 1 (−n skipped cycles, clks fnf )1(= , uses Equation 3: clk state LIMf LInP 2 min 1)1( −= ) 1 (−n switching cycles followed by one skipped cycle, in CCM (involves accounting for the perturbation as a result of the skipped cycle), uses Equation 6: max i IN L L IN L s n i LIMLIM clk V n Vi Vn V L TI I nT n CCM only One switching cycle followed by ) 1 (−n skipped cycles, but IL ≠ zero, even during ) 1 (−n skipped cycles. ∴ converter is always in CCM, clks fnf )1(= , uses Equation 4: clk IN L O state LIM IN L O Lf nVn VI Vn VP −= − ) 1 (−n switching cycles followed by one skipped cycle, in CCM (involves accounting for the perturbation as a result of the skipped cycle), uses Equation 6: max i IN L L IN L s n i LIMLIM clk V n Vi Vn V L TI I nT n fclk is the internal IC oscillator (clocking) frequency

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