AN8135 PANASONIC

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Technical content

A/D and D/A Converters Panasonic High Speed Low Power Consumption Bipolar 10-Bit A/D Convertor Overview Unit : mm The AN8135 is a 10-bit A/D Convertor for measure- ment which employs the high frequency bipolar process: to realize the | \\ption. ‘AI: 0.76 Ite can operate with ‘singlo power supply of —5.2V and p35 —s a | eth as maximum conversion rate of 100 MSPS, realizing the A =i na = low error rate. 5 a a | + 10-bit resolution 77 8 |: 1) 8] « Super high speed : maximum conversion rate of |U | eeusussasell 3 | TOOMSPS (min.) = Sarnneallannnoong”” + Low power consumption : 1.8W (typ.) at ey « Low input capacitance : 10pF 4 | Ee . ImuiiOutpat form "ECL level #3) 1.54

1 Application Field

« Measuring equipment such as digital oscilloscope Sr tin LOC Package (QFUNGE-C-0650) « Image processing . i Block Diagram AGND DGND DGNDO QOO-DOOGOBOWAAAMQY OO!) ay ~ 2 eevee @) Vs _ (s) 5 g £ (4) \\ bo~pe PIES & Ve (2) 8 @) MINV Driver ax @) BRAD OO mODOOODOSOOOOOOGOOS, AVee DVez

AN8135 A/D and D/A Converters ll Absolute Maximum Rating (Ta=25°C) Parameter Unit Supply voltage Vv Digital output current | tootole [20m Reference input voage v Power dsipain [me sae Operating ambient emperare t Storage temperature x * Under Ta=70T (With no air and heat emitter) ll Recommended Operating Conditions (Ta=25'C) Parameter [symbol [min yp max it Negative supply voltage [| ve sa =52 50] Vv Reference vohage [ves | Vv | ves | 20 v Analogue input voltage [Vow [ws Vers _— Vv Clock input pulse width * a ns * fax=100MHz @ Electrical Characteristics (Vee=5V, Ta=25C) a Supply current [ we To 400 T= 350 [ma Reference current [| ter | Vars=0v es Veos=~2.0V | = [3] = [ma Input bias current | tw [Vvw==1ov | 20 [350 [na Clock input current [tw [Vax==1osy | | = 0 | aa Digital output voltage [a= rov-2o [T= | v ee ee Linearity error [| Vers—Vas=20v | — | — | 20 | ise Differential linearity error [E> | Vers—Vas=20v | — [| — | 06 | isp Maximum covenion mie ee Od ee Input dynamic range a Oe 9 Equivalent input impedence *! [Rw fve==iv | = p00 | = ko Input capacitance ** [cw vw = of — . feix= 100MHz, fy=50MHz tw | [issn | = | [wed Quantization noise *? | sown fioelomic tesa {sof aT — B [tax 100ME f=S0Meis | a] 4s| — | a Input band *! | BW. | =34B,Ve=20Ve | — [100 | — | Mie Clock duty *# [pry |tax=100mez | 0 | sof wo] % Digital output delay *! Pee as *1 Design reference value but not guaranteed one *)~ ‘Toral harmonice dictortion included i

A/D and D/A Converters AN8135 i Timing Chart N+3 N+2 N+L ' Analogue input (Vw) N t t t ' rocking NS tt \\_S 2 N_ Sts NY (CLK) ' : ' Digital input Cinss OK Na XN XN?) (Do~D9) H \\ ' 1 ae I Output Code [inputsignal Digital output MINV=H sep [INVALB=1 [INVALB=H | INVALB=L | INVALB=H 2.000VFS 1.9531mV STEP M L M L M L M L 9876543210 9876543210 9876543210 9876543210 000 —0.0000000 0000000000, Unt 1000000000, OMI oO —0.0019531 0000000001 1111111110 1000000001 0111111110 SIL —0.9980469 OMLIIIAL 1000000000 | 1111111111 0000000000, 512 —1,0000000, 1000000000 O1I1A111 0000000000 (N1111111 ; 1022 — 1.9980489 TALLLILM0 0000000001 O10 1000000001 1023 —2.0000000 WAAL 0000000000. OUI 1000000000 Note) The digital output is reversed in half clock after shift from MINV to INVALB.

AN8135 A/D and D/A Converters Pin Descriptions Pin No. Description Itis an input pin of analogue for A/D 34,36 Connect the AGND and DGND with the 3g. | AGND | Analogue ground OV —_| possible lowest impedance at one point as near as the chip. It is a power supply pin for analogue cir- , cuit block. Connect tantalum capacitor of 3337 | AVee Anaiogve negative Power —5.2V | several F and ceramic capacitor of 0.1 Ply P HF as near as possible to this pin between this pin and AGND. 3,11 13,14 16,21 23,25 It is a power supply pin for digital circuit 27,29 i . block. Connect tantalum capacitor of 41,43| DVex Digital negative power —52V —_|several »F and ceramic capacitor of 0.1 45,47 Py pin UF as near as possible to this pin between 19,51 this pin and DGND. 54, 56 57,59 It is used to set the reference voltage for , comparator, Normally, Var is given OV and 4 Mad Newrotee ere, ooey Veo is given —2V. Connect tantalum ca- 3) vm lee ith peat fsy [patito of several F and ceramic of 0.1 32 | Vawe | Reference vohage middle point level, —1,0y _ [it Parallel between each pin and analogue 19 | Vnva | Refeence volage mide point vel, —15y | 8fOund. Visas are provided for linearity nO eee ogy [Sompensation, which give middle point x» |v, ier — poy [Potential between Vars and Vans. Hoivever, as pm | they are normally opened. Vers and Vzss are sense pins of Var and Vea respectively. 2,10 12,15 20,22 24, 26 Connect AGND and DGND with the 28, 42 Digital ground OV —_| possible lowest impedance at one point as 44,46 near as possible to the chip. 48,55 58, 60 1,9,61[ DGNDO [Digital ground forouput || ——OV_| Tt isa ground pin for digital ouput 533 | LK | cs input Refer to Itis a clock for sampling. 52 CLK impel timing chart, For their timing, refer to the timing chart.

8 Do Digital output (LSB)

7 D, —_| Digital output

6 | De | Digital output

5 Ds Digital output

6 D Dial oer tning car. ECL _|t is an output pin of TTL Level.

65 Ds —_| Digital output

64 | D, _| Digital output

68 De __| Digital ourput

2 D Digital output_(MSB)

‘Setting the MINV pin to “H” level re- verses the data output D9. Setting the blows | MSB wee ECL —_| INVALB pin “H"” level reverses the data pin outputs (DO-D9). The outputs are re- ee versed synchronously with clock.