AN8133FHQ PANASONIC
Document overview
- Manufacturer or author: Provided By digicamel.com
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Technical content
Wl Overview mae Unit! mam The ANS133FHQ is a high-speed 10-bit A/D converter of CMOS- | [> "== processed construction for image processing use. Two-step parallel | | | AABARAAPAARA | ] , ———C! methods are applied to this product by employing a chopper-type | "== =H comparator. As a result, the product ensures high-speed image | = Be processing with low power consumption. ee E il @ Features = Ee @ Power consumption as low as 90 mW (typ.) SE @ Operating with a single power supply of 3 V. aml'| lee let od i @ 10-bit resolution ~ at i 2 a \\ 3 s @ Max. conversion rate of 40 MSPS (min.) ST | |e qi LL Applications \\ 33 r oe @ Digital still cameras sumonam @ Digital VCR LOFP048-P-0707 © Medical equipment, such as supersonic diagnostic equipment © Other digital image processing devices ll Block Diagram feted sages f82 POPP OP OPOP—OSP Crt ta | ca gasass seen 8 offen? a ore 1 The products ane product specications described in thi document are subject fo change without notice for reasons of moscaton andor improvement. A he final sage of Your design, purchasing or ve of he produce, theatre ask forthe most Upto-date Product Standards in advance to make sue thatthe atest speciicatone salty your requirements Matsushita Electronics Corporation o0aoKse New plication, eect fom Ma. 6 1650,
Pin No. Symbol ie) Function 7,15,18,45 Dy 1 Digital system power supply 6,16,17,23,44 DV gg Fo Digital system ground 21,43 AV ss 1 Analog system ground
30 Ver | I Top-side reference voltage input
31,3233 | VRI,VR2,VR3 I Intermediate reference voltage (capacity coupling with AVSS pin)
34 Veo 1 Bottom-side reference voltage input
39 Vin | I Analog signal input
22 CLK ‘Sampling at the clock falling edge and digital-code output at the
rising edge with a 2.5-clock interval. Digital code output (binary output) Iss Do~Ds | lo DO: LSB 8~12 DS~D9 D9: MSB H: Power down mode
24 POWD I L: Normal operation mode
The level of digital output is fixed to L in power-down mode. Operating ambient temperature ‘TopR -20~+70 c 1 Supply voltage pp -0.3~4.6 v Power dissipation PD 249 2 Note 1) Ta=25°C except storage temperature and operating ambient temperature. Note 2) The above power dissipation shows the package power dissipation at Topr is 70°C.
Recommended Operating Conditions (Ta=25 +2) Reference voltage —|. — ™@ Electrical Characteristics (Ta=25'C +2°C, AVDD=DVpD=3.0V) Analog input current H att a ee KA Max. conversion ate | FCMAX [2 | - | - [mses Differential linearity error “| op |= | ses] eto | LSB Note 1) This noise includes total harmonic distortion.
Analog input signal is sampled at the falling edge of the clock signal and digital outputs data a the rising edge of the clock signal after an interval of 2.5 clock counts {WH tw 9 ' ' ' Analog input IN 7 © o > al ° Clock -- ted --- se atyahahcchest = ' ' ' : td : : O:Analog signal sampling point ™@ Output Codes Tnput Signal Digital Output Step Analog Voltage 9876543210 2.000VFS 000 1,000 0000000000 001 1.002 | 0000000001 su 1.999 omit 512 2.001 1000000000 513 2,003 1000000001 1023 3.000 at