AN7338K PANASONIC

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— Sse Preset IC For Portable Cassette Recorder i. Unit : mm @ Description The AN7338K is a monolithic IC developed for portable Taf J> 2 33 cassette recorder. It is placed in the stage between pre- 3 ir ae amplifier and power amplifier and is operating as a preset a nt tT graphic equaliser with 5 preset modes : Rock, Pops, Flat, ad 3 > - Classic and Jazz. The boosting frequencies are 100Hz and 2] gy EE i 7kHz. There is a built-in LED indicator for every mode co > and FLAT will be the initial mode when power up. 3 E t ug |e \\ I 4 355 465 @ Features ww @ Few external components. “ @ Selection modes : Rock, Pops, Flat, Classic and Jazz. f © Built-in switches can be controlled by microprocessor. re @ Internal LED driver indicator for every mode. 22-Lead DIL Plastic Package (22-SDIP) @ Block Diagram pe et sae [a ? TREBLE o- fess TT Ups fo) 6 re) [es > | | awatoo swe | SWITCH

@ Absolute Maximum Ratings (Ta=25°C) Tem [Symbol [__——Ratng iY Supply Voltage [ove fT Supply Current [ke | Tm Stonge Temperature < Operating Supply Voltage Range: Vcc = 3.6V ~ 12.0V @ Electrical Characteristics (VcC=6V, f=1kHz, Flat mode*!:Switch E is ON, Ta=25°C) Tem [Symbol] Condon min | wp | max | Ua Channel Balance | ce | Vinso1vvir=orv [a | o | | Ripple Rejection | ee | veoivte=soore | 35 | ao || aw Channel Separation [cs | vinso.av.Measurevou. | 35 | 40 | |B Gain (100 Hz) | on [vnsowv [20 | 05 | 20 | we Wimax [vim [TaD isRc=ioo ———~| os | 10 | 14 | vine Chanel (Gasie) | | Swichawon SSS Gain (1001) [os [wow 2 | + fo | Gain (72) [ow [vozovSSSCSC=~i Tw | Channel (Rock) | [smnssow S| ST SC Gain 100 Hz) [os [wero Sid ws Pe Po] Gain 7) [ow [vero Sid | 8 || Chanel (Jaz) [| swncson | SS Gain (7) [ow [vaso Sd | | ae Channel (Pops) |__| swiendison Gain (1008) [ow [vnsowy Cid PP | Gain (Tia) [ono [vow ST oP # | | ae *1 Switch B, as shown in Test Circuit, is ON. *2 DINAUDIO filter used.

@ Electrical Characteristics (Continue) (Vcc=6V, f=1kHz, Flat mode*!:Switch E is ON, Ta=25°C) Channel ( Classic) [| swicnaisow TTT Chanel (Je) [| swicnceon SST hana Pops) [| swienwon SSS THD (1 kHz) *2 [maps [vinzoiv Tors fo | *1 Switch E, as shown in Test Circuit, is ON. *2 DINAUDIO filter used. Test Circuit ‘Vout L eee i it o% 6 Zi 220 1001 t vat * loc ° ‘Vr=100mV 2 » AN7338K OOOO O_O 2) bt sws oe | sk | ok | ok |g oR

0 O Ou

2.0k == 0.068 =a mm jam fom fm weak Table 1 [ Mode | Switch | Pin No_| [Cisse [AT 7 | [Rock |B | 8 | [jaz [ ¢ | 9 | | Pops | D | 10 | * Individual mode can be activated by pressing [Ra | E | | _ the respective switch as shown in Table 1.

———— @ Application Circuit ‘or ‘Sand fom! 0.068): Je IO. 222m 71004 | ota] OOH + = © Vee [ol oo tert oe a | >| [veer || Mure] [Re | [ovo] oe] Pe Con D) — bb 6 6-66 6645664 0.068 ee | ool es a [lp [le [lp Tle boos 3 woke Locke Looky Looks Lot b é VinR ‘Vout R @ Pin PinNo_[PinNane | Piao [Pa Nane a Se 2 | RcaNegativeFeedbackt || Vee 3 | RcnBass tipple Rejection 4 | Recntee ts | Mer 5 16 Reference Witage

6 L-Ch ouput

7 | cussic Tse CaNegative Feecback 2 s | Rok Tt hc trette gf we th chase to | Pops tL ca Negative Feedback 1 a

@ Pin Descriptions 1,22 | Bass Input 3.40 These are the inputs to the IC. for CH 1 & These inputs can be from PRE or CH2 Vref Vee VOL. block, through a 0.47pF cap. & Oo VP impedance ~ 5.8kQ 0.47 a 1% T 4,19 | Treble Input Vin O-#4 a} © | The output signal of previous stage for CH 1 & + will go through a filtering network CH2 @) before input to this pin. Impedance ~ decided by the filter network. Vref Vee NB : Peak frequency can be changed ° 5 by varying capacitor value. a Q giz o Gv(aB) s - i 7kHz freq 5.18 |Negative 3.40 Gv can be changed by varying Rin ‘eedback pin exte ly. for Treble Vref lage Rin > Output @ a, | 2,21 | Negative 3.40 Cf and Rin forms a low pass filter 3,20 | Feedback pin and its cutoff frequency can be °° | & Pass filter changed by varying Cf. pin a Rf —_ Gv(4B) mC) (2) Output Og r re) . Le] (3) fi (20) feut ies 7 d . Gv can be changed by varying Input Rin externally.

® Pin Descriptions (Continue) . 5 DC Bias . — Pa Pin No. Equivalent Circuit Description 6,17 Output pin Pushpull output pin for connecting forCH 1 & v to the next stage through a coupling CH2 Vref ba capacitor. Y ° Zout = 75Q [] o InputO—+-9 (6) +y ok Ge 7 Analog 2.45 Switch pin for Rock, Pops, Jazz, 8 — | Switch or OVee Classic & Flat with initial mode 9 0 set at flat mode.

10 Each pin has a LED indicator

ul internally. @) Selected mode has a bias of 2.45V & other pins have a bias of OV. } ) oto @ BS ro) ® ©) ° e fe ° me ff

14 Ripple To connect with a capacitor to

Rejection minimize ripple generated from Voc Vec source. fe) : 22 ZZ [|] 13x fo) fe)

@ Pin Descriptions (Continue) 15 1.60 To connect with a capacitor to Vee mute pop noise. ‘The time constant of the mute pulse may be changed by varying Csd. Csd | 10. 28k

16 Reference Provide a fixed DC bias, which is

Voltage slightly above 1/2 Vcc to allow for Bias Bias. bigger dynamic range. fo) 9 Cref 3 4Ip ? ;

@ Supplementary Explanation @ Application Notes * Preset Graphic Equaliser This IC provides 5 preset modes by means of 5 push button switches, with built-in LED indicator. The boosting frequencies are 100Hz and 7kHz. A) Rock By pressing this switch, both 100Hz and 7kHz signal are boosted by 8dB. B) Pops This preset mode will boost 100Hz signal by 4dB and 7kHz signal by 8dB. C) Flat This is the initial preset mode, ie. when Vcc is tum ON, this mode will be ON automatically. There is a built-in buffer for this mode to pass the signal directly to output without processing. D) Classic This mode will boost both 100Hz and 7kHz signal by 4dB. E) Jaz This preset mode will boost 100Hz signal by 8dB and 7kHz signal by 4dB. Frequency Response curve TkH Response “ +808 S\\SA\\ 0 - 8 i - +8aB ‘ it~ / \\ 0 ¢ 0 * + CLASSIC +4dB 4 ; er fe: : H JAZZ +8dB 4 [ ZN i WZ Vs ‘oats Tie

@ Supplementary Explanation (Continue) @ Application Circuit + Interfacing with Micro-computer @-2)-WAID19AIHOA1-B-D) |P4 | P3|P2 | Pi [Po | MODE D AN7338K jefelele [afar | [ejelelnle| pors | Classic Rock Jazz Pops Flat 0-00-00 OOO GM) {| [ufale|ele| rock | Lae fee [et | ctassic_| Output ports[p4_P3_P2 Pl PO MICOM @B-A-WD-B-HYWH-BO-D) ia aaa Ter [ps3 |52| MODE , srnnex 2 [os] a] 50 [e[efeletefele [afar cmictatime rw mw | [ee pal [iT rows COOPDOOTOOOHM [alee fhe bade tidie [eff [ni [roe — ox B7 B6 BS B4 B3 B2 BI BO [a[e fe [| 3 to 8 decoder Input ports A2_Al_AO oumosl |_| P2 Pl PO MICOM

@ Supplementary Explanation (Continue) @ Application Notes 1. This IC has two peak frequencies (100Hz & 7kHz) which can be adjusted by varying extemal Below isatable of Gain, frequency shift vs external component value. ee See = (100Hz) (7kHz) Gain Gain |__| ene [esas | teeate [Decree | incre [Dee | crete [Decree per f=[=|e tt tet Tt fe | [ee f= fe pepe Pe pte ft | pome fi [mf Pe Pe Pt Pe Pe | [we [=~ [= pe tt [HP ta ft | por f= [fe tt [=p te ft | po fom poe Pe Pe | te Pa Pe Te | po [= |= Pe ft) > t= tt [a Pets t+ t-~=~=|- [=|] + Increase component value and 4 Decrease component value Vout L Pam 7, Vin L (\\) CL2Z RL3 cLi a2 bw epg AN7338K 2. If the previous stage has high output impedance (Zout), this may cause the output drop at high frequency. In this situation, the following circuit is recommended to improve the high frequency performance. am, vin (AY) ze 2.7K 2200p 0.068n O® © © ©