AN5819K

AN5819K PANASONIC

Document overview

• Manufacturer or author: Provided By digicamel.com
• PDF pages: 11

Technical content

Sound multiplex demodulator IC for TV in the North American market n Overview The AN5819K is a single chip IC, which includes a sound multiplex demodulator for Zenith TV system and the dbx TV sound noise reduction function. n Features

• Stereo demodulation, SAP demodulation and dbx noise reduction are integrated into a single chip
• Enabling various kinds of adjustment and mode changeover thanks to I2C bus
• Built-in input volume (I2C control) for interface with intermediate frequency processing IC n Applications
• TV and VCR for the North American market (A licensing agreement with THAT Corporation is nec- essary in order to use this IC with built-in dbx-TV noise reduction function.) n Block Diagram SDIP028-P-0400B Unit: mm 26.7±0.3 8.4±0.3 0.3 +0.1 –0.05 4.8±0.25 1.05±0.25 3.05±0.25 1.778 0.5±0.1 0.9±0.25 V CC 9 V GND L-out R-out Stereo SAP SDA SCL I2CGND 12MPX in Pilot det. Matrix St.PLL LED driver I2C decoder Wide band filter Spectral filter L-R demod. Input VCA L+R demod. Stereo filter SAP filter Noise filter L-R filter L+R filter 75 ms de-emph. SAP demod. SAP noise det. dbx wide band dbx de-emph. 2 dbx spectral dbx de-emph. 1 SAP out filter (L-R)/SAP switch V-reg. I-reg.

Pin No. Description 1I 2C GND

2 SDA

3 SCL

4 SAP LED

5 Stereo LED

6 Pilot signal detection

7 Stereo PLL filter

9 SAP trap filter

10 Quasi sine-wave filter

11 Stereo filter offset cancel

12 Composite input

14 Reference voltage source filter

Parameter Symbol Rating Unit Supply voltage V CC 11.0 V Supply current I CC 75 mA LED drive current *3 ILED 10 mA Power dissipation *2 PD 1 143 mW Operating ambient temperature *1 T opr -20 to +75 °C Storage temperature *1 Tstg -55 to +150 °C n Absolute Maximum Ratings Note) *1: Except for the operating ambient temperature and storage temperature, all ratings are for Ta = 25°C. *2: Power dissipation shown is for the IC package in free air at Ta = 70°C *3: LED drive currents are the currents flowing into pin 4 and pin 5. n Recommended Operating Range Pin No. Description 15 (L -R)/SAP demodulation output 16 dbx input 17 (L +R) demodulation output offset cancel

18 Spectral level adjustment

19 Spectral timing

20 Spectral level sensor input

21 GND

22 Wide band level sensor input

23 Wide band timing

25 R output

26 L output

27 SAP carrier detection

28 SAP noise level detection

Parameter Symbol Range Unit Supply voltage V CC 8.5 to 9.5 V

Parameter Symbol Conditions Min Typ Max Unit Total circuit current I CC No signal 35 55 75 mA Mono output level V 0(MON) f = 1 kHz, (mono) 100%mod. 480 530 580 mV[rms] Mono frequency characteristics-1V 1(MON) f = 300 Hz, (mono) 30%mod. - 0.5 0 +0.5 dB Mono frequency characteristics-2V 2(MON) f = 8 kHz, (mono) 30%mod. -1.5 - 0.4 +0.4 dB Mono distortion ratio THD (MON) f = 1 kHz, (mono) 100%mod. ¾¾ 0.7 % Mono noise level V N(MON) Input short-circuit, BPF (A curve)¾¾ - 60 dBV (L), (R) output voltage differenceV LR(MON) f = 1 kHz, (mono) 100%mod. - 0.5 0 +0.5 dB Stereo output level V 0(ST) f = 1 kHz, (L(R)-only) 100%mod. 420 520 620 mV[rms] Stereo frequency characteristics-1V 1(ST) f = 300 Hz, (L(R)-only) 30%mod. - 0.7 0 +0.7 dB Stereo frequency characteristics-2V 2(ST) f = 3 kHz, (L(R)-only) 30%mod. -10 +1d B Stereo frequency characteristics-3V 3(ST) f = 8 kHz, (L(R)-only) 30%mod. -2.5 - 0.5 +1.5 dB Stereo distortion ratio THD (ST) f = 1 kHz, (L(R)-only) 100%mod. ¾¾ 1% Stereo noise level V N(ST) f = 15.73 kHz, (fH ), V= 0.084 V[p-p], BPF ¾¾ - 60 dBV Stereo discrimination level VTH(ST) f = 15.73 kHz (fH ) 9 17 26 mV[rms] Stereo discrimination hysteresis VHY(ST) f = 15.73 kHz (fH ) -6 ¾- 0.5 dB SAP output level V 0(SAP) f = 1 kHz, (SAP) 100%mod. 350 500 700 mV[rms] SAP frequency characteristics-1 V1(SAP) f = 300 Hz, (SAP) 30%mod. -1.0 0 +1.0 dB SAP frequency characteristics-2 V2(SAP) f = 3 kHz, (SAP) 30%mod. -3 -1.5 +0.5 dB SAP distortion ratio THD (SAP) f = 1 kHz, (SAP) 100% ¾¾ 1.5 % SAP noise level V N(SAP) f = 78.7 kHz, (5fH ),V= 0.42 V[p-p], BPF¾¾ - 65 dBV SAP discrimination level V TH(SAP) f = 78.7 kHz, (5fH )2 2 ¾ 53 mV[rms] SAP discrimination hysteresis VHY(SAP) f = 78.7 kHz, (5fH ) -4 ¾- 0.5 dB SAP fi Stereo crosstalk CT 1 (SAP) 1 kHz, 100%mod. ¾¾ - 50 dB (Stereo) pilot-signal Stereo fi SAP crosstalk CT 2 (Stereo) 1 kHz, 100%mod. ¾¾ - 50 dB (SAP) carrier-signal Noise discrimination level V TH(NOI) Pin 27: f = 240 kHz at 5 V applied 38 ¾ 84 mV[rms] Noise discrimination hysteresis VHY(NOI) Pin 27: f = 240 kHz at 5 V applied -5.5 ¾- 0.3 dB n Electrical Characteristics at VCC = 9.0 V, Ta = 25°C

• Stereo PLL VCO adjustment: 15.734 kHz – 50 Hz
• Input level (at 100% modulation) L+R: 0.424 V[p-p] (pre-emphasis off) L-R: 0.848 V[p-p] (dbx noise reduction off) Pilot: 0.084 V[p-p] SAP: 0.254 V[p-p] (dbx noise reduction off)

Parameter Symbol Conditions Min Typ Max Unit I2C interface Sink current at ACK I ACK Maximum pin-2 sink current at ACK 2.0 10 20 mA SCL, SDA signal input high levelV IHI ¾ 3.5 ¾ 5.0 V SCL, SDA signal input low levelV ILO ¾ 0 ¾ 0.9 V Input available maximum frequencyfIMAX ¾ ¾ ¾ 100 kbit/s Parameter Symbol Conditions Min Typ Max Unit Stereo separation (30%)-1 Sep 30-1 f = 300 Hz, (L(R)-only) 30% mod. 22 30 ¾ dB Stereo separation (30%)-2 Sep 30-2 f = 1 kHz, (L(R)-only) 30% mod. 22 30 ¾ dB Stereo separation (30%)-3 Sep 30-3 f = 3 kHz, (L(R)-only) 30% mod. 22 30 ¾ dB Stereo separation (30%)-4 Sep 30-4 f = 8 kHz, (L(R)-only) 30% mod. 12 18 ¾ dB Stereo separation (100%)-1 Sep100-1 f = 300 Hz, (L(R)-only) 100% mod. 20 30 ¾ dB Stereo separation (100%)-2 Sep100-2 f = 1 kHz, (L(R)-only) 100% mod. 20 25 ¾ dB Stereo separation (100%)-3 Sep100-3 f = 3 kHz, (L(R)-only) 100% mod. 20 30 ¾ dB Stereo separation (100%)-4 Sep100-4 f = 8 kHz, (L(R)-only) 100% mod. 8 11 ¾ dB Stereo separation (10%)-1 Sep 10-1 f = 300 Hz, (L(R)-only) 10% mod. 20 30 ¾ dB Stereo separation (10%)-2 Sep 10-2 f = 1 kHz, (L(R)-only) 10% mod. 20 30 ¾ dB Stereo separation (10%)-3 Sep 10-3 f = 3 kHz, (L(R)-only) 10% mod. 20 30 ¾ dB Stereo separation (10%)-4 Sep 10-4 f = 8 kHz, (L(R)-only) 10% mod. 12 18 ¾ dB SAP fi Mono crosstalk CT 3 (SAP) 1 kHz, 100%mod. ¾¾ - 53 dB (Mono)1 kHz, 0%mod. Mono fi SAP crosstalk CT 4 (SAP) 1 kHz, 0%mod. ¾¾ - 56 dB (Mono) 1 kHz, 100%mod. I2C interface Bus free before start t BUF ¾ 4.0 ¾¾ m s Start condition set-up time tSU.STA ¾ 4.0 ¾¾ m s Start condition hold time t HD.STA ¾ 4.0 ¾¾ m s Low period SCL, SDA t LO ¾ 4.0 ¾¾ m s High period SCL t HI ¾ 4.0 ¾¾ m s Rise time SCL, SDA t r ¾ ¾ ¾ 1.0 ms Fall time SCL, SDA t f ¾ ¾ ¾ 0.35 ms Data set-up time (write) t SU.DAT ¾ 0.25 ¾¾ m s Data hold time (write) t HD.DAT ¾ 0 ¾¾ m s n Electrical Characteristics at VCC = 9.0 V, Ta = 25°C (continued)

• Design reference data Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.

Pin No. Equivalent circuit Description Vo ltage (V) 1 ¾ I2C GND: 0

• I2C bus DAC GND pin

2 SDA: ¾

• I2C bus data input pin

3 SCL: ¾

• I2C bus clock input pin n Terminal Equivalent Circuits Parameter Symbol Conditions Min Typ Max Unit I2C interface (continued) Acknowledge set-up time t SU.ACK ¾ ¾ ¾ 3.5 ms Acknowledge hold time t HD.ACK ¾ 0 ¾¾ m s Stop condition set-up time tSU.STO ¾ 4.0 ¾¾ m s DAC 6-bit DAC DNLE L 6 1LSB = (data (max.)-data (00))/63 0.1 1.0 1.9 LSB Step n Electrical Characteristics at VCC = 9.0 V, Ta = 25°C (continued)
• Design reference data Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
• DAC timing chart SDA Start condition tBUF tSU.DAT tSU.STA tHD.STA tr tf tHI tLO tHD.DAT tSU.STO tLO Slave address Sub address Data byte Stop conditionACK ACK ACK SCL V DD 5 V GND 500 W 100 kW 1 kW2 2.5 V V DD 5 V GND 500 W 100 kW 1 kW3 2.5 V

n Terminal Equivalent Circuits (continued) Pin No. Equivalent circuit Description Vo ltage (V)

4 SAP LED: ¾

• SAP LED connection pin

5 Stereo LED: ¾

• Stereo LED connection pin

6 Pilot signal detection: V CC

• Stereo pilot signal detection pin 2 7 Stereo PLL filter: 2.8
• Stereo PLL low-pass filter connec- tion pin 8 ¾ V CC :V CC
• V CC pin

9 SAP trap filter: V CC

• SAP trap filter 2 V CC GND 4 3 kW 35 kW V CC GND 5 3 kW 35 kW 18 kW V CC V CC

2 GND

n Terminal Equivalent Circuits (continued) Pin No. Equivalent circuit Description Vo ltage (V)

10 Quasi sine-wave filter: V CC

• Low-pass filter pin in quasi-sine 2 wave circuit

11 Stereo filter offset cancel: V CC

• Offset cancel pin for stereo filter 2 output

12 Composite input: V CC

• Composite signal input pin 2 13 dbx timing current: 1.3
• Timing current setting pin for dbx RMS detection

14 Reference: V CC

• Reference power supply stabilization 2 pin 13.5 kW V CC GND V CC 10 kW V CC GND V CC 50 kW V CC GND V CC 25 kW 220 W V CC GND 3.9 V 45 kW 220 W V CC GND 45 kW

n Terminal Equivalent Circuits (continued) Pin No. Equivalent circuit Description Vo ltage (V) 15 (L-R)/SAP demodulation output: V CC

• (L-R)/SAP demodulation signal 2 - 0.7 output pin 16 dbx input: V CC
• Input signal of (L-R)/SAP 2 signal to dbx NR 17 (L+R) demodulation output offset cancel:V CC
• ( L+R) demodulation signal offset 2 cancel pin

18 Spectral level adjustment: V CC

• Variable emphasis level adjustment 2 pin 19 Spectral timing: 0.2
• RMS detection recovery time setting pin for variable emphasis V CC GND V CC 50 kW V CC GND V CC 10 kW V CC GND V CC 18 kW 360 W V CC GND V CC V CC GND 15 mA 7.5 mA

n Terminal Equivalent Circuits (continued) Pin No. Equivalent circuit Description Vo ltage (V)

20 Spectral level sensor input: V CC

• RMS detection circuit input pin for 2 variable emphasis 21 ¾ GND: 0
• GND pin

22 Wideband level sensor input : V CC

• RMS detection circuit input pin for 2 wide band expander 23 Wideband timing: 0.2
• RMS detection recovery time setting pin for wide band expander 24 dbx offset cancel: V CC
• dbx NR output offset cancel pin 2

25 R output: V CC

• R line-out output pin 2 V CC GND 3.1 kW V CC V CC GND 22 4 kW V CC V CC GND 15 mA 7.5 mA 10 kW V CC GND V CC V CC GND 50 W

n Terminal Equivalent Circuits (continued) Pin No. Equivalent circuit Description Vo ltage (V)

26 L output: V CC

• L line-out output pin 2

27 SAP carrier detection : V CC

• SAP signal carrier level detection 2 pin

28 SAP noise level setting: V CC

• Noise detection pin for SAP mal- 2 function prevention circuit (Mute SAP demodulation at detecting noise) V CC GND 50 W 20 kW V CC GND V CC 11 mA 8.9 kW Pin 27 SWba V CC GND V 28>V 27 V 28<V 27 SW a b V CC

n Application Circuit Example 6.8 kW 0.0033 mF 4.7 mF 0.68 mF 0.33 mF 470 mH 0.0047 mF 2.2 mF 10 mF 4.7 mF 91 kW (allowance: –1%) 0.01 mF 1 mH 4.7 mF 4.7 mF 4.7 mF 1 mF 4.7 mF 4.7 mF 0.1 mF 3.3 mF 0.022 mF 4.7 mF 4.7 mF 10 mF V CC 9 V GND L-out R-out I2C GND MPX in Stereo SAP SDA SCL Pilot det. Matrix St. PLL LED driver I2C decoder Wide band filter Spectral filter L-R demod. Input VCA L+R demod. Stereo filter SAP filter Noise filter L-R filter L+R filter 75 ms de-emph. SAP demod. SAP noise det. dbx wide band dbx de-emph. 2 dbx spectral dbx de-emph. 1 SAP out filter (L-R)/SAP switch V-reg. I-reg.