AAS33051LLEATR

AAS33051 ALLEGRO

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Technical content

The AAS33051 is a 360° angle sensor IC that provides contactless high-resolution angular position information based on magnetic circular vertical Hall (CVH) technology. It has a system-on-chip (SoC) architecture that includes: a CVH front end, digital signal processing to calculate the angular position information, and multiple output formats: serial protocol (SPI), pulse-width modulation (PWM), and either motor commutation (UVW) or encoder outputs (A, B, I). It also includes on-chip EEPROM technology, capable of supporting up to 100 read/write cycles, for flexible programming of calibration parameters. The AAS33051 is ideal for automotive applications requiring 0° to 360° angle measurements, such as electronic power steering (EPS), electronic power braking (EPB or IDB), transmission actuators, and BLDC pumps. The AAS33051 includes on-chip 32 segment linearization. This can be used to calibrate out errors due to misalignment between the magnet and the sensor or imperfect magnetization of the target magnet (which can present itself as a misalignment of the magnet to the sensor). The AAS33051 supports customer integration into safety- critical applications. The AAS33051 is available in a dual-die 24-pin eTSSOP and a single-die 14-pin TSSOP package. The packages are lead (Pb) free with 100% matte-tin leadframe plating. The 1 mm thin package reduces the minimum air gap between the CVH transducer and the target magnet. The AAS33051 device is pin-compatible with the A1339 to enable easy migration. AAS33051-DS, Rev. 2 MCO-0000409

• Contactless 0° to 360° angle sensor IC, for angular position, rotational speed, and direction measurement □ Capable of sensing magnet rotational speeds targeting 12.5-bit effective resolution with 300 G field; higher effective resolution possible at higher field strengths □ Circular Vertical Hall (CVH) technology provides a single channel sensor system, with air gap independence
• On-chip 32 segment linearization to improve angle accuracy □ Reduces impact of magnet to sensor misalignment □ Reduces impact of imperfect magnetization of target magnet
• Developed as a Safety Element out of Context (SEooC) in accordance with ISO 26262:2011 requirements for hardware product development for use in safety-critical applications (pending assessment) □ Single die version designed to meet ASIL B requirements when integrated and used in conjunction with the appropriate system-level control, in the manner prescribed in the AAS33051 Safety Manual □ Dual die version designed to meet ASIL D requirements when integrated and used in conjunction with the appropriate system-level control, in the manner prescribed in the AAS33051 Safety Manual Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip Linearization PACKAGES Figure 1: AAS33051 Magnetic Circuit and IC Diagram AAS33051 Continued on next page... FEATURES AND BENEFITS DESCRIPTION August 29, 2018 Not to scale 24-pin eTSSOP (Suffix LP) 14-pin TSSOP (Suffix LE) CVH xxx_2 Die 2 (top die, LP-24 only) Temp SensorADC SCLK_1 MOSI_1 MISO_1 CS_1 SPI Interface with CRC Field Strength ZCD Angle Detect PLL Angle Detect Averaging Filter PWM ADC Band Pass ABI/UVW Comparison Linearization, Offset, and Direction Invert A_1/U_1 B_1/V_1 I_1/W_1 PWM_1 RegulatorVCC_1 GND_1 BYP_1 Die 1 (bottom die) Self TestEEPROM with CRC Charge Pump Circuit Trimmings and Customer Settings To all internal circuits Thermal Pad (LP-24 only) Turns Counter Used in normal operation References Used in low power eTSSOP-24 N S N S eTSSOP-14 Magnet oriented for 0° output

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A. www.allegromicro.com FEATURES AND BENEFITS (continued)

• High diagnostic coverage □ On-chip diagnostics include logic built-in self-test (LBIST), signal path diagnostics, and watchdogs to support safety- critical (ASIL) applications □ 4-bit CRC on SPI
• On-chip EEPROM for storing factory and customer calibration parameters □ Single-bit error correction; dual-bit error detection, error correction control (ECC)
• Supports operating in harsh conditions required for automotive and industrial applications, including direct connection to 12 V battery □ Operating temperature range from –40°C to 150°C □ Operating supply voltage range from 3.7 to 18 V , absolute maximum of 28 V continuous ♦Can support ISO 7637-2 Pulse 5b up to 39 V
• Low power mode and turns counter feature to keep track of motor position in automotive applications when the vehicle is turned off □ Loss of power is indicated by reset flag □ Externally stored positions can be written back to the turns counter
• Multiple output formats supported for ease of system integration □ ABI and UVW interfaces provide high resolution and lowest latency angle information □ PWM interface provides initial position for ABI/UVW interfaces □ 10 MHz SPI for low latency angle and diagnostic information; enables multiple independent ICs to be connected to same bus ♦5 V SPI can be supported □ Output resolution on ABI and UVW are selectable
• Multiple programming / configuration formats supported □ The system can be completely controlled and programmed over SPI, including EEPROM writes □ For system with limited pins available, writing and reading can be performed over VCC and PWM pins. This allows configuring the EEPROM in production line for a device with only ABI/UVW and PWM pins connected.
• 1 mm thin surface-mount TSSOP packages for both single and dual die versions to minimize air gap from target magnet to CVH transducer for improved field strength □ Pin-compatible to single and dual die A1339 devices □ Stacked dual die construction to improve channel-to-channel matching for systems that require redundant sensors Table of Contents

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com ABSOLUTE MAXIMUM RATINGS Characteristic Symbol Notes Rating Unit Forward Supply Voltage VCC Sampling angles, respecting TJ(max) 28 V Reverse Supply Voltage VRCC Not sampling angles –18 V All Other Pins Forward Voltage VIN 5.5 V All Other Pins Reverse Voltage VR 0.5 V Operating Ambient Temperature TA L range –40 to 150 °C Maximum Junction Temperature TJ(max) 170 °C Storage Temperature Tstg –65 to 170 °C THERMAL CHARACTERISTICS: May require derating at maximum conditions Characteristic Symbol Test Conditions* Value Unit Package Thermal Resistance RθJA LP-24 package with exposed thermal pad; measured on JEDEC JESD51-7 2s2p board 69 °C/W LE-14 package; measured on JEDEC JESD51-7 2s2p board 82 °C/W SELECTION GUIDE * Part Number System Die Interface Voltage (V) Package Packing AAS33051LLPBTR-DD Dual 3.3 24-pin eTSSOP 4000 pieces per 13-inch reel AAS33051LLEATR Single 3.3 14-pin TSSOP 4000 pieces per 13-inch reel * Contact Allegro for 5 V interface variants if required.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Terminal List Table Pin Name Pin Number Function LE-14 LP-24 PWM_1 4 9 PWM Angle Output (die 1) BYP_1 1 12 External bypass capacitor terminal for internal regulator (die 1) A_1/U_1 12 5 Option 1: Quadrature A output signal signal (die 1) Option 2: U (phase 1) output signal (die 1) B_1/V_1 13 6 Option 1: Quadrature B output signal (die 1) Option 2: V (phase 2) output signal (die 1) VCC_1 2 11 Power supply I_1/W_1 14 7 Option 1: Quadrature I (index) output signal (die 1) Option 2: W (phase 3) output signal (die 1) VCC_2 – 23 Power supply MISO_2 – 16 SPI Master Input / Slave Output (die 2) SCLK_2 – 14 SPI Clock terminal input (die 2) MOSI_2 – 15 SPI Master Output / Slave Input (die 2); also address selection for Manchester interface CS_2 – 13 SPI Chip Select terminal, active low input (die 2); also address selection for Manchester interface GND 5, 6, 7 – Device ground terminal GND_1 – 8 Device ground terminal GND_2 – 20 Device ground terminal PWM_2 – 21 PWM Angle Output (die 2) BYP_2 – 24 External bypass capacitor terminal for internal regulator (die 2) A_2/U_2 – 17 Option 1: Quadrature A output signal (die 2) Option 2: U (phase 1) output signal (die 2) B_2/V_2 – 18 Option 1: Quadrature B output signal (die 2) Option 2: V (phase 2) output signal (die 2) I_2/W_2 – 19 Option 1: Quadrature I (index) output signal (die 1) Option 2: W (phase 3) output signal (die 1) MISO_1 11 4 SPI Master Input / Slave Output (die 1) SCLK_1 9 2 SPI Clock terminal input (die 1) MOSI_1 10 3 SPI Master Output / Slave Input (die 1); also address selection for Manchester interface CS_1 8 1 SPI Chip Select terminal, active low input (die 1); also address selection for Manchester interface WAKE_1 3 10 External Wake-Up signal input (die 1) WAKE_2 – 22 External Wake-Up signal input (die 2) PAD – PAD Exposed pad for thermal dissipation Pinout Diagrams CS_1 SCLK_1 MOSI_1 MISO_1 A_1/U_1 B_1/V_1 I_1/W_1 GND_1 PWM_1 WAKE_1 VCC_1 BYP_1 12 13

24 BYP_2

VCC_2 WAKE_2 PWM_2 GND_2 I_2/W_2 B_2/V_2 A_2/U_2 MISO_2 MOSI_2 SCLK_2 CS_2 PAD LP 24-Pin eTSSOP BYP_1 VCC_1 WAKE_1 PWM_1 GND GND GND CS_1 7 8

14 I_1/W_1

B_1/V_1 A_1/U_1 MISO_1 MOSI_1 SCLK_1 LE 14-Pin TSSOP PINOUT DIAGRAMS AND TERMINAL LIST TABLE

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com OPERATING CHARACTERISTICS: Valid over the full operating voltage and ambient temperature ranges, unless otherwise noted Characteristics Symbol Test Conditions Min. Typ. [1] Max. Unit [2]

ELECTRICAL CHARACTERISTICS

Supply Voltage VCC 3.7 – 18 V Supply Current ICC(full) For single die – 15 19 mA Low-Power Mode Average Supply Current ICC(LP) Single die, target RPM = 0, TA = 25°C, VCC = 5 V, sleep time = 96 ms – 76 – µA Single die, target RPM = 0, TA = 150°C, VCC = 16 V, sleep time = 96 ms – – 170 µA Transport Mode Supply Current ICC(TRANS) Single die, TA = 25°C, VCC = 5 V – 45 – µA Single die, TA = 150°C, VCC = 16 V – – 150 µA Power-On Reset Threshold Voltage [3][6] VPORHI VCC rising, dV/dt = 1 V/ms, TA = –40°C to 150°C – – 3.7 V VPORLOW VCC falling, dV/dt = 1 V/ms, TA = –40°C to 150°C 2.8 – – V Undervoltage Warning Level [6] VUV TA = –40°C to 150°C 3.7 3.82 4.0 V Supply Zener Clamp Voltage VZSUP ICC = ICC(AWAKE) + 3 mA, TA = 25°C 26.5 – – V Reverse Battery Current IRCC VRCC = 18 V, TA = 25°C – – 5 mA Power-On Time [4] tPO Power-on diagnostics disabled, interface working, but angle not yet settled – 300 – µs Bypass Pin Output Voltage [5] VBYP TA = 25°C, CBYP = 0.1 µF 2.97 3.3 3.63 V SPI AND ABI/UVW INTERFACE SPECIFICATIONS (for 3.3 V interface) Digital Input High Voltage VIH MOSI, SCLK, ¯C¯ ¯S¯ pins 2.8 – 3.63 V Digital Input Low Voltage VIL MOSI, SCLK, ¯C¯ ¯S¯ pins – – 0.5 V Output High Voltage VOH MISO and ABI/UVW pins, CL = 20 pF, TA = 25°C 2.93 3.3 3.63 V Output Low Voltage VOL MISO and ABI/UVW pins, CL = 20 pF, TA = 25°C – 0.3 – V SPI AND ABI/UVW INTERFACE SPECIFICATIONS (for 5.0 V interface) (Contact Allegro for 5 V SPI ordering information) Digital Input High Voltage VIH MOSI, SCLK, ¯C¯ ¯S¯ pins 3.75 – 5.5 V Digital Input Low Voltage VIL MOSI, SCLK, ¯C¯ ¯S¯ pins – – 0.5 V Output High Voltage VOH MISO and ABI/UVW pins, CL = 20 pF, TA = 25°C 4.0 5.0 5.5 V Output Low Voltage VOL MISO and ABI/UVW pins, CL = 20 pF, TA = 25°C – 0.3 – V SPI INTERFACE SPECIFICATIONS SPI Clock Frequency [6] fSCLK MISOx pins, CL = 20 pF 0.1 – 10 MHz SPI Clock Duty Cycle [6] DfSCLK SPICLKDC 40 - 60 % SPI Frame Rate [6] tSPI 5.8 – 588 kHz Chip Select to First SCLK Edge [6] tCS Time from ¯C¯ ¯S¯ x going low to SCLKx falling edge 50 – – ns Chip Select Inactive Time [6] tCSH Time in which ¯C¯ ¯S¯ x is held high before the next frame 150 – – ns Data Output Valid Time [6] tDAV Data output valid after SCLKx falling edge – – 50 ns MOSI Setup Time [6] tSU Input setup time before SCLKx rising edge 25 – – ns MOSI Hold Time [6] tHD Input hold time after SCLKx rising edge 50 – – ns SCLK to CS Hold Time [6] tCHD Hold SCLKx high time before ¯C¯ ¯S¯ x rising edge 5 – – ns Load Capacitance [6] CL Loading on digital output (MISOx) pin – – 20 pF Continued on the next page…

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com OPERATING CHARACTERISTICS (continued): Valid over the full operating voltage and ambient temperature ranges, unless otherwise noted Characteristics Symbol Test Conditions Min. Typ. [1] Max. Unit [2] PWM INTERFACE SPECIFICATIONS PWM Carrier Frequency fPWM PWM Frequency Min Setting, TA in specification – 98 – Hz PWM Programmable Options (number of steps) – 128 – steps PWM Frequency Max Setting, TA in specification – 3.125 – kHz PWM Output Low Clamp DPWM(min) Corresponding to digital angle of 0x000 – 5 – % PWM Output High Clamp DPWM(max) Corresponding to digital angle of 0xFFF – 95 – % INCREMENTAL OUTPUT SPECIFICATIONS ABI and UVW Output Angular Hysteresis [6] hysANG Programmable 0 – 1.38 degrees MANCHESTER INTERFACE SPECIFICATIONS Manchester High Voltage [6] VMAN(H) Applied to VCC line 7.3 8 VCC(max) V Manchester Low Voltage [6] VMAN(L) Applied to VCC line VCC(min) 5 5.7 V Manchester Bitrate [6] fMAN Line state changes once or twice per bit; maximum speed is usually limited by VCC line capacitance 2.2 100 kbit/s BUILT-IN SELF TEST Logic BIST Time tLBIST Configurable to run on power-up or on user request – 30 – ms Circular Vertical Hall Self-Test Time tCVHST Configurable to run on power-up or on user request – 30 – ms MAGNETIC CHARACTERISTICS Magnetic Field B Range of input field – – 1200 G Continued on the next page…

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com ANGLE CHARACTERISTICS Output [7] RESANGLE Both 12 and 15-bit angle values are available via SPI – 12/15 – bit Angle Refresh Rate [8] tANG No averaging – 1.0 – µs Response Time [6] tRESPONSE Angular latency; valid for ABI or UVW interface – 10 – µs Angle Error [9] ERRANG TA = 25°C, ideal magnet alignment, B = 300 G, target rpm = 0 –1 ±0.4 1 degrees TA = 150°C, ideal magnet alignment, B = 300 G, target rpm = 0 –1.3 ±0.7 1.3 degrees Temperature Drift ANGLEDRIFT TA = 150°C, B = 300 G, angle change from 25°C –1.4 – 1.4 degrees TA = –40°C, B = 300 G, angle change from 25°C – 0.9 – degrees Angle Noise [10][11] NANG TA = 25°C, B = 300 G, no internal filtering, target rpm = 0, 3 sigma noise – ±0.22 – degrees TA = 150°C, B = 300 G, no internal filtering, target rpm = 0, 3 sigma noise – ±0.28 – degrees Effective Resolution [12] B = 300 G, TA = 25°C – 12.47 – bits Angle Drift Over Lifetime [13] ANGLEDrift_Life B = 300 G, average maximum drift observed following AEC-Q100 qualification testing – 0.5 – degrees [1] Typical data is at TA = 25°C and VCC = 5 V, and it is for design estimates only. [2] 1 G (gauss) = 0.1 mT (millitesla). [3] At power-on, a die will not respond to commands until VCC rises above VPORHI. After that, the die will perform and respond normally until VCC drops below VPORLOW . [4] During the power-on phase, the AAS33051 SPI transactions are not guaranteed. [5] The output voltage and current specifications are to aid in PCB design. The pin is not intended to drive any external circuitry. The specifications indicate the peak capacitor charging and discharging currents to be expected during normal operation. [6] Parameter is not guaranteed at final test. Determined by design. [7] RESANGLE represents the number of bits of data available for reading from the die registers. [8] The rate at which a new angle reading will be ready. [9] Error value as measured at Allegro final test before any on-chip linearization is applied. Actual raw angle error performance in application can vary with multiple factors (e.g. magnet to sensor alignment, etc). Using the on-chip linearization features of the AAS33051 can significantly reduce these errors. [10] Error and noise values are with no further signal processing. Angle Noise can be reduced with internal filtering and slower Angle Refresh Rate value. [11] This value represents 3-sigma or three times the standard deviation of the measured samples. [12] Effective Resolution is calculated using the formula below: log2 2(360) – log ( ) n i i =1 n where σ is the Standard Deviation based on thirty measurements taken at each of the 32 angular positions, I = 11.25, 22.5, … 360. [13] Maximum observed angle drift following AEC-Q100 stress was 1.4 degrees. OPERATING CHARACTERISTICS (continued): Valid over the full operating voltage and ambient temperature ranges, unless otherwise noted Characteristics Symbol Test Conditions Min. Typ. [1] Max. Unit [2]

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com TYPICAL PERFORMANCE Table 1: Typical Power Consumption in Low Power Mode over Wake-Up Intervals at Different Temperatures lpm_cycle_time [ms] 25°C 150°C

5 V 12 V 16 V 5 V 12 V 16 V

16 151 164 176 208 224 238 24 121 134 146 177 193 207 32 106 119 130 162 178 192 40 97 110 121 153 168 182 48 91 104 115 147 162 176 56 87 100 111 142 158 172 64 84 96 108 139 154 168 72 81 94 105 136 152 166 80 79 92 103 134 150 164 88 78 90 101 133 148 162 96 76 89 100 131 147 160 104 75 88 99 130 145 159 152 71 83 94 126 141 155 200 68 81 92 123 138 152 248 67 79 91 122 137 151 296 66 78 90 121 136 150 400 65 77 88 120 135 149 512 64 76 88 119 134 148

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com FUNCTIONAL DESCRIPTION Overview The AAS33051 is a rotary position Hall-sensor-based device. It incorporates one or two electrically independent Hall sensor dies in the same surface-mount package to provide solid-state consistency and reliability, and to support a wide variety of automotive applications. Each Hall-sensor-based die measures the direction of the magnetic field vector through 360° in the x-y plane (parallel to the branded face of the device) and computes an angle measurement based on the actual physical reading, as well as any internal parameters that have been set by the user. The output of each die is used by the host microcontroller to provide a single channel of target data. This device is an advanced, programmable system-on-chip (SoC). Each integrated circuit includes a circular vertical Hall (CVH) analog front end, a high-speed sampling A-to-D converter, digital filtering, digital signal processing, a digital control SPI interface, motor commutation outputs (UVW), and encoder outputs (A, B, I). Advanced offset, gain, and linearization adjustment options are available in the AAS33051. These options can be configured in onboard EEPROM, providing a wide range of sensing solutions in the same device. Angle Measurement The AAS33051 can monitor the angular position of a rotating magnet at speeds ranging from 0 to more than 15,000 rpm. The AAS33051 has a typical output refresh rate of 1 µs. Readout in SPI is possible with 12-bit resolution, with error flags included in the same word, or in 15-bit resolution without included error flags. Reading out the angle takes 16 SPI clock cycles. See SPI Interface section for details on SPI usage. PWM output is always resolved to a 12-bit angle resolution. ABI/UVW resolution can be set to the level desired by the customer. The sensor readout is processed and linearized in various steps. These are detailed in Figure 3. System Level Timing Internal registers are updated with a new angle value every tANG. Due to signal path delay, the angle is tRESPONSE old at each update. In other words, tRESPONSE is the delay from time of magnet sam- pling until generation of a processed angle value. The streaming protocols ABI and UVW, which require no external trigger, will update every t ANG (if an angle change has occurred). SPI, which is asynchronously clocked, results in a varying latency depending on sampling frequency and SCLK speed. The values which are presented to the user are copied from the data path to the output registers between 0 and 125 ns after the SPI falling chip select edge. If the SPI clock is 10 MHz, the data will be clocked out after 1.6 µs. As the data were sampled in at the first clock edge at an age of maximum tRESPONSE, their age after the SPI transaction has finished will be between 1.6 and 1.6 + tRESPONSE µs. Figure 2 shows the update rate and the signal delay of the differ- ent angle output paths depending on the sensor settings. The value of the “angle_zcd” register is updated approximately every 32 µs. The value of the register “gauss” is update approxi- mately every 128 µs. Power-Up Upon applying power to the AAS33051, the device automatically runs through an initialization routine. The purpose of this initialization is to ensure that the device comes up in the same predictable operating condition every power cycle. This initialization routine takes a finite amount of time to complete, which is referred to as Power-On Time, tPO. Regardless of the state of the device before a power cycle, the device will re-power with EEPROM shadow bits copied from the EEPROM anew, and serial registers in their default states. For example, on every power-up, the device will power with the “zero_offset” that was stored in the EEPROM. The extended write access field “write_ adr” will be set back to its default value, zero. PWM Output The AAS33051 provides a pulse-width-modulated output with duty cycle proportional to measured angle. The PWM duty cycle is clamped at 5% and 95% DC for diagnostic purposes. 5% DC corresponds to 0 degrees of angle; 95% DC corresponds to 360° of angle. The 0% and 100% (pulled low and pulled high) states are reserved for error condition notifications. The rising edges of the output are always at the same points in time, while the falling edge moves from 5% to 95% over angles of 0 to 360 degrees. In case of errors, the setting “peo” = 1 will make errors affect the PWM pin. The setting “pes” = 0 will tristate the PWM pin, i.e. put it in a high-Z state. A power cycle is needed to relieve the high-Z condition, even if the error that caused the condition no longer persists.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com With setting “pes” = 1, the output frequency will be halved in case of errors. As soon as the condition that caused the error no longer persists, the PWM output will return to normal behavior. Errors that appeared and disappeared within one PWM cycle will still be stored and output once for the next PWM cycle. This way, very brief errors will still be reported. In case of errors, the duty cycle will be fixed to the levels in Table 2. Table 2: PWM Output Errors Error Priority Duty Cycle % Description / Persistence WDE 1 (highest) 5 Watchdog error. Permanent error until restart. OFE 2 10.625 Oscillator frequency watchdog error. STF 3 16.25 Self-test failure. Permanent error until restart. PLK 4 21.875 PLL not locked. Persists until PLL locks. ZIE 5 27.5 Zero-crossing integrity error. Persists as long as the issue exists. AVG 6 33.125 Angle averaging error. Outputs once then clears. UV 7 38.75 Undervoltage (UVA and/or UVCC dependent on serial error masks). Persists until no unmasked undervoltage. MSL 8 44.375 Persists until field strength higher than low threshold. ESE 9 50 EEPROM correctable error. Outputs once, then clears. SAT 10 55.625 Saturation error. Persists as long as the issue exists. MSH 11 61.25 Persists until field strength lower than high threshold. TR 12 66.875 Persists until temperature within range. TOV 13 (lowest) 72.5 Turns counter overflow. Persists until cleared via CTRL register.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com The duty cycle of the pin can be configured using the “pwm_ band” and the “pwm_freq” fields, yielding the frequencies shown in Table 3. Table 3: PWM Frequency Table (Hz) “pwm_band” 0 1 2 3 4 5 6 7 “pwm_freq” 0 3125 2778 2273 1667 1087 641 352 185 1 3101 2740 2222 1613 1042 610 333 175 2 3077 2703 2174 1563 1000 581 316 166 3 3053 2667 2128 1515 962 556 301 157 4 3030 2632 2083 1471 926 532 287 150 5 3008 2597 2041 1429 893 510 275 143 6 2985 2564 2000 1389 862 490 263 137 7 2963 2532 1961 1351 833 472 253 131 8 2941 2500 1923 1316 806 455 243 126 9 2920 2469 1887 1282 781 439 234 121 10 2899 2439 1852 1250 758 424 225 116 11 2878 2410 1818 1220 735 410 217 112 12 2857 2381 1786 1190 714 397 210 108 13 2837 2353 1754 1163 694 385 203 105 14 2817 2326 1724 1136 676 373 197 101 15 2797 2299 1695 1111 658 362 191 98

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Latency: 10 + (2“orate” – 1) µs Rate: 1 µs × 2“orate” Latency: 10 µs Rate: 1 µs CVH PLL + processing Latency 10 µs Rate 1 µs PWM pin Latency ≤ 1 PWM cycles of (98...3125 Hz) Rate (98...3125 Hz) ABI / UVW pins Latency ~ ns (push/pull output ) Rate can be limited by “slew _rate” Latency: 10 + (2“orate”– 1) µs Rate: 1 µs × 2“orate” Latency = fPWM -1 + 10 µs + (2“orate” – 1) µs Rate = fPWM New data rate = max of [fPWM -1 and 2“orate” µs] SPI bus Latency ≤ 1 µs · 2orate + 16/fSPI (fSPI,max = 10 MHz) Rate 16/fSPI Latency ≤ 10µs + 2“orate” µs + 16/fSPI Rate = 16/fSPI New data rate = max of [16/fSPI and 2“orate”] µs µC Oponal Angle averaging Reduce rate by 2“orate” mes 0 ≤ “orate” ≤ 12 Figure 2: Update Rate and Signal Delay

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com CVH Filter & PLL angle measurement logic ΣΔ-ADC Accumulate angle changes into 21-bit value, resolution 4096 counts/360° (initial value depends on “turns_init”) Offset adjust (“zero_offset”) Angle hysteresis (“hysteresis”) “phe”=0 180° rotation (“rd”) “h2t”=0 PWM pin “zal”=0 Segmented linearization Offset adjust (“zero_offset”) ABI / UVW pins “angle” and “angle_15” output register “turns_delta” output register Take 11 LSB of “turns_delta” “tcp”=1 Angle source combination logic “turns_offset” output register “angle_hys” output register “pll_turns_angle” output register “angle_zcd” output register “turns” output register resolution 45° or 180° PLL path (full power only) ZCD path (low power and full power) Mixed origin data Angle averaging (“orate”) Rotation direction (“ro”) Segmented linearization Rotation direction (“ro”) Rotation direction (“ro”) Offset adjust (“zcd_turns_offset”) “t45”=1 Take 9 LSB of “turns_delta” “t45”=1 Take 10 MSB of “turns_delta” Take 12 MSB of “turns_delta” “gauss” output register Field strength measurement Filter and ZCD angle measurement logic Figure 3: Angle data flow chart. Text in quotes (“”) denotes registers that affect their containing block.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Linearization The AAS33051 contains linearization functionality. Linearization allows for conversion of the initially sensor-measured magnetic field data into customer-desired linear output. This can be used to correct minor imperfections in the encoder signal, or to allow motor commutation in side-shaft measurement setups. Linearization converts the electrical angles (the angle as mea- sured by the sensor front end) into mechanical angles (the actual angle of the encoder signal). To use the linearization feature, it is most convenient to use the Allegro AAS33051 Samples Programmer Graphical User Interface (GUI). It allows the user to measure points along the mechanical rotation, calculate all parameters that need to be written into the sensor, and writes these values into the sensor. To use this function, the user must be able to read and control the mechanical angle. The sensor performs linearization by taking the measured electri- cal angles and, depending on the angle measured, subtracting a linearization coefficient stored in EEPROM. There are 32 of these linearization coefficients in the EEPROM. The angle value at a sensor angle reading of 0.00, 11.25, 22.50, … 348.75 electri- cal degrees will be modified by the values in EEPROM fields LIN0, LIN1, LIN2, … LIN31. The EEPROM LIN values are subtracted from the electrical sensor angles, as shown in Table 4. The LIN fields are 12-bit signed values. Each LIN coefficient has a range of –2048…+2047 LSB that corresponds to a correction of the electrical angle by +22.50…–22.49 degrees (EEPROM field “ls” = 0) or by +45.00…–44.98 degrees (EEPROM field “ls” = 1). When the electrical angle is between of two of the linearization points, the sensor calculates the appropriate correction value for this angle by linear interpolation between the two coefficients next to the value. For example, if the sensor measures an angle of 5.625°, the output will be 5.625 – (LIN0 + LIN1) / 2. Figure 4 is an example showing a nonlinear curve that is cor- rected by the sensor. In this example, the values of LIN0, LIN1, LIN2, and LIN3 are negative numbers, while LIN4 is a positive number. The linearized output angle in the example is close to the mechanical angle, but not perfect. This was done on purpose to show a more realistic example. The output delay of the AAS33051 is not affected by enabling or disabling linearization. If linearization is disabled, the EEPROM LIN fields can be used for other customer purposes. The data path employed to track rotation of the field in the low power mode is not linearized. In low power mode, the sensor automatically wakes up at a programmable angle change rate. With default settings, it stays in the wake mode at speeds of over 100 RPM. Since the angle used to determine the wake-up event is not linearized, the sensor wake-up behavior is determined by the change of the non-linearized electrical angle, and not by the change of the linearized angle or the mechanical angle. Table 4: Linearization Coefficients Electrical angle (°) measured by sensor Correction value Written in EEPROM Output angle Visible on sensor output 0.00 LIN0 Output = 0.00 – LIN0 11.25 LIN1 Output = 11.25 – LIN1 22.50 LIN2 Output = 22.50 – LIN2 33.75 LIN3 Output = 33.75 – LIN3 45.00 LIN4 Output = 45.00 – LIN4 56.25 LIN5 Output = 56.25 – LIN5 67.50 LIN6 Output = 67.50 – LIN6 78.75 LIN7 Output = 78.75 – LIN7 90.00 LIN8 Output = 90.00 – LIN8 101.25 LIN9 Output = 101.25 – LIN9 112.50 LIN10 Output = 112.50 – LIN10 123.75 LIN11 Output = 123.75 – LIN11 135.00 LIN12 Output = 135.00 – LIN12 146.25 LIN13 Output = 146.25 – LIN13 157.50 LIN14 Output = 157.50 – LIN14 168.75 LIN15 Output = 168.75 – LIN15 180.00 LIN16 Output = 180.00 – LIN16 191.25 LIN17 Output = 191.25 – LIN17 202.50 LIN18 Output = 202.50 – LIN18 213.75 LIN19 Output = 213.75 – LIN19 225.00 LIN20 Output = 225.00 – LIN20 236.25 LIN21 Output = 236.25 – LIN21 247.50 LIN22 Output = 247.50 – LIN22 258.75 LIN23 Output = 258.75 – LIN23 270.00 LIN24 Output = 270.00 – LIN24 281.25 LIN25 Output = 281.25 – LIN25 292.50 LIN26 Output = 292.50 – LIN26 303.75 LIN27 Output = 303.75 – LIN27 315.00 LIN28 Output = 315.00 – LIN28 326.25 LIN29 Output = 326.25 – LIN29 337.50 LIN30 Output = 337.50 – LIN30 348.75 LIN31 Output = 348.75 – LIN31

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Electrical angle measured by sensor [degree] 11.25 Angle output to customer [degree] 22.50 33.75 45.000.00 0.00 11.25 22.50 33.75 45.00 LIN1 LIN0 LIN2 LIN4 LIN3 Electrical angle (not linearized) Linearized output angle Linearization parameters Figure 4: Linearization Example Incremental Output Interface (ABI) The AAS33051 offers an incremental output mode in the form of quadrature A/B and Index outputs to emulate an optical or mechanical encoder. The A and B signals toggle with a 50% duty cycle (relative to angular distance, not necessarily time) at a frequency of 2N cycles per magnetic revolution, giving a cycle resolution of (360 / 2 N) degrees per cycle. B is offset from A by ¼ of the cycle period. The “I” signal is an index pulse that occurs once per revolution to mark the zero (0) angle position. One revo- lution is shown in Figure 5. Angle → 0 +R +2R +3R A B I -3R -2R -R 0 Increase angle – B edge precedes A edge Decreasing angle – A edge precedes B edge One full magnetic rotation (360 magnetic degrees) Figure 5: One Full Revolution Since A and B are offset by ¼ of a cycle, they are in quadra- ture and together have four unique states per cycle. Each state represents R = [360 / (4 × 2N)] degrees of the full revolution. This angular distance is the quadrature resolution of the encoder. The order in which the states change, or the order of the edge transi- tions from A to B, allow the direction of rotation to be deter- mined. If a given B edge (rising/falling) precedes the following A edge, the angle is increasing from the perspective of the electrical (sensor) angle and the angle position should be incremented by the quadrature resolution (R) at each state transition. Conversely, if a given A edge precedes the following B edge, the angle is decreasing from the perspective of the electrical (sensor) angle and the angle position should be decremented by the quadrature resolution (R) at each state transition. The angle position accumu- lator wraps each revolution back to 0. The quadrature states are designated as Q1 through Q4 in the following diagrams, and are defined as follows: State Name A B Q1 0 0 Q2 0 1 Q3 1 1 Q4 1 0 Note that the A/B progression is a grey coding sequence where only one signal transitions at a time. The state progression must be as follows to be valid: Increasing angle: Q1 → Q2 → Q3 → Q4 → Q1 → Q2 → Q3 → Q4 Decreasing angle: Q4 → Q3 → Q2 → Q1 → Q4 → Q3 → Q2 → Q1 The duration of one cycle is referred to as 360 electrical degrees, or 360e. One half of a cycle is therefore 180e and one quarter of a cycle (one quadrature state, or R degrees) is 90e. This is the

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com terminology used to express variance from perfect signal behav- ior. Ideally, the A and B cycle would be as shown below for a constant velocity (see Figure 6). In reality, the edge rate of the A and B signals, and the switching threshold of the receiver I/Os, will affect the quadrature periods (see Figure 7). A Cycle = 360e 90e 90e 90e 90e B Figure 6: Electrical Cycle 75e 90e 90e 105e Cycle = 360e A B Figure 7: Electrical Cycle

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com RESOLUTION The AAS33051 supports the following ABI output resolutions. This is set via the resolution_pairs field in EEPROM. Table 5: ABI Output Resolution EEPROM Resolution Field Cycle Resolution (Bits = N) Quadrature Resolution (Bits = 4 × N) Cycles per Revolution (A or B) Quadrature States per Revolution Cycle Resolution (Degrees) Quadrature Resolution (R) (Degrees)

0 Factory Use Only

1 Factory Use Only

2 Factory Use Only

3 11 13 2048 8192 0.176 0.044 4 10 12 1024 4096 0.352 0.088 5 9 11 512 2048 0.703 0.176 6 8 10 256 1024 1.406 0.352 7 7 9 128 512 2.813 0.703 8 6 8 64 256 5.625 1.406 9 5 7 32 128 11.250 2.813 10 4 6 16 64 22.500 5.625 11 3 5 8 32 45.000 11.250 12 2 4 4 16 90.000 22.5 13 1 3 2 8 180.0 45.0 14 0 2 1 4 360.0 90.0 15 n/a n/a n/a n/a n/a n/a

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com SLEW RATE LIMITING Slew rate limiting is enabled when the ABI.abi_slew_time field is non- zero. This option separates the sample update rate from the ABI output rate, and can be used to control two circumstances:

• The angle sample does not monotonically increase or decrease at the quadrature resolution, thereby “skipping” one or more quadrature states. In this case, the slew rate limiting logic transitions the ABI signals in the required valid sequence, at the slew rate, until the ABI output “catches up” with the angle samples, at which point the normal sample rate output resumes. This skipping will most likely occur either at very low velocities, if the noise is high, or at very high velocities when the angle changes more than the quadrature resolution in one angle sample period.
• The ABI receiver at the host end cannot reliably detect edge transitions that are spaced at the sample rate of 1 µs. The slew limit time can be set greater than the nominal angle sample update period, providing the velocity of the angle rotation would not on average require ABI transitions greater than the angle sample rate. A B Q4 Q2 Q4 Q2 Q3 X° X° X – R°X + 2R° X – 2R° X + R°Actual Bad AB  A B X° X – R°X + R° X – 2R°X + R°Output  X + 2R° X + R° X° X – R° Q3Q1Good AB  Q2 Without Slew Rate Limiting With Slew Rate Limiting X° X° X – R°X + 2R° X – 2R°X + R°Actual Slew Time Figure 8: Slew Rate Limiting

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com INDEX PULSE The index pulse I (or Z in some descriptions) marks the absolute zero (0) position of the encoder. Under rotation, this allows the receiver to synchronize to a known mechanical/magnetic position, and then use the incremental A/B signals to keep track of the absolute position. To support a range of ABI receivers, the ‘I’ pulse has four widths, defined in Figure 9. A B A=0 A=+R A=-R A=-2R True Zero to 360 Discontinuity I/Z Mode 0 I/Z Mode 1 I/Z Mode 2 I/Z Mode 3 Figure 9: Index Pulse

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Brushless DC Motor Output (UVW) The AAS33051 offers U, V , and W signals for stator commutation of brushless DC (BLDC) motors. The device is mode-selectable for 1 to 16 pole-pairs. The BLDC signals (U, V , and W), are gen- erated based on the quantity of pole-pairs and on angle informa- tion from the angle sensor. The U, V , and W outputs switch when the measured mechanical angle crosses the value where a change should occur. If hysteresis is used, then the output update method is different. The output behavior when hysteresis is enabled is described in the Angle Hysteresis section. Figure 10 and Figure 11 below show the UVW waveforms for three and five pole-pair BLDC motors. U V 0 120 240 0 120 240 0 120 240 0 0 150 300 90 30 240180 330 120 270 210 60 0 0 30 60 90 150120 180 210 240 270 330300 0 0 040 80 120 160 200 240 280 320 W Electrical Angle Mechanical Angle Electrical Angle Mechanical Angle U V W Figure 10: U, V, W Outputs for Three Pole-Pair BLDC Motor U V 0 120 240 0 120 240 0 120 240 0 0 150 300 90 30 240180 330 120 270 210 60 0 0 30 60 90 150120 180 210 240 270 330300 0 0 040 80 120 160 200 240 280 320 W Electrical Angle Mechanical Angle Electrical Angle Mechanical Angle U V W Figure 11: U, V, W Outputs for Five Pole-Pair BLDC Motor

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Quantity of Poles (“resolution_pairs”) Quantity of Pole-Pairs Conversion from Electrical Degrees to Mechanical Degrees Electrical (°) Mechanical (°) 0000 1 90 90 0001 2 90 45 0010 3 90 30 0011 4 90 22.5 0100 5 90 18 0101 6 90 15 0110 7 90 12.857… 0111 8 90 11.25 1000 9 90 10 1001 10 90 9 1010 11 90 8.1818… 1011 12 90 7.5 1100 13 90 6.9231… 1101 14 90 6.4286… 1110 15 90 6 1111 16 90 5.625

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com ABI Behavior at Power-Up At power-up, the AAS33051 ABI interface communicates the current position. This means that reading the angle through the PWM output is not needed to find the current position when using the ABI interface. The behavior at start-up is the following:

• During tPO, the state of the interface is undefined
• During a delay phase, the output will display a 0° angle. With default settings, the 0° angle is indicated by A = B = low and I = high.
• The interface will the “catch up” with the actual measured angle by moving in positive or negative direction, whichever is faster. The time for catching up is at most: tSETTLE(MAX) = 180° R × ABI_slew_time with R = quadrature resolution.
• After catching up, with the output angle is completed, the sensor will operate normally. If “ABI_slew_time” is set to 0, there is no “catch-up” phase. The output will jump to the final position immediately, e.g. with A = high and B = low. With “ABI_slew_time” set to 0, the user can- not determine the position at startup from the ABI interface. me A B I VCC tPO 4 ms (max) tcatch-up “ABI_slew_time” Normal operation Figure 20: ABI Startup Behavior

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Angle Hysteresis Hysteresis can be applied to the compensated angle to moderate jitter in the angle output due to noise or mechanical vibration. In the AAS33051, the hysteresis field (ANG.hysteresis) defines the width of an angle window at 14-bit resolution. Mathematically, the width of this window is: ANG.hysteresis × (360 / 16384) degrees , giving a range of 0 to 1.384 degrees. The hysteresis-compensated angle can be routed to the ABI or UVW interface by setting the ABI.ahe bit to 1. On the SPI or Manchester interface, the hysteresis-compensated angle can be read via an alternate register (HANG.angle_hys) at 12-bit resolu- tion. The effect of the hysteresis is shown in Figure 12. The current angle position as measured by the sensor is at the “head” of the hysteresis window. As long as the sensor (electrical) angle advances in the same direction of rotation, the output angle will be the sensor angle, minimizing latency. If the sensor angle reverses direction, the output angle is held static until the sensor angle exits the hysteresis window in either direction. If the exit is in the opposite direction of rotation where the “head” was, the head flips to the opposite end of the hysteresis window and that becomes the new reference direction. The current direction of rotation, or “head” for the purposes of hysteresis, is viewable via the STA.rot bit, where 0 is increasing angle direction and 1 is in decreasing angle direction. This behavior has the following consequences: 1. If the hysteresis window is greater than the output resolution, the output angle will skip consecutive incremental steps. If the hysteresis-compensated angle is selected for the ABI output, this would result in an integrity failure due to skipped quadra- ture states. To avoid this, it is recommended that the slew rate limiting be enabled on the ABI interface if hysteresis is used. 2. If there is jitter due to noise or mechanical vibration, especially at a static angle position or very slow rotation, the angle will tend to bias to one side of the window, depending on the direc- tion of rotation as the angular velocity approaches zero (i.e., towards the current “head”) rather than to the average position of the jitter. 2.32.22.1 Rotation Hysteresis Hysteresis Hysteresis Hysteresis Hysteresis Hysteresis Hysteresis Rotation Rotation 2.7 2.8 2.9 2.9 2.9 2.9 2.9 3.0 3.0 3.0 3.0 3.0 2.5 2.4 2.3 2.3 2.3 Rotation Rotation Rotation Rotation Rotation Rotation Rotation Electrical Angle TIME OUTPUT ANGLE Hysteresis Hysteresis Hysteresis Hysteresis Hysteresis Hysteresis Hysteresis Hysteresis Hysteresis Hysteresis Hysteresis Sensor angle position Window of hysteresis Sensor angle and output angle the same Output angle Direction of rotation as seen by the hysteresis logic Angle Jump Figure 12: Effect of Hysteresis Note: The rotation direction resets to 0, or increasing angle direction. At power-up or exiting low power mode, or after LBIST, the hysteresis window will always be behind the initial angle position, so if hysteresis is enabled, a decreasing angle direction of rotation will not register until the hysteresis window is past.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Low Power Mode Low power mode is an automatic duty cycling between a reduced-power angle sampling “wake” state and a minimal power “sleep” state. Low power mode is only entered if a set of condi- tions is met:

• The WAKE pin must be low, AND
• The SPI pins must be low, AND
• The change of the magnetic field direction must be below the programmed threshold, AND
• The command to enter the low power mode must have been given. When keeping WAKE and SPI pins low, the AAS33051 will leave and re-enter low power mode repeatedly based on compar- ing the angle change to the maximum permitted angle change. This allows tracking the angular position with high speed (when needed) and minimized power consumption (when possible) without user commands to enter/leave the low power mode. In the sleep state, the sensor counts the time until it needs to wake up again, but does not sample angles. No output is provided as to whether the sensor is currently sampling or sleeping. However, the alive count serial register is incremented at each wake/sleep cycle. Reading the alive count allows the user to verify that the system was still operating and sampling angles while it was in low power mode. In case the change of angle between successive samples is larger than a set threshold, or in case a high voltage on the wake pin was detected, low power mode is left automatically and the sensor will move to full power mode. STATE TRANSITIONS WITHIN LOW POWER MODE The SPI input pins are used as the primary arbiter of low power mode. When all three pins inputs (MOSI, SCLK, CSN) are pulled low for at least 64 µs, the sensor enters a semi-low power state in which the PLL and some other logic are disabled (including SPI and Manchester), the I/O regulator is turned off, and the ABI and PWM pins are tristate. Only the low power angle sensing path is enabled in order to update the turns counter and measure angular velocity. This state is called the “wake” state. In the “wake” state, the WAKE pin and the velocity are moni- tored. Once the WAKE pin is low (de-asserted) and the velocity is below the threshold set in the EEPROM, the sensor enters “sleep”. The low frequency oscillator remains on, with a counter for the sleep period (“lpm_cycle_time”) and logic to detect SPI/ WAKE pins going high active. Expiration of the counter, or asser- tion of the WAKE pin signal, wakes the sensor back up to the “wake” state to update the turns counter and measure the velocity based on change in angle from entering the “sleep” state. If the velocity exceeds the threshold, or the WAKE pin is active, the sensor remains awake and updating the turns counter. The SPI pins must change from their all-zeros state to resume normal mode operation; this will be followed by a settle time for the PLL to lock before angle output and temperature update is resumed. All decisions about entering the “sleep” state are made at the end of the “lpm_cycle_time”, which runs continuously no matter what state the sensor is in. Therefore the sensor only can enter “sleep” on those time boundaries. The following flowchart (Figure 13) shows the general low power mode flow.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com LPC.tpmd == 0, AND SCK < VIL for 64 µs, AND CSB < VIL for 64 µs, AND MOSI < VIL for 64 µs, AND ( (“special” code for transport mode is set) OR ( LPC.lpt == 1 ) ) SCK > VIL, OR CSB > VIL, OR MOSI > VIL ( Angle change during “lpm_wake_threshold) , AND SCK, CSB, MOSI < VIL, AND WAKE pin < threshold ( (“lpm_cycle_time” timer expired) OR (WAKE pin > threshold) ) AND SCK, CSB, MOSI < VIL SCK, CSB, MOSI < VIL AND ( (Angle change over “lpm_wake_threshold” ) OR (WAKE pin > threshold) ) SCK > VIL, OR CSB > VIL, OR MOSI > VIL SCK > VIL, OR CSB > VIL, OR MOSI > VIL Low power mode “Sleep” state “Wake” state Full power mode Power-on reset Transport mode ( ( LPC.tpmd == 1 ) OR ( (LPC.lpt == 0 ) AND (“special” code for transport mode not set) ) ), AND LPC.lpmd == 0, AND SCK < VIL for 64 µs, AND CSB < VIL for 64 µs, AND MOSI < VIL for 64 µs Figure 13: Low Power Mode Flowchart

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com When using the default settings, the diagram can be simplified to the one below (Figure 14): SCK < VIL for 64 µs, AND CSB < VIL for 64 µs, AND MOSI < VIL for 64 µs, AND “special” code for transport mode is set SCK > VIL, OR CSB > VIL, OR MOSI > VIL rotang < 600°/s, AND SCK, CSB, MOSI < VIL, AND WAKE pin < threshold ( (100 ms mer expired) OR (WAKE pin > threshold) ) AND SCK, CSB, MOSI < VIL SCK, CSB, MOSI < VIL AND ( ( rotang > 600°/s ) OR (WAKE pin > threshold) ) SCK > VIL, OR CSB > VIL, OR MOSI > VIL SCK > VIL, OR CSB > VIL, OR MOSI > VIL Low power mode “Sleep” state “Wake” state Full power mode Power-on reset Transport mode “special” code for transport mode not set, AND SCK < VIL for 64 µs, AND CSB < VIL for 64 µs, AND MOSI < VIL for 64 µs Figure 14: Simplified Low Power Flowchart, Default Settings

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com WAKE PIN It is possible for the sensor to go to “wake” state using the WAKE pin. This may be connected to a digital output from a microcon- troller, or to an analog signal generated from backscatter from the coils of an electric motor. Keep in mind that automatically waking up can still be triggered by the angle change process- ing in low power mode, so that using the WAKE pin is often not required for automatic wake-up. In applications where sudden ≥180° rotations could occur, the WAKE pin can be employed to remove this risk. A sample input circuit is given in Figure 15. The threshold at which the WAKE pin should signal a power on is programmable in EEPROM using the field wp_thres. The hys- teresis of the pin can be selected using the field wp_hys. Zener Diode (for protection) To WAKE Pin Schottky Diodes 3-Phase “Star” Motor Winding Figure 15: Sample Filtering Circuit

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Turns Counting and Low Power Mode Certain automotive angle sensing applications require the ability to track angular position, even in key-off conditions. In the key- off state, most voltage regulators in the vehicle are not opera- tional. Therefore, sensors that must operate in the key-off state are often powered directly from the car battery (12 V). Examples of such applications include:

• Seat-belt passive safety systems
• EPS motor position Often, these motor and seat-belt systems are geared down so that multiple angle sensor rotations need to be counted by the angle sensor IC. For this reason, the AAS33051 includes a circuit that counts the rotational turns of a magnet. When sensor ICs are connected to the car battery, they must also have low-power modes that enable efficient battery usage. The AAS33051 is able to go into a low-power state and still monitor and keep track of rotations. This will ensure that the system can accurately and consistently track steering wheel position or seat-belt extension when using the AAS33051 in a key-on or key-off mode. Tradi- tionally, this key-off requirement is achieved by a combination of relatively complex mechanical and electronic components. The AAS33051 can reduce system-level complexity and eliminate many system components by performing both the absolute angle measurement and the tracking of TCs, while maintaining low bat- tery power consumption at vehicle key-off. In low power mode, the turns counter is updated using a low- power signal path. The design minimizes the amount of logic that is drawing power during the low-power awake periods, allowing for efficient turns count tracking during battery oper- ated low-power modes. The turns counter logic tracks the exact accumulated change in angle. Due to its emphasis on low power, the signal path which tracks total turns does not implement the same angle compensation as the primary signal path. However, after the sensor returns to full power operation, the source for the turns counter information is changed back to the more accurate full-power signal path. Because of this, the user does not see the reduced accuracy in the low-power signal path. Using the EEPROM setting “tcp” = 1, the turns counter uses the full-power high accuracy path when available. This setting is recommended. For backward compatibility to the A1339, it is possible to use the low-power signal path as only turns counter source, by setting the tcp field in EEPROM to 0. time Angle [deg] 360 180 270 time Turns_delta value 8192 2048 4096 6144 time Turns_count value 45 degree count 180 degree count Figure 16: Turn Counting To read the total position of the magnetic encoder (angle in 12-bit resolution, as well as additional revolutions in 9 bits, sign- extended to 12 bits), two serial register are provided in “td_high” and “td_low”. This 24-bit word accumulates the total changes in angle. When reading “td_high”, the contents of “td_low” will be locked. This is done so that the values of the two words are matching to each other. To get a correct reading of the entire turns delta, the customer must first read “td_high” and then read “td_low”. An example for reading turns_delta is given in Figure 17. 0x36 0x00 0x00 0x00 0x38 0x00 0x00 0x00 0x56 0x54 0x70 0x05 0x00 0x00 0x66 0x64 Figure 17: Reading turns_delta

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com The reads from register 0x36 (“td_high”) and 0x38 (“td_low”) return the words 0x7005 and 0x6664. Taking the 12 LSB from each word and combining these gives value 0x005664, which equals 22116, or [22116 × (360 / 4096)] = 1943.78° of total rotation. Negative numbers are output in two’s complement. The example in Figure 18 below shows a read of a negative turns_delta value. Again taking the last 12 bits of each transaction, the turns_delta value is 0xFFE5DB. Converting this value from two’s comple- ment is done by taking the first bit as negative value and the other 23 bits as positive. In decimal, the turns_delta value equals (0x800000 + 0x7FE5DB) = (–8388608 + 8381915) = –6693. This equals an angle of [–6693 × (360 / 4096)] = –588.25°. The initial value of the register (zero, or current angle, or cur- rent angle with turns_count zeroed) can be controlled using the EEPROM field turns_init, as detailed in Figure 19 below. me Angle [deg] 360 180 270 2048 4096 1024 3072 Reset me -1024 Turns_delta value 5120 turns_init == 11, t45 == 0 turns_init == 10 turns_init == 00, 01 turns_init == 11, t45 == 1 Figure 19: “turns_delta” value at startup, depending on “turns_init” If the customer wants to restore the old value of “turns_delta” after a power-on reset, then “turns_init” should be set to ‘10’. The serial register “turns” presents the highest value bits of the turns_delta. It saturates at +2047 and –2048 in the 45-degree mode and +511 and –512 in the 180-degree mode. If this hap- pens, the Turns Count Overflow Flag will assert and stay asserted until the turns counter is reset via the Control register (see “Pri- mary Serial Interface Registers Reference” section). During Low Power mode, the AAS33051 periodically measures the magnet position, and updates the turns count based on the angular change from the previous angle measurement. If the angle changes by ≥180 degrees, the direction change is ambigu- ous and will be interpreted as a rotation in the opposite direction. Any sample to sample delta greater than 135 degrees will set the Turns Count Warning Flag. This is intended to give some indica- tion relative to the low power mode cycle time as to whether the velocity is high enough over that sleep period for the angle delta to be getting close to the 180 point of ambiguity. 0x36 0x00 0x00 0x00 0x38 0x00 0x00 0x00 0x45 0xDB 0x6F 0xFE 0x00 0x00 0x75 0xDB Figure 18: Read of a Negative turns_delta Value

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Setting the Turns Count Value There are two ways to modify the value of the turns counter:

• Using the turns counter reset function
• By writing the turns_delta value to register EWD, and loading it into turns_delta INVOKING A TURNS COUNTER RESET A reset of the turns counter is a command invoked using the field “CTRL.special”. For details, refer to “CTRL.special” field in the serial register documentation. CHANGING OR RESTORING THE TURNS_DELTA VALUE It is possible to load a desired value into the turns counter regis- ter. This may be useful if a certain externally stored value should be set again following a power loss. The turns counter register itself cannot be written directly. Instead, the writing action is an indirect one using the following steps: 1. Writing should only be only be when the system is stable, as indicated by the “sta.aok” bit field. 2. Write the desired 21-bit value of turns_delta into the serial registers “ewdh” and “ewdl”. Example: A. The customer wants to set turns_delta to value 10441.32° (29 rotations and 1.32° current angle), so he needs to write (10441.32 / 360) × 4096 = 118799 = 0x01D00F. B. Write the lower 16 bits into register “ewdl”, and the higher 5 bits into “ewdh”. Put 11 zeros in front of the turns_delta value to get full 16 bits to write. This results in writing 0x0001 to register 0x04:0x05 (“ewdh”) and writing 0xD00F to register 0x06:0x07 (“ewdl”). 3. Write the value 0x3 to the field “ctrl.special” and write 0x46 to the field “ctrl.initiate_special”. 4. The sensor behavior to process the command will depend on the setting of the turns_init EEPROM field: A. When turns_init = 00 or 01, the value will be copied to turns_delta, and subsequent angle changes will be ac- cumulated on top of this value. Using this is not recom- mended for scenarios in which one wants to restore a saved value, because small offset changes / noise errors will result in an increasing error every time such a write is performed. B. When turns_init = 10 or 11, the value will be compared to the currently sensed angle. The turns_delta field will ‘snap’ to the closest value matching the sensed angle. Errors in position of <180° will be removed this way. This method is recommended for scenarios in which one wants to restore a saved turns_delta value. If the angle has drifted a little before writing back, this will be corrected by the sensor, and a correct turns_delta value is still pre- sented even after many turns counter restorations Transport Mode Transport mode is effectively low power mode, but with the low frequency oscillator disabled and the WAKE pin disabled. To invoke transport mode, the serial “ctrl.special” field is set to 0x6, then when low power mode is enabled (SPI inputs low for > 64 µs), transport mode is entered. As soon as one of the incoming SPI lines is high, the AAS33051 will wake up again. Transport mode can be disabled using the customer EEPROM setting “tpmd”. 0x44 0x00 0x45 0x01 0x46 0x00 0x47 0x0F

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com The AAS33051 can be programmed in two ways:

• Using the SPI interface for input and output, whilst supplying the VCC pin with normal operating voltage
• Using a Manchester protocol on the supply pin for input, and the PWM pin for output. The AAS33051 does not require special supply voltages to write to the EEPROM. All setting fields and all data fields of the sensor can be read and written using both protocols. If EEPROM locking is used (detailed in EEPROM lock section), then write access using either of the protocols will be prevented. A separate setting to completely disable the Manchester interface is available in the dm field of the EEPROM. Using this setting will cause the sensor to ignore any commands entered using Manchester protocol. The SPI interface will not be disabled by disabling the Manchester interface. Interface Structure The AAS33051 consists of two memory blocks. The primary serial interface registers are used for direct writes and reads by the host controller for frequently required information (for example, angle data, warning flags, field strength, and tempera- ture). All forms of communication (even to the extended loca- tions) operate through the primary registers, whether it be via SPI or Manchester. The primary serial registers also provide a data and address loca- tion for accessing extended memory locations. Accessing these extended location is done in an indirect fashion: the controller writes into the primary interface to give a command to the sensor to access the extended locations. The read/write is executed and the result is again presented in the primary interface. This concept is shown in Figure 21. For writing extended locations, the primary interface offers extended write address, data, and control registers. Refer to the section “Write Transaction to EEPROM and Other Extended Locations” for details on their usage. For reading extended locations, the primary interface offers extended read address, data, and control registers. Refer to the section “Read Transaction from EEPROM and other Extended Locations” for details on their usage. EEPROM writing requires additional procedures. For more infor- mation on EEPROM and shadow memory read and write access, see “EEPROM and Shadow Memory Usage” section. The primary serial interface can be accessed using the SPI and using the Manchester interface. These two interfaces are detailed in the sections below. DEVICE PROGRAMMING INTERFACE Primary Serial Interface 02:03 Extended Write Address 04:05 Extended Write Data High 06:07 Extended Write Data Low 08:09 Extended Write Control/Status 0A:0B Extended Read Address 0E:0F Extended Read Data High 10:11 Extended Read Data Low 0C:0D Extended Read Control/Status Extended Locaons Shadow Address 0x58 0x59 0x5A ... ... 0x5B 1E:1F Device Control (CTRL) 20:21 Angle (ANG) EEPROM Address 0x17 0x18 0x19 0x1A ... ... 0x1B Name CU2 PWE ABI MSK ... ... PWI Write data Read data Address Funcon SPI / Manchester IFUser ... ... ... ... Figure 21: Serial Registers allow access to extended memory (EEPROM and Shadow)

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com SPI Interface The AAS33051 provides a full-duplex 4-pin SPI interface for each die, using SPI mode 3 (CPHA = 1, CPOL = 1). All program- ming can be done using this interface, but all programming can also be done using the Manchester interface. In addition to providing a communications interface, the SPI interface is also used to control entering and leaving of the low power and transport modes. If the SPI interface is not used, do not leave the chip select line floating but instead follow the rec- ommendations in the “Typical SPI and ABI/UVW Applications” section. The sensor responds to commands received on the MOSI (Master-Out Slave-In), SCLK (Serial Clock), and CSB (Chip Select) pins, and outputs data on the MISO (Master-In Slave-Out) pin. All three input pins are 3.3 V and 5 V SPI compatible, with threshold values determined by factory EEPROM settings. MISO output voltage level will conform to 3.3 V or 5 V SPI levels, based on factory settings. Regular part are shipped with 3.3 V interface. Contact Allegro for ordering options of the 5 V variant. The setup for communication using the SPI interface is given in Figure 22 below. Sensor VCC GND Host SPI Fixed supply voltage, e.g. 5 V R/W commands and return data (SPI) GND Figure 22: Programming Connections for SPI Interface TIMING The interface timing parameters from the specification table are defined in Figure 23 and Figure 24 below. CSx SCLKx MOSIx tCSH tCS tSU tHD tCHDtSCLKL tSCLKH R / W Figure 23: SPI Interface Timings Input CSx SCLKx MISOx DO-15 DO-14 Register Contents DO-x tCSH tCS tCHDtSCLKL tDAV tSCLKH Figure 24: SPI Interface Timings Output

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com MESSAGE FRAME SIZE The SPI interface requires either 16, 17, or 20-bit packet lengths. An extended 20-bit SPI packet allows 4 bits of CRC to accom- pany every data packet. A 17-bit packet is only allowed if the EEPROM/Shadow bit “s17” is set to 1. CSN SCLK MISO MOSI 15 14 1 0 Figure 25: 16-Bit SPI Frame CSN SCLK MISO MOSI 15 14 1 0 X Figure 26: 17-Bit SPI Frame CSN SCLK MISO MOSI 15 14 1 0 C3 C2 C1 C0 Figure 27: 20-Bit SPI Frame If more clock pulses than expected were detected by the sensor in an SPI transaction, the interface warning “warn.ier” will activate. This warning will not activate on clean SPI transactions with 16 or 20 bit, or with clean 17-bit transactions when “s17” is enabled. The purpose of the 17-bit SPI option is to allow delayed reading of the MISO line by the host. Some hosts allow sampling of data from the slave not on the rising edge, but on the next falling edge of SCLK. This way, in case of long interface delays caused by large line capacitance or very long cables, the permissible clock speed can be increased. However, a 17th falling edge is required to read the 16th bit coming from the sensor. For the sensor to not display an error when this 17th clock is found, the bit “s17” must be set. WRITE CYCLE Write cycles consist of a 1-bit low, a 1-bit R/W (write = high), 6 address bits (corresponding to the primary serial register), 8 data bits, and 4 optional CRC bits. To write a full 16-bit serial register, two write commands are required (even and odd byte addresses). MOSI bits are clocked in on the rising edge of the Master-generated SCLK signal. READ CYCLE Reading data always involves at least two SPI frames. In the first frame, the read command is sent, while in the second frame, the result from the first read is received. While receiving data from the last read command, it is possible to send another read com- mand (duplexed read). This way, every frame except the first one contains data from the sensor. This is useful for very fast reading of angle information. When receiving the last frame, the host can transmit a command with MOSI set to all zeros. This represents a read command from register 0x00 and will not change the state of the sensor. Reading from register 0x00 will output the value 0x0000. In frames where no previous read command was sent, the MISO data output should be ignored.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Because an SPI read command can transmit 16 data bits at one time, and the primary serial registers are built from one even and one odd byte, the entire 16-bit contents of one serial register may be transmitted with one SPI frame. This is accomplished by providing an even serial address value. If an odd value address is sent, only the contents of the single byte will be returned, with the eight most significant bits within the SPI packet set to zero. Example: To read all 16 bits of the error register (0x24:0x25), an SPI read request using address 0x24 should be sent. If only the 8 LSBs are desired, the address 0x25 should be used. Figure 28 shows examples of both an SPI write and an SPI read request, using a 16-bit SPI message frame. CSx SCLKx MOSIx MISOx A5 A4 A3 A2 A1 A0 A5 A4 A3 A2 A1 A0 SCLKx MOSIx MISOx R/W Input latched Input latched 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 CSx CSx SCLKx MOSIx MISOx R / W R / W A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 (A) SPI Write Example (duplexed read available) (B) SPI Read Example: register selection (duplexed read available) (C) SPI Read Example: data output from selected register Register Contents (previous Read command selection, or Don’t Care) Register Contents (previous Read command selection, or Don’t Care) Register Contents (previous Read command selection, or Don’t Care) DO-15 DO-14 DO-13 DO-12 DO-11 DO-9 DO-8 DO-7 DO-6 DO-5 DO-4 DO-3 DO-2 DO-1 DO-0DO-10 DO-15 DO-14 DO-13 DO-12 DO-11 DO-9 DO-8 DO-7 DO-6 DO-5 DO-4 DO-3 DO-2 DO-1 DO-0DO-10 DO-15 DO-14 DO-13 DO-12 DO-11 DO-9 DO-8 DO-7 DO-6 DO-5 DO-4 DO-3 DO-2 DO-1 DO-0DO-10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Figure 28: SPI Read and Write Pulse Sequences

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com CRC If the user want to check the data coming from the sensor, it is pos- sible to use 20-bit SPI frames. Without additional setting required, a 4-bit CRC is automatically generated and placed on the MISO line if more than 16 bits are read from the sensor. The four additional CRC bits on the MOSI line coming from the host are ignored by the sensor, unless the “PWI.sc” bit is set within EEPROM. When the incoming CRC check is enabled, an incoming SPI packet with an incorrect CRC will be discarded, and the CRC error flag set in serial register “warn.crc”. The CRC is based on the polynomial x 4 + x + 1 with the linear feedback shift register preset to all 1s. The 16-bit packet is shifted through from bit 15 (MSB) to bit 0 (LSB). The CRC logic is shown in Figure 22. Data are fed into the CRC logic with MSB first. Output is sent as C3-C2-C1-C0. Input Data C0 C1 C2 C3 Figure 29: SPI CRC The CRC output by the sensor on the MISO pin will always be calculated correctly. The CRC from the host on the MOSI pin must be correct if the CRC enable bit PWI.sc in the EEPROM was set. Note: If the ERD (extended read data) register is read before the “ERCS.ERD” bit indicates a read has completed, there is a pos- sibility of a CRC error, as the data could change during the read. Do not read the ERD register until it is known to be stable based on the done bit indication or waiting sufficient time. The CRC can be calculated with the following C code: * CalculateCRC * Take the 16-bit input and generate a 4-bit CRC * Polynomial = x^4 + x + 1 * LFSR preset to all 1’s uint8_t CalculateCRC(uint16_t input) bool CRC0 = true; bool CRC1 = true; bool CRC2 = true; bool CRC3 = true; int i; bool DoInvert; uint16_t mask = 0x8000; for (i = 0; i < 16; ++i) DoInvert = ((input & mask) != 0) ^ CRC3; // XOR required? CRC3 = CRC2; CRC2 = CRC1; CRC1 = CRC0 ^ DoInvert; CRC0 = DoInvert; mask >>= 1; return (CRC3 ? 8U : 0U) + (CRC2 ? 4U : 0U) + (CRC1 ? 2U This code can be tested at http://codepad.org/jPPW1CQ4.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Manchester Interface To facilitate addressable device programming when using the unidirectional PWM output mode with no need for additional wiring, the AAS33051 incorporates a serial interface on the VCC line. All programming can be done using this interface, but all programming can also be done using the SPI interface. This interface allows an external controller to read and write registers in the AAS33051 EEPROM and volatile memory. The device uses a point-to-point communication protocol, based on Manchester encoding per G.E. Thomas (a rising edge indicates a 0 and a falling edge indicates a 1), with address and data transmit- ted MSB first. The addressable Manchester code implementation uses the logic states of the CSN/MOSI pins to set address values for each die. In this way, individual communication with up to four AAS33051 dies is possible. Using a broadcast Manchester com- mand, any die receiving the command will respond. To prevent any undesired programming of the AAS33051, the serial interface can be disabled by setting the Disable Manchester bit, “PWI.dm”, to 1. With this bit set, the sensor will ignore any Manchester input on VCC. The setup for communication using the Manchester interface is given in Figure 30. Sensor VCC GND Host PWM R/W commands (Manchester code) Return data (Manchester code) GND to logic high supply MOSI CS Set to logic high or to GND to choose target ID# Figure 30: Manchester Interface Programming Setup CONCEPT OF MANCHESTER COMMUNICATION The Manchester interface allows programming and readout with a minimal number of pins involved. This is beneficial for sen- sor subassemblies connected to wiring harnesses, because less connections are needed. The supply level is typically modulated between 5 and 8 volts (V MAN(H) and VMAN(L)) to produce a “low” and “high” signal. In the absence of a clock signal, Manchester encoding is used, allowing the sensor to determine the bit rate that the host is using. The master can freely choose any supported Manchester commu- nication frequency for each transaction. The sensor will recognize the transaction speed used by the master and send the response at the same data rate. As Manchester commands are sent on the supply line, the speed is usually limited by capacitances on the supply line. A reduction of the bit rate, or using a stronger line driver, can help to ensure stable communication. If a correct read command was sent, the sensor responds to the master using the open-drain output on the PWM line. The high level will be determined by the PWM pull-up (usually 3.3 V or 5 V), and the low level will be close to GND. The PWM uses an open drain output, setting the logic levels to GND and logic level high (see Figure 30 ). A sufficient pull-up resistor (e.g. 4.7 kΩ) must be used to pull the line to a maximum logic high level VIN. ENTERING MANCHESTER COMMUNICATION MODE Provided the Disable Manchester bit is not set in EEPROM, the AAS33051 continuously monitors the VCC line for valid Man- chester commands. The part takes no action until a valid Man- chester Access Code is received. There are two special Manchester code commands used to activate or deactivate the serial interface and specify the output format used during Read operations: 1. Manchester Access Code: Enters Manchester Communication Mode; Manchester code output on the PWM pin. See further paragraphs for example. 2. Manchester Exit Code; returns the PWM pin to normal opera- tion. See further paragraphs for example. Once the Manchester Communication Mode is entered, the PWM output pin will cease to provide angle data, interrupting any data transmission in progress. TRANSACTION TYPES The AAS33051 receives all commands via the VCC pin, and responds to Read commands via the PWM pin. This implementa- tion of Manchester encoding requires the communication pulses be within a high (V MAN(H)) and low (VMAN(L)) range of voltages on the VCC line. Each transaction is initiated by a command from the controller; the sensor does not initiate any transactions. Two commands are recognized by the AAS33051: Write and Read.

Manchester, NH 03103-3353 U.S.A. Figure 31. Note that, in the Manchester coding used, a bit value A brief description of the bitfields is provided in Table 6.

2 Synchronization Value '00' sent to identify a command

1 Read/Write 0 = write, 1 = read

4 Target ID

Select the target ID for this transaction. is written to all sensor dies.

6 Address Serial address for read/write

3 CRC 3-bit CRC, needed for all commands

addressed and providing for different group addressing schemes. ing must be done one die at a time.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com SENSOR MANCHESTER MESSAGE STRUCTURE If a read command with the desired register number was sent from the controller to the sensor, the device responds with a Read Response frame using the Manchester protocol over the PWM output. The following command messages can be exchanged between the device and the external controller:

• Manchester Access Code (host to sensor)
• Manchester Exit Code (host to sensor)
• Manchester Write Command (host to sensor)
• Manchester Read Command (host to sensor)
• Manchester Read Response (sensor to host) In addition to the contents of the requested memory location, a Return Status field is included with every Read Response. This field provides the ID used to communicate with the part and any errors which may have occurred during the transaction. These bits are:
• ID – ID (CSN/MOSI) unless BC = 1 (ID will be 00)
• BC – Broadcast; ID field was zero or SPI mode active
• AE – Abort Error; edge detection failure after sync detect
• OR– Overrun Error; A new Manchester command has been received before the previous request could be completed
• CS – Checksum error; a prior command had a checksum error For EEPROM address information, refer to the EEPROM structure section. For serial address locations, refer to the serial register map. MANCHESTER ACCESS CODE The Manchester Access Code has to be sent before other Man- chester commands. The Manchester Access Code always operates as a broadcast pulse, meaning the sensor will not look at the Target ID field. For example, if two sensors configured with ID0 and ID1 respec- tively are sharing a common VCC line, a Manchester Access Code with a Target ID value of [0 0 1 0] results in both sensors entering Manchester Serial Communication mode. Table 8: Manchester Access Code Bits Parameter Name Description

2 Synchronization ‘00’

1 Read/Write ‘0’

4 Target ID ‘0000’ (this command will always be a

broadcast, even if it is addressed)

6 Address ‘111111’ (fixed number for Manchester

access message)

16 Data 0x62D2 (fixed number for Manchester

access message)

3 CRC 3-bit CRC

An example is given below, with target ID = [0 0 0 1], data = access code = 0x62D2, and CRC = ‘110’. 0 0 0 0 0 0 1 1 1 1 1 1 1 0 1 1 0 0 0 1 0 1 1 0 1 0 0 1 0 1 1 0 0x62 0xD2 Figure 32: Target ID = [0 0 0 1], Data = Access code = 0x62D2, CRC = ‘110’ 4.3.5.2

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com MANCHESTER EXIT CODE The Manchester Exit Code can be sent after Manchester access is complete in order to avoid accidental decoding of Manchester commands. The Manchester Exit Code always operates as a broadcast pulse, meaning the sensor will not look at the Target ID field. For exam- ple, if two sensors configured with ID0 and ID1 respectively are sharing a common VCC line, a Manchester Access Code with a Target ID value of [0 0 1 0] results in both sensors exiting Man- chester Serial Communication mode. Table 9: Manchester Exit Code Bits Parameter Name Description broadcast, even if it is addressed) exit message)

16 Data 0x0000 (any value except 0x62D2 can

be used for Manchester exit message) An example is given below, with target ID = [0 0 0 1], data = 0x0000, and CRC = ‘110’. 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0x00 0x00 Figure 33: Target ID = [0 0 0 1], Data = 0x0000, CRC = ‘110’ MANCHESTER READ COMMAND Determines the serial address within the sensor from which the next Read Response will transmit data. The sensor must first receive a Manchester Access Code before responding to a read command. This command is sent by the controller. Table 10: Manchester Read Command Bits Parameter Name Description

1 Read/Write ‘1’

4 Target ID Depends on targeted sensor ID, e.g. to target ID0, use ‘0001’ 6 Address Serial Register Address, e.g. 0x10 for “read_data_lo”, or 0x20 for “angle” An example is given below where register 0x20 “angle” is read from target ID [0 0 0 1] with CRC = ‘111’. The two sync pulses from the Read Response on the PWM return line are also shown. 0x20 0 0 0 0 0 0 0 0 0 0 0 01 1 1 1 1 1 Figure 34: Target ID = [0 0 0 1], “angle” = 0x20, CRC = ‘111’

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com MANCHESTER READ RESPONSE The read response transmits data from the sensor to the control- ler after a read command. These data are sent by the sensor on the open-drain PWM pin. A pull-up resistor is needed for this to work. Read from an even address returns even byte [15:8] and odd byte [7:0]. Read from an odd address returns odd byte [7:0] only. Data bits [15:8] will be zeroes. Table 11: Manchester Read Response Bits Parameter Name Description 2 ID Target ID of the responding sensor die. ‘00’ for ID0, ‘01’ for ID1, ‘10’ for ID2, ‘11’ for ID3. 1 BC flag “Broadcast”: Value set to ‘1’ if read command was a broadcast command (Target-ID set to [0 0 0 0]), ‘0’ if not 1 AE flag “Abort error”: Value set to ‘1’ if a previous transaction was aborted and discarded, typically caused by incorrect bit lengths, ‘0’ is there was no problem. The error is stored until it can be transmitted on the next read response, and is cleared afterwards.

1 OR flag “Overrun error”: If a command is sent to the sensor while the sensor is still sending a read

response, and this command is completely transmitted before the read response was finished, and overrun error has occurred. This error is then stored until it can be transmitted on the next read response, and is cleared afterwards. 1 CS flag “CRC error”: Value set to ‘1’ if a previous transaction had an incorrect CRC, ‘0’ means there was no problem. The error is stored until it can be transmitted on the next read response, and is cleared afterwards. 16 data Read from an Even address: even byte [15:8] and odd byte [7:0]. Read from an Odd address: odd byte [7:0] only. Data bits [15:8] will be zeroes. An example is given below where register 0x20 “angle” is read, and the response is ID ‘00’ (ID0), the four flags are all zeros (no errors), the data is “0x5C34”, and the CRC is ‘100’. 0x20 0x5C 0x34 0 0 1 0 0 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 1 0 1 1 1 0 0 0 0 1 1 0 1 0 1 0 00 Figure 35: ID = ‘00’, error flag = ‘0000’, Data = 0x5C34, CRC = ‘100’ MANCHESTER READ RESPONSE DELAY The Manchester Read Reponse starts at the end of the Read Command. The response may start a ¼ bit time before the CRC is finished transmitting (overlap with last CRC bit) or ¼ after the CRC finished transmitting.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com CRC The serial Manchester interface uses a cyclic redundancy check (CRC) for data-bit error checking of all the bits coming after the two synchronization bits. The synchronization bits are not included in the CRC. The CRC algorithm is based on the polyno- mial: g(x) = x 3 + x + 1. The calculation is represented graphically in Figure 36. The trail- ing 3 bits of a message frame comprise the CRC token. The CRC is initialized at 111. Data are fed into the CRC logic with MSB first. Output is sent as C2-C1-C0. Input DataC0 C1 C2 1 × x0 1 × x1 1 × x2 1 × x3 = x3 × x × 1 Figure 36: Manchester CRC Calculation The 3-bit Manchester CRC can be calculated using the following C code: // command: the manchester command, right justified, does not include the space for the CRC // numberOfBits: number of bits in the command not including the 2 zero sync bits at the start of the command and the three CRC bits // Returns: The three bit CRC // This code can be tested at http://codepad.org/yqTKnfmD uint16_t ManchesterCRC(uint64_t data, uint16_t numberOfBits) bool C0 = false; bool C1 = false; bool C2 = false; bool C0p = true; bool C1p = true; bool C2p = true; uint64_t bitMask = 1; bitMask <<= numberOfBits - 1; // Calculate the state machine for (; bitMask != 0; bitMask >>= 1) C2 = C1p; C0 = C2p ^ ((data & bitMask) != 0); C1 = C0 ^ C0p; C0p = C0; C1p = C1; C2p = C2; return (C2 ? 4U : 0U) + (C1 ? 2U : 0U) + (C0 ? 1U : 0U);

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com EEPROM AND SHADOW MEMORY USAGE The device uses EEPROM to permanently store configuration parameters for operation. EEPROM is user-programmable and permanently stores operation parameter values or customer information. The operation parameters are downloaded to shadow (volatile) memory at power-up. Shadow fields are initially loaded from corresponding fields in EEPROM, but can be overwritten, either by performing an extended write to the shadow addresses, or by reprogramming the corresponding EEPROM fields and power cycling the IC. Use of Shadow Memory is substantially faster than accessing EEPROM. In situations where many parameter need to be tested quickly, shadow memory is recom- mended for trying parameter values before permanently program- ming them into EEPROM. The shadow memory registers have the same format as the EEPROM and are accessed at extended addresses 0x40 higher than the equivalent EEPROM address. Unused bits in the EEPROM do not exist in the related shadow register, and will return 0 when read. Shadow registers do not contain the ECC bits. Shadow registers have the same protection restrictions as the EEPROM. All registers can be read without unlocking. The mapping of bits from registers addresses in EEPROM to their corresponding register addresses in SHADOW is shown in the EEPROM table (See “EEPROM table” section). Enabling EEPROM Access To enable EEPROM write access after power-on-reset, a unlock code needs to be written to the serial register “keycode”. This involves five write commands, which should be executed after each other: Write 0x00 to register 0x3C[15:8] Write 0x27 to register 0x3C[15:8] Write 0x81 to register 0x3C[15:8] Write 0x1F to register 0x3C[15:8] Write 0x77 to register 0x3C[15:8] This needs to be done once after power-on reset if the customer intends to write to the EEPROM. Writing to serial registers and reading from serial registers does not require anything special after power-on. Reading all EEPROM cells is always possible. EEPROM Write Lock It is possible to protect the EEPROM against accidental writes.

• Setting the EEPROM field “lock” to value 0xC (‘1100’ binary) will block any writes to the EEPROM, so that permanent changes are not possible anymore. Temporary changes to the setting are still possible by writing to the shadow memory, but these changes are lost after a power cycle. This lock is permanent and cannot be reversed. Reading of the settings is still possible.
• Setting the EEPROM field “lock” to value 0x3 (‘0011’ binary) will lock EEPROM writes AND shadow memory writes. This means none of the sensor settings can be changed anymore. This lock is permanent and cannot be reversed. Reading of the settings is still possible.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com EEPROM Access Exceptions and Write Lock Exceptions It is possible to allow writes to the fields “cust” and “cust2” without having to enable EEPROM access, and even when the EEPROM write lock is enabled (“lock” = 0xC or “lock” = 0x3). This is controlled using the EEPROM fields “cud” (customer uses disables), “del” (disable EEPROM lock) and “dur” (disable unlock requirement). By default, the fields “cud”, “del” and “dur” are all set to zero. Table 12 shows how these settings control EEPROM access to different fields: Table 12: EEPROM access exceptions for field “customer” and “customer2” “cud” setting “dur setting “del” setting “lock” setting Writes to Customer2 (0x17) possible… Writes to Customer (0x1F) possible… Writes to all other EEPROM possible… 0 0 0/1 0x0 after keycode after keycode after keycode 0 1 0/1 0x0 always after keycode after keycode 0 0 0 0xC/0x3 never never never 0 0 1 0xC/0x3 after keycode never never 0 1 0 0xC/0x3 never never never 0 1 1 0xC/0x3 always never never 1 0 0/1 0x0 after keycode after keycode after keycode 1 1 0/1 0x0 always always after keycode 1 0 0 0xC/0x3 never never never 1 0 1 0xC/0x3 after keycode after keycode never 1 1 0 0xC/0x3 never never never 1 1 1 0xC/0x3 always always never Write Transaction to EEPROM and Other Extended Locations Invoking an extended write access is a three-step process: 1. Write the extended address into the “ewa” register (using SPI or Manchester direct access). “ewa” is the 8-bit extended address that determines which extended memory address will be accessed. 2. Write the data that is to be transferred into the “ewd” regis- ters (using SPI or Manchester direct access). This will take four SPI writes or 2 Manchester packets to load all 32 bits of data. 3. Invoke the extended access by writing the direct “ewcs.exw” bit with ‘1’. The 32-bit of data in “ewd” are then written to the address speci- fied in “ewa”. The bit “ewcs.wdn” can be polled to determine when the write completes. This is only necessary for EEPROM writes, which can take up to 24 ms to complete. Shadow register writes complete immediately in one system clock cycle after synchronization.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com For example, to write location 0x1F in the EEPROM with 0x00A45678:

• Write 0x1F to lower 8 bits of EWA register (0x1F to EWA+1 Address 0x03) 0x43 0x1F
• Write 0x00A45678 to EWD (0x00 to EWD, 0xA4 to EWD+1, 0x56 to EWD+2, 0x78 to EWD+3) 0x44 0x00 0x45 0xA4 0x46 0x56 0x47 0x78
• Write 0x80 to EWCS 0x48 0x80
• Read EWCS+1 until bit 0 (“wdn”) is set, or wait enough time. In the example, register 0x08 is read, so that the second output byte is from register 0x09, and we wait for bit 0 to become ‘1’, which happens in the last read. 0x08 0x00 0x00 0x00 0x08 0x00 0x00 0x00 0x08 0x00 0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x00 0x01 If an access violation occurs (address not unlocked), the transaction will be terminated and the corresponding “rdn” or “wdn” bit set, and the “xee” warning bit will assert. The “xee” bit in the “err” register will also set if the EEPROM write aborts.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com After writing to the EEPROM, verify that the write was success- ful by performing an EEPROM margin check. EEPROM Margin Check Due to nonidealities in transistors, current will slowly leak into or out of EEPROM cells and can, over time, cause small changes in the stored voltage level. Variances in voltage levels of the charge pump can result in a variety of stored EEPROM cell voltages when programming. If this value is marginally close to the threshold, the small drift over lifetime can cause this value to move across the threshold. This results in a corrupted EEPROM value. Since this drift happens slowly over time, if there is an issue, it may not appear for years. For this reason, it is important to perform margin testing (margining) to verify the internal volt- age levels of EEPROM cells after programming, and ensure there will be no issue in the future. Margining is performed by Allegro on all registers at final test. Since EEPROM cell voltages are only modified when writing to the cell, it is not necessary to perform margining on registers that have not been modified. Margining is performed in two steps: the first checks the validity of the voltage stored on digital ‘1’ cells, and the second checks the voltage stored on digital ‘0’ cells. It is important to perform both steps to ensure there are no issues. In order to perform margining, a value of ‘0b0001’ must be writ- ten to the SPECIAL field of the CTRL register. This reduces the internal threshold value. Once this value is written, an EEPROM read will use this lower threshold when reading EEPROM values. Perform a read on all EEPROM registers that are being tested, and confirm they read correctly. If a stored voltage is marginal to the normal operating threshold, it will appear as a ‘1’ when it should be a ‘0’. Repeat this test with the value of ‘0b0010’ in the SPECIAL reg- ister to raise the threshold value above normal operation. Again, read all EEPROM registers being tested. In this test, any stored high voltage that is marginal to the normal threshold will appear as a ‘0’ when they should be ‘1’. If during either test, a bit is read incorrectly, simply perform another EEPROM write of the desired values to the register, and retest the margins. Unlike other values in the SPECIAL field, these values will persist and can be read to confirm the write was successful. As a result, the SPECIAL register must be cleared (or power cycled) to return the threshold value to its normal level. In the figure below, V NOM(H) represents the nominal voltage programmed into EEPROM cells containing a ‘1’, and VNOM(L) represents the nominal voltage programmed into EEPROM cells containing a ‘0’. The red and blue lines represent the actual volt- age levels in the programmed cells for ‘1’ and ‘0’ values respec- tively. As can be seen, at time 0 when the margin test is run, both high and low levels still appear to be the correct value when the threshold is moved to the margin testing levels. me VNOM(H) VNOM(L) EEP voltage VTHRESH Margin Test [H] Margin Test [L] Figure 37: Example of passing programming voltages In the figure below, the high and low voltage levels at the time of programming are further from their target. The drift over time results in these value crossing V THRESH, and becoming corrupted. At time 0 when the margin test is run, these values fail, and would be reported as errors to be reprogrammed. me VNOM(H) VNOM(L) EEP voltage VTHRESH Margin Test [H] Margin Test [L] Figure 38: Example of failing programming voltages

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Margining is shown below as a list of high level steps. For details on performing individual steps, see the associated sections. 1. Clear the ERR and WARN registers. 2. Write new data to EEPROM as desired. 3. Check the following flags for communication errors: ESE, EUE, XEE, IER, CRC, BSY . 4. Set CTRL.special to ‘0001’ and confirm by writing 0xA5 to CTRL.initiate_special. 5. Check the following flags for communication errors: ESE, EUE, XEE, IER, CRC, BSY . 6. Read all EEPROM registers changed in step 1 and verify their contents. 7. Set CTRL.special to ‘0010’ and confirm by writing 0xA5 to CTRL.initiate_special. 8. Check the following flags for communication errors: ESE, EUE, XEE, IER, CRC, BSY . 9. Read all EEPROM registers changed in step 1 and verify their contents. 10. If any values read in steps 3/5 are not what was set in step 1, repeat steps 1-6 for erroneous registers. 11. Set CTRL.special to ‘0000’, or power cycle the part.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Read Transaction from EEPROM and other Extended Locations Extended access is provided to additional memory space via the direct registers. This access includes the EEPROM and EEPROM shadow registers. All extended registers are up to 32 bits wide. Invoking an extended read access is a three-step process: 1. Write the extended address to be read into the “era” register (using SPI or Manchester direct access). “era” is the 8-bit extended address that determines which extended memory address will be accessed. 2. Invoke the extended access by writing the direct “ercs.ext” bit with ‘1’. The address specified in “era” is then read, and the data is loaded into the “erd” registers. 3. Read the “erd” registers (using SPI or Manchester direct ac- cess) to get the extended data. This will take multiple packets to get all 32 bits. EEPROM read accesses may take up to 2 µs to complete. The “ercs.rdn” bit can be polled to determine if the read access is complete before reading the data. Shadow register reads complete in one system clock cycle after synchronization. Do not attempt to read the “erd” registers if the read access is potentially in process, as it could change during the serial access and the data will be inconsistent. It is also possible that an SPI CRC error will be detected if the data changes during the serial read via the SPI interface.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com For example, to read location 0x1F in the EEPROM:

• Write 0x1F to lower 8 bits of “era” (0x1F to “era+1”, Address 0x0B) 0x4B 0x1F
• Write 0x80 to “ercs” 0x4C 0x80
• Read “ercs”+1 until bit 0 (“rdn”) is set, or wait enough time. In the example, register 0x0C is read, so that the last bit of the second output byte contains the “rdn” bit. 0x0C 0x00 0x00 0x00 0x52 0x7B 0x00 0x01
• Read “erdh” (upper 16 bits of read data)
• Read “erdl” (lower 16 bits of read data) In the example below, the result for the data at address 0x1F is 0x58A45678. In this value, □ Bit [31:26] are the EEPROM CRC □ Bit [25:24] are unused and zero □ Bit [23:0] are the EEPROM values that can be used. These are the 24 bits containing the information 0xA45678 that was written in the EEPROM write example. 0x0E 0x00 0x00 0x00 0x10 0x00 0x00 0x00 0x00 0x00 0x58 0xA4 0x00 0x00 0x56 0x78 Note that it would have been possible to pipeline transactions in this example, i.e. send a new command while reading return data from the old command. This way the transaction could have been performed in 5 SPI frames instead of 8.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Shadow Memory Read and Write Transactions Shadow memory Read and Write transactions are identical to those for EEPROM. Instead of addressing to the EEPROM extended address, one must address to the Shadow Extended addresses, which are located at an offset of 0x40 above the EEPROM. Refer to the EEPROM table for all addresses.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com SERIAL INTERFACE TABLE Table 13: Primary Serial Interface Registers Bits Map Address* (0x00) Register Symbol Read/ Write Addressed Byte (MSB) Addressed Byte + 1 (MSB) LSB Address15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0x02 ewa RW 0 0 0 0 0 0 0 0 write_adr 0x03 0x04 ewdh RW write_data_hi 0x05 0x06 ewdl RW write_data_lo 0x07 0x08 ewcs WO/RO exw 0 0 0 0 0 0 wip 0 0 0 0 0 0 0 wdn 0x09 0x0A era RW 0 0 0 0 0 0 0 0 read_adr 0x0B 0x0C ercs WO/RO exr 0 0 0 0 0 0 rip 0 0 0 0 0 0 0 rdn 0x0D 0x0E erdh RO read_data_hi 0x0F 0x10 erdl RO read_data_lo 0x11 0x12 0x14 0x16 0x18 0x1A 0x1C Unused RO 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0x13 0x15 0x17 0x19 0x1B 0x1D 0x1E ctrl RW/WO special 0 cls clw cle initiate_special 0x1F 0x20 ang RO 0 ef uv p angle 0x21 0x22 sta RO 1 0 0 0 0 0 dieid rot lpsh sdn bdn lbr cstr bip aok 0x23 0x24 err RO 1 0 1 0 war stf avg abi plk zie eue ofe uvd uva msl rst 0x25 0x26 warn RO 1 0 1 1 ier crc 0 srw xee tr ese sat tcw bsy msh tov 0x27 0x28 tsen RO 1 1 1 1 temperature 0x29 0x2A field RO 1 1 1 0 gauss 0x2B 0x2C turns RO 1 1 tsrc p turns 0x2D 0x2E toff RO 1 lat 0 p 0 turns_offset 0x2F 0x30 hang RO 0 ef uv p angle_hys 0x31 0x32 ang15 RO 0 angle_15 0x33 0x34 zang RO 0 ef uv p angle_zcd 0x35 0x36 td_high RO 0 ef tsrc p turns_delta[23:12] 0x37 0x38 td_low RO 0 ef lat p turns_delta[11:0] 0x39 0x3A ptang RO 0 ef uv p pll_turns_angle 0x3B 0x3C key WO/RO keycode 0 0 0 0 0 0 0 cul 0x3D 0x3E Unused RO 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0x3F *Addresses that span multiple bytes are addressed by the most significant byte.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com PRIMARY SERIAL INTERFACE REGISTERS REFERENCE Location 0x02:0x03 (“ewa”) ewa.write_adr The field “write_adr” is a bit field located at address 0x02[7:0]. This bit field is part of the location “ewa”. 8-bit address for extended writes. Writes require unlock. 0x00-0x1F: EEPROM (takes about 24 ms) 0x40-0x5F: Shadow Location 0x04:0x05 (“ewdh”) ewdh.write_data_hi The field “write_data_hi” is a bit field located at address 0x04[15:0]. This bit field is part of the location “ewdh”. Upper 16 bits of data for an extended write operation. Location 0x06:0x07 (“ewdl”) ewdl.write_data_lo The field “write_data_lo” is a bit field located at address 0x06[15:0]. This bit field is part of the location “ewdl”. Lower 16 bits of data for an extended write operation. Location 0x08:0x09 (“ewcs”) ewcs.wdn The field “wdn” is a bit located at address 0x08[0]. This bit is part of the location “ewcs”. Write done when wdn = ‘1’; wdn clears when exw is set to ‘1’. ewcs.wip The field “wip” is a bit located at address 0x08[8]. This bit is part of the location “ewcs”. Write in progress when ‘1’. ewcs.exw The field “exw” is a bit located at address 0x08[15]. This bit is part of the location “ewcs”. Initiate extended write by writing with ‘1’. Set “wip” and clears “wdn”. Write-only, always reads back 0. Location 0x0A:0x0B (“era”) era.read_adr The field “read_adr” is a bit field located at address 0x0A[7:0]. This bit field is part of the location “era”. 8-bit address for extended reads. 0x00-0x1F: EEPROM (takes about 2 µs) 0x40-0x5F: Shadow NOTE: After LBIST or a reload of EEPROM values, this value of read_adr will be changed. Location 0x0C:0x0D (“ercs”) ercs.rdn The field “rdn” is a bit located at address 0x0C[0]. This bit is part of the location “ercs”. Read done when ‘1’, clears when “exr” set to ‘1’. ercs.rip The field “rip” is a bit located at address 0x0C[8]. This bit is part of the location “ercs”. Read in progress when ‘1’. ercs.exr The field “exr” is a bit located at address 0x0C[15]. This bit is part of the location “ercs”. Initiate extended read by writing with ‘1’. Set “rip” and clears “rdn”. Write-only, always reads back 0. Location 0x0E:0x0F (“erdh”) erdh.read_data_hi The field “read_data_hi” is a bit field located at address 0x0E[15:0]. This bit field is part of the location “erdh”. Upper 16 bits of data from extended read operation, valid when RDN set to ‘1’.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Location 0x10:0x11 (“erdl”) erdl.read_data_lo The field “read_data_lo” is a bit field located at address 0x10[15:0]. This bit field is part of the location “erdl”. Lower 16 bits of data from extended read operation, valid when RDN set to ‘1’. Location 0x1E:0x1F (“ctrl”) ctrl.initiate_special The field “initiate_special” is a bit field located at address 0x1E[7:0]. This bit field is part of the location “ctrl”. For certain actions from “special” bit field, a code must be set to “initiate special”. These are to be written into this bit field. 0xB9 initiates CVH self-test or functional BIST. 0x46 initiates turns counter Reset. 0xA5 initiates EEPROM margin or EEPROM reload. 0x5A initiates hard reset. Read always returns 0x00. ctrl.cle The field “cle” is a bit located at address 0x1E[8]. This bit is part of the location “ctrl”. Clear error register “err” when written with ‘1’. Clears bits that were previously read from the “err”. Bits that were not yet read will not be cleared, so the user needs to read ERR first. Write- only, always returns 0. ctrl.clw The field “clw” is a bit located at address 0x1E[9]. This bit is part of the location “ctrl”. Clear warning (WARN) register when set to ‘1’. Clears bits that were previously read from the WARN, so need to read WARN first. Write-only, always returns 0. ctrl.cls The field “cls” is a bit located at address 0x1E[10]. This bit is part of the location “ctrl”. Clear bits “sdn” and “bdn” from “status” register when set to ‘1’. Write-only, returns 0 when read. ctrl.special The field “special” is a bit field located at address 0x1E[15:12]. This bit field is part of the location “ctrl”. Special actions. Some of the actions will only be invoked after the “initiate_special” field is written with the correct value. This field will return 0x00 on completion. Self-tests may be run in parallel. 0000 - No action. 0001 - Enable EEPROM low voltage margining. 0010 - Enable EEPROM high voltage margining. 0011 - Turns counter load from EWD. Starts after writing 0x46 to “initiate_special”. 0100 - Turns counter reset. Starts after writing 0x46 to “initi- ate_special”. 0101 - Reload EEPROM. Requires unlock of part. Starts after writing 0xA5 to “initiate_special”. 0110 - Enable transport mode on next LPM entry. 0111 - Hard reset. Requires unlock of part. Starts after writing 0x5A to “initiate_special”. 1001 - Run CVH self-test. Starts after writing 0xB9 to “initi- ate_special”. 1010 - Run logic BIST. Starts after writing 0xB9 to “initi- ate_special”. 1011 - Run CVH self-test and logic-BIST in parallel. Starts after writing 0xB9 to “initiate_special”. Location 0x20:0x21 (“ang”) ang.angle The field “angle” is a bit field located at address 0x20[11:0]. This bit field is part of the location “ang”. Angle from PLL after processing. Angle in degrees = unsigned 12-bit value × (360 / 4096). ang.p The field “p” is a bit located at address 0x20[12]. This bit is part of the location “ang”. Odd parity computed across all bits of this register. Value is cho- sen in such a way that there should always be an odd number of 1’s in the 16-bit word.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com ang.uv The field “uv” is a bit located at address 0x20[13]. This bit is part of the location “ang”. Undervoltage flag (real time). OR of “uva” and “uvd” undervolt- age flags. Conditions are realtime, but are masked by the Shadow mask bits. ang.ef The field “ef” is a bit located at address 0x20[14]. This bit is part of the location “ang”. Error flag – will be ‘1’ if any unmasked bit in ERR or WARN is set. Location 0x22:0x23 (“sta”) sta.aok The field “aok” is a bit located at address 0x22[0]. This bit is part of the location “sta”. Angle output OK. PLL is in lock sta.bip The field “bip” is a bit located at address 0x22[1]. This bit is part of the location “sta”. Boot in progress. sta.cstr The field “cstr” is a bit located at address 0x22[2]. This bit is part of the location “sta”. CVH self-test running. sta.lbr The field “lbr” is a bit located at address 0x22[3]. This bit is part of the location “sta”. LBIST running. sta.bdn The field “bdn” is a bit located at address 0x22[4]. This bit is part of the location “sta”. Boot complete. EEPROM loaded and any startup self-tests are complete. sta.sdn The field “sdn” is a bit located at address 0x22[5]. This bit is part of the location “sta”. Special access (from ctrl register) done. Clears to ‘0’ when SPE- CIAL triggered, set ‘1’ when complete. sta.lpsh The field “lpsh” is a bit located at address 0x22[6]. This bit is part of the location “sta”. Cannot enter low power mode, since angular speed is too high. sta.rot The field “rot” is a bit located at address 0x22[7]. This bit is part of the location “sta”. Rotation direction based on hysteresis (‘0’ = increasing angle, ‘1’ = decreasing angle). sta.dieid The field “dieid” is a bit field located at address 0x22[9:8]. This bit field is part of the location “sta”. DIE ID from EEPROM (for multi-die packages). Location 0x24:0x25 (“err”) This is the error register. All errors are latched, meaning they will remain high after they occurred just once. Errors need to be read and then cleared in order to remove them. It is important that the user clears errors, so that subsequent errors become visible. This is especially important for the “rst” error flag (reset), which is always enabled after power on. Not removing it means that an unexpected reset cannot be discovered afterwards. err.rst The field “rst” is a bit located at address 0x24[0]. This bit is part of the location “err”. Reset condition. Sets on power-on reset or on hard reset. Does not set on LBIST. err.msl The field “msl” is a bit located at address 0x24[1]. This bit is part of the location “err”. Magnetic sense low fault. Magnetic sense was below the “mag_ thres_lo” limit.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com err.uva The field “uva” is a bit located at address 0x24[2]. This bit is part of the location “err”. Undervoltage detector tripped. Will be set again after clearing if the undervoltage situation persists. Based on analog regulator. err.uvd The field “uvd” is a bit located at address 0x24[3]. This bit is part of the location “err”. Undervoltage detector tripped. Will be set again after clearing if the undervoltage situation persists. err.ofe The field “ofe” is a bit located at address 0x24[4]. This bit is part of the location “err”. Oscillator frequency watchdog tripped. err.eue The field “eue” is a bit located at address 0x24[5]. This bit is part of the location “err”. EEPROM uncorrectable error. A multi-bit EEPROM read occurred. err.zie The field “zie” is a bit located at address 0x24[6]. This bit is part of the location “err”. Zero crossing integrity error – a zero crossing did not occur within the maximum time expected, likely indicating missing magnet, an extreme rotation speed, or a sensor defect. err.plk The field “plk” is a bit located at address 0x24[7]. This bit is part of the location “err”. PLL lost lock. err.abi The field “abi” is a bit located at address 0x24[8]. This bit is part of the location “err”. ABI integrity fault. The quadrature integrity of the ABI could not be maintained. err.avg The field “avg” is a bit located at address 0x24[9]. This bit is part of the location “err”. Angle averaging error. The ORATE is too high for the velocity and the averaging is corrupted. err.stf The field “stf” is a bit located at address 0x24[10]. This bit is part of the location “err”. Self-test failure. err.war The field “war” is a bit located at address 0x24[11]. This bit is part of the location “err”. Warning. Some unmasked error bits are set in the WARN register. If WAR in mask register “MSK” is set, this will be forced to 0. Location 0x26:0x27 (“warn”) warn.tov The field “tov” is a bit located at address 0x26[0]. This bit is part of the location “warn”. Turns Counter Overflow Error. The turns counter surpassed its maximum value of ±256 full rotations. This is not dependent on the resolution of “turns” (45 or 180 degree). warn.msh The field “msh” is a bit located at address 0x26[1]. This bit is part of the location “warn”. Magnetic sense high fault. Magnetic sense has exceeded the “mag_thres_hi” limit. warn.bsy The field “bsy” is a bit located at address 0x26[2]. This bit is part of the location “warn”. Extended access overflow. An EXW or EXR was initiated while previous extended read or write was in progress. warn.tcw The field “tcw” is a bit located at address 0x26[3]. This bit is part of the location “warn”. Turns counter warning (over ±135 degrees delta).

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com warn.sat The field “sat” is a bit located at address 0x26[4]. This bit is part of the location “warn”. Aggregate saturation flag. Shows that any internal signals have saturated, likely to have been cause by extremely strong or weak fields. warn.ese The field “ese” is a bit located at address 0x26[5]. This bit is part of the location “warn”. EEPROM soft error. A correctable (single-bit) EEPROM read occurred. warn.tr The field “tr” is a bit located at address 0x26[6]. This bit is part of the location “warn”. Temperature out of range. The temperature sensor calculated a temperature below –60°C or above 180°C. Temperature will saturate at those limits. warn.xee The field “xee” is a bit located at address 0x26[7]. This bit is part of the location “warn”. Extended execute error. A command intiated by an extended write failed. Write failed due to access error (not unlocked) or EEPROM write failure. warn.srw The field “srw” is a bit located at address 0x26[8]. This bit is part of the location “warn”. Slew rate warning. This warning is asserted if the ABI slew rate limiting is enabled and a condition that requires the limiting to be applied has occurred. warn.crc The field “crc” is a bit located at address 0x26[10]. This bit is part of the location “warn”. Incoming SPI CRC error. Packet was discarded. warn.ier The field “ier” is a bit located at address 0x26[11]. This bit is part of the location “warn”. Interface error. Invalid number of bits in SPI packet, or bit 15 of MOSI data = ‘1’. Packet was discarded. Also Manchester error. Location 0x28:0x29 (“tsen”) tsen.temperature The field “temperature” is a bit field located at address 0x28[11:0]. This bit field is part of the location “tsen”. Current junction temperature from internal temperature sensor relative to 25°C (signed value). Value is in 1/8 of a degree. Tem- perature °C = (tsen.temperature / 8) + 25.0. Location 0x2A:0x2B (“field”) field.gauss The field “gauss” is a bit field located at address 0x2A[11:0]. This bit field is part of the location “field”. Field strength in gauss. Location 0x2C:0x2D (“trns”) trns.turns The field “turns” is a bit field located at address 0x2C[11:0]. This bit field is part of the location “trns”. Turns counter – signed 45 or 180 degree increments. trns.p The field “p” is a bit located at address 0x2C[12]. This bit is part of the location “trns”. Odd parity computed across all bits of this register. Value is cho- sen in such a way that there should always be an odd number of 1’s in the 16-bit word. trns.tsrc The field “tsrc” is a bit located at address 0x2C[13]. This bit is part of the location “trns”. Turns Source. Set to ‘1’ to use accurate PLL as turns counter source in normal power mode (recommended). Set to ‘0’ to use ZCD angle as turns counter source in normal power mode (not recommended).

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Location 0x2E:0x2F (“toff”) toff.turns_offset The field “turns_offset” is a bit field located at address 0x2E[10:0]. This bit field is part of the location “toff”. This is either the 11 or 9 LSBs of the turns_delta register, depend- ing on a 180 or 45 degree turns configuration. toff.p The field “p” is a bit located at address 0x2E[12]. This bit is part of the location “toff”. Odd parity computed across all bits of this register. Value is cho- sen in such a way that there should always be an odd number of 1’s in the 16-bit word. toff.lat The field “lat” is a bit located at address 0x2E[14]. This bit is part of the location “toff”. Indicates that the “turns_offset” field is latched. If ‘1’, indicates that the word “toff” was latched on a prior read of the “turns” register, and is consistent with that reading. Will return to ‘0’ after reading. Location 0x30:0x31 (“hang”) hang.angle_hys The field “angle_hys” is a bit field located at address 0x30[11:0]. This bit field is part of the location “hang”. Angle from PLL after processing. Angle in degrees = unsigned 12-bit value × (360 / 4096). hang.p The field “p” is a bit located at address 0x30[12]. This bit is part of the location “hang”. Odd parity computed across all bits of this register. Value is cho- sen in such a way that there should always be an odd number of 1’s in the 16-bit word. hang.uv The field “uv” is a bit located at address 0x30[13]. This bit is part of the location “hang”. Undervoltage flag (real time). OR of analog and digital UV flags. Conditions are realtime, but are masked by the Shadow mask bits. hang.ef The field “ef” is a bit located at address 0x30[14]. This bit is part of the location “hang”. Error flag – will be ‘1’ if any unmasked bit in ERR or WARN is set. Location 0x32:0x33 (“ang15”) ang15.angle_15 The field “angle_15” is a bit field located at address 0x32[14:0]. This bit field is part of the location “ang15”. 15-bit compensated angle (not rounded). Location 0x34:0x35 (“zang”) zang.angle_zcd The field “angle_zcd” is a bit field located at address 0x34[11:0]. This bit field is part of the location “zang”. Angle from zero-crossing-detector, which is used to verify that the PLL angle is correct. This angle always used for turns counter in used in low power mode, and for turns counter source in normal power mode in case tsrc = 0. Angle in degrees = unsigned 12-bit value × (360 / 4096). zang.p The field “p” is a bit located at address 0x34[12]. This bit is part of the location “zang”. Odd parity computed across all bits of this register. Value is cho- sen in such a way that there should always be an odd number of 1’s in the 16-bit word. zang.uv The field “uv” is a bit located at address 0x34[13]. This bit is part of the location “zang”. Undervoltage flag (real time). OR of analog and digital UV flags. Conditions are realtime, but are masked by the Shadow mask bits. zang.ef The field “ef” is a bit located at address 0x34[14]. This bit is part of the location “zang”. Error flag - will be ‘1’ if any unmasked bit in ERR or WARN is set.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Location 0x36:0x37 (“td_high”) When reading “td_high”, the contents of “td_low” will be locked. This is done so that the values of the two words are matching. To get a correct reading of the entire turns delta, the customer must first read “td_high” and then read “td_low” td_high.turns_delta_high The field “turns_delta_high” is a bit field located at address 0x36[11:0]. This bit field is part of the location “td_high”. Upper 9 bits (sign extended to 12) of the turns delta counter. td_high.p The field “p” is a bit located at address 0x36[12]. This bit is part of the location “td_high”. Odd parity computed across all bits of this register. Value is cho- sen in such a way that there should always be an odd number of 1’s in the 16-bit word. td_high.tsrc1 The field “tsrc1” is a bit located at address 0x36[13]. This bit is part of the location “td_high”. Turns Source. Set to ‘1’ to use accurate PLL as turns counter source in normal power mode (recommended). Set to ‘0’ to use ZCD angle as turns counter source in normal power mode (not recommended). td_high.ef The field “ef” is a bit located at address 0x36[14]. This bit is part of the location “td_high”. Error flag – will be ‘1’ if any unmasked bit in ERR or WARN is set. Location 0x38:0x39 (“td_low”) td_low.turns_delta_low The field “turns_delta_low” is a bit field located at address 0x38[11:0]. This bit field is part of the location “td_low”. Lower 12 bits of the turns delta counter. This is the angle offset at 12-bit resolution. td_low.p The field “p” is a bit located at address 0x38[12]. This bit is part of the location “td_low”. Odd parity computed across all bits of this register. Value is cho- sen in such a way that there should always be an odd number of 1’s in the 16-bit word. td_low.lat1 The field “lat1” is a bit located at address 0x38[13]. This bit is part of the location “td_low”. Indicates that the “td_low” field is latched. If ‘1’, indicates that “td_low” was latched on a prior read of the “td_high” register, and is consistent with that reading. Will return to ‘0’ after read- ing. td_low.ef The field “ef” is a bit located at address 0x38[14]. This bit is part of the location “td_low”. Error flag – will be ‘1’ if any unmasked bit in ERR or WARN is set.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Location 0x3A:0x3B (“ptang”) ptang.pll_turns_angle The field “pll_turns_angle” is a bit field located at address 0x3A[11:0]. This bit field is part of the location “ptang”. Angle from PLL after processing, as used for the turns counter. May have hystersis based on “h2a” configuration in EEPROM. Angle in degrees = unsigned 12-bit value × (360 / 4096). ptang.p The field “p” is a bit located at address 0x3A[12]. This bit is part of the location “ptang”. Odd parity computed across all bits of this register. Value is cho- sen in such a way that there should always be an odd number of 1’s in the 16-bit word. ptang.uv The field “uv” is a bit located at address 0x3A[13]. This bit is part of the location “ptang”. Undervoltage flag (real time). OR of analog and digital UV flags. Conditions are realtime, but are masked by the Shadow mask bits. ptang.ef The field “ef” is a bit located at address 0x3A[14]. This bit is part of the location “ptang”. Error flag – will be ‘1’ if any unmasked bit in ERR or WARN is set. Location 0x3C:0x3D (“key”) key.cul The field “cul” is a bit located at address 0x3C[0]. This bit is part of the location “key”. Customer unlocked if ‘1’. key.keycode The field “keycode” is a bit field located at address 0x3C[15:8]. This bit field is part of the location “key”. Customer access keycode is entered here, using five subsequent write commands with the numbers: 0x00, 0x27, 0x81, 0x1F, 0x77. Always reads back 0.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com EEPROM AND SHADOW REGISTER TABLE Table 14: EEPROM / Shadow Memory Map Shadow Memory Address EEPROM Address Register Name Bits 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 – 0x17 CU2 customer 2 0x58 0x18 PWE zcd_turns_offset tov tr msh sat ese msl uv avg zie plk stf eue ofe 0x59 0x19 ABI – – abi_slew_time inv – – ahe – – index_mode wdh plh ioe uvw resolution_pairs 0x5A 0x1A MSK ierm crcm – srwm xeem trm esem satm tcwm bsym mshm tovm warm stfm avgm abim plkm ziem euem ofem uvdm uvam mslm rstm 0x5B 0x1B PWI pen pwm_band pwm_freq - phe peo pes eli ls wp_hys zal wp_thres dm h2t s17 sc 0x5C 0x1C ANG orate rd ro hysteresis zero_offset 0x5D 0x1D LPC t45 tcp tpmd lpmd turns_init lpm_cycle_time lpt lpm_wake_threshold 0x5E 0x1E COM lock lbe cse dur del - cud dst dhr mag_thres_hi mag_thres_lo – 0x1F CUS customer 0x60 0x20 LIN00 Linearization Error Segment 1 Linearization Error Segment 0 0x61 0x21 LIN01 Linearization Error Segment 3 Linearization Error Segment 2 … … … … --- 0x6E 0x2E LIN14 Linearization Error Segment 29 Linearization Error Segment 28 0x6F 0x2F LIN15 Linearization Error Segment 31 Linearization Error Segment 30 0x80 – ALV Alive counter The EEPROM register bitmap is shown below. Addresses that span multiple bytes are addressed by the most significant byte. All EEPROM content can be read by the user. The EEPROM ECC field in bits [31:26] of each word are not shown here. Bits [25:24] of each EEPROM word are unused and not shown here, but are included in the ECC.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com EEPROM REFERENCE Location 0x17 (“CU2”) Customer useable field, intended for storing data or turns counter. This word can be written even if EEPROM is locked. Write may be allowed without the unlock code based on COM.dur and COM.del settings (see word 0x1E). CU2.customer 2 The field “customer 2” is a bit field located at address 0x17[23:0]. This bit field is part of the location “CU2”. Customer-useable field, intended for storing data or turns counter. Depending on COM.dur and COM.del settings, this word can be written even if EEPROM is locked. Details are given in the chapter “EEPROM write lock”. Location 0x18 (“PWE”) PWE.ofe The field “ofe” is a bit located at address 0x18[0]. This bit is part of the location “PWE”. PWM oscillator frequency watchdog error enable. Duty cycle output 5% at half the selected PWM frequency. PWE.eue The field “eue” is a bit located at address 0x18[1]. This bit is part of the location “PWE”. PWM EEPROM uncorrectable error enable. Duty cycle 10.625% at half the selected PWM frequency. PWE.stf The field “stf” is a bit located at address 0x18[2]. This bit is part of the location “PWE”. PWM self-test failure error enable. Duty cycle 16.25% at half the selected PWM frequency. PWE.plk The field “plk” is a bit located at address 0x18[3]. This bit is part of the location “PWE”. PWM PLL Lost Lock error enable. Duty cycle 21.875% at half the selected PWM frequency. PWE.zie The field “zie” is a bit located at address 0x18[4]. This bit is part of the location “PWE”. PWM zero crossing integrity error enable. Duty cycle 27.5% at half the selected PWM frequency. PWE.avg The field “avg” is a bit located at address 0x18[5]. This bit is part of the location “PWE”. PWM angle averaging error enable. Duty cycle is 33.125% at half the selected PWM frequency. PWE.uv The field “uv” is a bit located at address 0x18[6]. This bit is part of the location “PWE”. PWM undervoltage Fault enable (analog or digital). Duty cycle 38.75% at half the selected PWM frequency. PWE.msl The field “msl” is a bit located at address 0x18[7]. This bit is part of the location “PWE”. PWM magnetic Sense Low Fault enable. Duty cycle 44.375% at half the selected PWM frequency. PWE.ese The field “ese” is a bit located at address 0x18[8]. This bit is part of the location “PWE”. PWM EEPROM Soft Error enable. Duty cycle 50% at half the selected PWM frequency. PWE.sat The field “sat” is a bit located at address 0x18[9]. This bit is part of the location “PWE”. PWM saturation warning enable. Duty cycle 55.625% at half the selected PWM frequency. PWE.msh The field “msh” is a bit located at address 0x18[10]. This bit is part of the location “PWE”. PWM magnetic sense high fault enable. Duty cycle 61.25% at half the selected PWM frequency.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com PWE.tr The field “tr” is a bit located at address 0x18[11]. This bit is part of the location “PWE”. PWM temperature sensor out of range error enable. Duty cycle 66.875% at half the selected PWM frequency. PWE.tov The field “tov” is a bit located at address 0x18[12]. This bit is part of the location “PWE”. PWM turns counter overflow error enable. Duty cycle 72.5% at half the selected PWM frequency. PWE.zcd_turns_offset The field “zcd_turns_offset” is a bit field located at address 0x18[23:13]. This bit field is part of the location “PWE”. Offset to ZCD angle for purposes of aligning for turns counting. This is 11-bit angle resolution and is added to the ZCD angle for turns purposes. If turns is configured to use the PLL (TCP = 1), it is important to use this to align the ZCD close to the PLL angle. The value is already calibrated at Allegro factory. However, if “zero_offset” is changed, linearization is used, “rd” is changed, or “ro” is changed, recalibrating this value may be needed. To recalibrate the “zcd_turns_offset” value, read output registers “angle” and “angle_zcd” and take the 12 LSB from these regis- ters. Calculate the new value of zcd_turns_offset using these two measurements as follows: “zcd_turns_offset” = mod( ( (mod((“angle” – “angle_zcd”),4096) / 2) + “zcd_turns_offset”), 2048) In the formula above, the division by two was included to com- pensate for the fact that the angle resolution is 12-bit, while the zcd_turns_offset resolution is 11-bit. A completely perfect alignment is not necessary and not even possible when using linearization. However, gross misalignments of >180° will cause errors in turns counting in combination with low power mode if “tcp” = 1. Location 0x19 (“ABI”) ABI.resolution_pairs The field “resolution_pairs” is a bit field located at address 0x19[3:0]. This bit field is part of the location “ABI”. ABI or UVW resolution. If ABI selected, this selects AB cycle counts per rotation. Cycle count = 2 (14–n) where n is selected code. If UVW selected, this is the number of pole pairs – 1. ABI.uvw The field “uvw” is a bit located at address 0x19[4]. This bit is part of the location “ABI”. Incremental outputs UVW (1), ABI (0). ABI.ioe The field “ioe” is a bit located at address 0x19[5]. This bit is part of the location “ABI”. Incremental output pins enable (see UVW). ABI.plh The field “plh” is a bit located at address 0x19[6]. This bit is part of the location “ABI”. Enable ABI all high (before inversions) as error mode if PLL is unlocked. ABI.wdh The field “wdh” is a bit located at address 0x19[7]. This bit is part of the location “ABI”. Enable ABI all high (before inversions) as error mode if high- frequency watchdog trips. ABI.index_mode The field “index_mode” is a bit field located at address 0x19[9:8]. This bit field is part of the location “ABI”. ABI index mode, defines width and placement of index pulse. Mode 0: Angle = 0 Mode 1: Angle = –R or 0 Mode 2: Angle = –R, 0 or +R Mode 3: Angle = –2R, –R, 0 or +R

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com ABI.ahe The field “ahe” is a bit located at address 0x19[12]. This bit is part of the location “ABI”. ABI hysteresis enable. If 1, use hysteresis on angle going to ABI. ABI.inv The field “inv” is a bit located at address 0x19[15]. This bit is part of the location “ABI”. Invert ABI or UVW signals. ABI.abi_slew_time The field “abi_slew_time” is a bit field located at address 0x19[21:16]. This bit field is part of the location “ABI”. ABI slew rate limit. ‘0’ mean slew rate limiter is disabled. Oth- erwise, (N + 1) × 125 ns (nominal) is the minimum edge-to-edge time for the ABI output. This limits the maximum ABI velocity. Reducing the ABI output resolution may be useful to counteract this effect. Location 0x1A (“MSK”) MSK.rstm The field “rstm” is a bit located at address 0x1A[0]. This bit is part of the location “MSK”. Reset mask. If set to ‘1’, the corresponding error will not affect the error flag “ef”. MSK.mslm The field “mslm” is a bit located at address 0x1A[1]. This bit is part of the location “MSK”. Magnetic Sense Low Fault Mask. If set to ‘1’, the corresponding error will not affect the error flag “ef”. MSK.uvam The field “uvam” is a bit located at address 0x1A[2]. This bit is part of the location “MSK”. Analog undervoltage Fault Mask. If set to ‘1’, the corresponding error will not affect the error flag “ef”. MSK.uvdm The field “uvdm” is a bit located at address 0x1A[3]. This bit is part of the location “MSK”. Digital undervoltage Fault Mask. If set to ‘1’, the corresponding error will not affect the error flag “ef”. MSK.ofem The field “ofem” is a bit located at address 0x1A[4]. This bit is part of the location “MSK”. Oscillator frequency watchdog error mask. If set to ‘1’, the cor- responding error will not affect the error flag “ef”. MSK.euem The field “euem” is a bit located at address 0x1A[5]. This bit is part of the location “MSK”. EEPROM uncorrectable error mask. If set to ‘1’, the correspond- ing error will not affect the error flag “ef”. MSK.ziem The field “ziem” is a bit located at address 0x1A[6]. This bit is part of the location “MSK”. Zero crossing integrity error mask. If set to ‘1’, the corresponding error will not affect the error flag “ef”. MSK.plkm The field “plkm” is a bit located at address 0x1A[7]. This bit is part of the location “MSK”. PLL Lost Lock error mask. If set to ‘1’, the corresponding error will not affect the error flag “ef”. MSK.abim The field “abim” is a bit located at address 0x1A[8]. This bit is part of the location “MSK”. ABI integrity fault mask. If set to ‘1’, the corresponding error will not affect the error flag “ef”. MSK.avgm The field “avgm” is a bit located at address 0x1A[9]. This bit is part of the location “MSK”. Angle averaging fault mask. If set to ‘1’, the corresponding error will not affect the error flag “ef”.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com MSK.stfm The field “stfm” is a bit located at address 0x1A[10]. This bit is part of the location “MSK”. Self-test failure error mask. If set to ‘1’, the corresponding error will not affect the error flag “ef”. MSK.warm The field “warm” is a bit located at address 0x1A[11]. This bit is part of the location “MSK”. If set to 1, will not set WAR bit in the ERR register when unmasked warnings are present. MSK.tovm The field “tovm” is a bit located at address 0x1A[12]. This bit is part of the location “MSK”. Turns Counter Overflow Error Mask. If set to ‘1’, the correspond- ing error will not affect the error flag “ef”. MSK.mshm The field “mshm” is a bit located at address 0x1A[13]. This bit is part of the location “MSK”. Magnetic Sense High Fault Mask. If set to ‘1’, the corresponding error will not affect the error flag “ef”. MSK.bsym The field “bsym” is a bit located at address 0x1A[14]. This bit is part of the location “MSK”. Indirect access busy error mask. If set to ‘1’, the corresponding error will not affect the error flag “ef”. MSK.tcwm The field “tcwm” is a bit located at address 0x1A[15]. This bit is part of the location “MSK”. Turns counter warning mask. If set to ‘1’, the corresponding error will not affect the error flag “ef”. MSK.satm The field “satm” is a bit located at address 0x1A[16]. This bit is part of the location “MSK”. Aggregate saturation flag mask. If set to ‘1’, the corresponding error will not affect the error flag “ef”. MSK.esem The field “esem” is a bit located at address 0x1A[17]. This bit is part of the location “MSK”. EEPROM Soft Error Mask. If set to ‘1’, the corresponding error will not affect the error flag “ef”. MSK.trm The field “trm” is a bit located at address 0x1A[18]. This bit is part of the location “MSK”. Temp sensor out of range error mask. If set to ‘1’, the correspond- ing error will not affect the error flag “ef”. MSK.xeem The field “xeem” is a bit located at address 0x1A[19]. This bit is part of the location “MSK”. Execute Error Mask. If set to ‘1’, the corresponding error will not affect the error flag “ef”. MSK.srwm The field “srwm” is a bit located at address 0x1A[20]. This bit is part of the location “MSK”. Slew rate warning mask. If set to ‘1’, the corresponding error will not affect the error flag “ef”. MSK.crcm The field “crcm” is a bit located at address 0x1A[22]. This bit is part of the location “MSK”. CRC Error Mask (SPI). If set to ‘1’, the corresponding error will not affect the error flag “ef”. MSK.ierm The field “ierm” is a bit located at address 0x1A[23]. This bit is part of the location “MSK”. Interface Error Mask. If set to ‘1’, the corresponding error will not affect the error flag “ef”.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Location 0x1B (“PWI”) PWI.sc The field “sc” is a bit located at address 0x1B[0]. This bit is part of the location “PWI”. SPI CRC (incoming) validated if SC = 1, ignored if SC = 0. PWI.s17 The field “s17” is a bit located at address 0x1B[1]. This bit is part of the location “PWI”. SPI ignore 17th clock to allow negative edge host sampling. PWI.h2t The field “h2t” is a bit located at address 0x1B[2]. This bit is part of the location “PWI”. Turns uses hysteresis if 1. 0 - Use non-hysteresis angle for turns counter 1 - Use hysteresis angle for turns counter This affects serial register TANG (0x3A). PWI.dm The field “dm” is a bit located at address 0x1B[3]. This bit is part of the location “PWI”. Disable Manchester interface. If ‘1’, any Manchester input on VCC will be ignored. PWI.wp_thres The field “wp_thres” is a bit field located at address 0x1B[6:4]. This bit field is part of the location “PWI”. WAKE pin voltage threshold. PWI.zal The field “zal” is a bit located at address 0x1B[7]. This bit is part of the location “PWI”. Zero offset after linearization: 0 = Before linearization and rotation 1 = After linearization PWI.wp_hys The field “wp_hys” is a bit field located at address 0x1B[9:8]. This bit field is part of the location “PWI”. WAKE pin hysteresis. PWI.ls The field “ls” is a bit located at address 0x1B[10]. This bit is part of the location “PWI”. Linearization scale: 0 = ±22.5 degrees 1 = ±45 degrees PWI.eli The field “eli” is a bit located at address 0x1B[11]. This bit is part of the location “PWI”. Enable linearization: 0 = Disabled 1 = Enabled Note: If “zero_offset” is changed, linearization is used, “rd” is changed, or “ro” is changed, recalibrating “zcd_turns_offset” may be needed. Read the documentation of “zcd_turns_offset” for further information. PWI.pes The field “pes” is a bit located at address 0x1B[12]. This bit is part of the location “PWI”. PWM error select (if “peo” = 1). 0 - PWM tristated, must reset (or set “peo” back to 0 in shadow) to release the PWM output. 1 - PWM carrier frequency halved and highest priority error output on PWM as selected duty cycle. See “PWM Output” section for more details. PWI.peo The field “peo” is a bit located at address 0x1B[13]. This bit is part of the location “PWI”. PWM error output enable. If ‘1’, “pes” selects the response to an enabled error (see “abe” word). PWI.phe The field “phe” is a bit located at address 0x1B[14]. This bit is part of the location “PWI”. PWM hysteresis enable. If 1, use hysteresis on angle going to PWM.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com PWI.pwm_freq The field “pwm_freq” is a bit field located at address 0x1B[19:16]. This bit field is part of the location “PWI”. PWM frequency select. See “PWM Output” section for more details. PWI.pwm_band The field “pwm_band” is a bit field located at address 0x1B[22:20]. This bit field is part of the location “PWI”. PWM frequency band. See “PWM Output” section for more details. PWI.pen The field “pen” is a bit located at address 0x1B[23]. This bit is part of the location “PWI”. PWM Enable = 1. If 0, PWM is tristate. Location 0x1C (“ANG”) ANG.zero_offset The field “zero_offset” is a bit field located at address 0x1C[11:0]. This bit field is part of the location “ANG”. Post-compensation zero offset (or DC adjust) at angle resolution. This value is subtracted from the measured angle. Note: If “zero_offset” is changed, linearization is used, “rd” is changed, or “ro” is changed, recalibrating “zcd_turns_offset” may be needed. Read the documentation of “zcd_turns_offset” for further information. ANG.hysteresis The field “hysteresis” is a bit field located at address 0x1C[17:12]. This bit field is part of the location “ANG”. Angle hysteresis threshold, angle resolution × 4 (14 bit). Range is about 0 to 1.384 degrees. ANG.ro The field “ro” is a bit located at address 0x1C[18]. This bit is part of the location “ANG”. Rotation Direction (post-linearization). If set to 0, increasing angle movement is in the clockwise direction when looking down on the top of the die. If set to 1, increasing angle movement is in the counter-clockwise direction. Note: If “zero_offset” is changed, linearisation is used, “rd” is changed, or “ro” is changed, recalibrating “zcd_turns_offset” may be needed. Read the documentation of “zcd_turns_offset” for further information. ANG.rd The field “rd” is a bit located at address 0x1C[19]. This bit is part of the location “ANG”. Rotate die. Rotates final angle by 180 degrees. This is the very last step in the angle processing algorithm. The sensor is Allegro factory-calibrated to deliver identical field directions for both dies. If the user want the two outputs to be 180° offset from each other, this setting is a convenient way to do so. Note: If “zero_offset” is changed, linearisation is used, “rd” is changed, or “ro” is changed, recalibrating “zcd_turns_offset” may be needed. Read the documentation of “zcd_turns_offset” for further information. ANG.orate The field “orate” is a bit field located at address 0x1C[23:20]. This bit field is part of the location “ANG”. Reduces the output rate by averaging samples. 2 orate samples will be averaged. ORATE values above 12 are reduced to 12 in the logic, meaning that up to 4096 samples = 4 ms can be selected as averaging time.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Location 0x1D (“LPC”) LPC.lpm_wake_threshold The field “lpm_wake_threshold” is a bit field located at address 0x1D[10:0]. This bit field is part of the location “LPC”. Minimum sample-to-sample angle difference in low power mode to force a switch to normal power mode. Also used as maximum angle difference in normal power mode to decide if the device can enter low power mode. In both cases, the angle difference is calculated over the time given in “lpm_cycle_time”. Resolu- tion is 11 bit, for values of 0 to 180 degrees, with resolution of (360/4096) degrees per LSB. Setting values close to 180 degrees can result in dangerous ambiguity and is not recommended. LPC.tcp The field “tcp” is a bit located at address 0x1D[11]. This bit is part of the location “LPC”. Turns counter PLL: 0 = Turns uses ZCD angle. 1 = Turns uses PLL except during LPM and if PLL lock is lost. Make sure the “ZCD_TURNS_OFFSET” aligns the ZCD angle close to the PLL angle. LPC.lpt The field “lpt” is a bit located at address 0x1D[11]. This bit is part of the location “LPC”. Low power transport: 0 = Low power mode requires CTRL to enable transport mode. 1 = Low power mode (SPI pins low) automatically enters trans- port mode. LPC.lpm_cycle_time The field “lpm_cycle_time” is a bit field located at address 0x1D[17:12]. This bit field is part of the location “LPC”. Low power cycle time in 8.192 ms increments with cycle time = [(N + 1) × 8.192 ms]. Also determines the Alive counter incre- ment rate. LPC.turns_init The field “turns_init” is a bit field located at address 0x1D[19:18]. This bit field is part of the location “LPC”. Turns initialization at power-up. 00, 01 = Turns counter zeroed at power-up. 10 = Turns counter set to full settled angle (turns register may be non-zero). 11 = Turns counter set to settled angle offset from 180 or 45 configuration (MSB 10 or 12 bits zeroed), turns register will start out zero. LPC.lpmd The field “lpmd” is a bit located at address 0x1D[20]. This bit is part of the location “LPC”. Disable low power mode if ‘1’. LPC.tpmd The field “tpmd” is a bit located at address 0x1D[21]. This bit is part of the location “LPC”. Disable transport mode if ‘1’. LPC.t45 The field “t45” is a bit located at address 0x1D[23]. This bit is part of the location “LPC”. Turns counter steps at 45 degree boundaries if 1. 180 degree boundaries if 0.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Location 0x1E (“COM”) COM.mag_thres_lo The field “mag_thres_lo” is a bit field located at address 0x1E[5:0]. This bit field is part of the location “COM”. Magnetic field low comparator value, field value equals low field error threshold in gauss divided by 16. If set to 0, low threshold is disabled. 00 0000: Low field flag disabled 00 0001: 16 gauss 00 0010: 32 gauss 00 1101: 208 gauss (factory setting) 11 1111: 1108 gauss COM.mag_thres_hi The field “mag_thres_hi” is a bit field located at address 0x1E[11:6]. This bit field is part of the location “COM”. Magnetic field high comparator value, field value equals maxi- mum field threshold in gauss divided by 32. If set to 0, high threshold is disabled. 00 0000: High field flag disabled 00 0001: 32 gauss 00 0010: 64 gauss 10 0101: 1184 gauss (factory setting) 11 1111: 2016 gauss COM.dhr The field “dhr” is a bit located at address 0x1E[12]. This bit is part of the location “COM”. Disable hard reset in serial CTRL register special if ‘1’. COM.dst The field “dst” is a bit located at address 0x1E[13]. This bit is part of the location “COM”. Disable self-test initiation in serial CTRL register special if ‘1’. COM.cud The field “cud” is a bit located at address 0x1E[14]. This bit is part of the location “COM”. If ‘1’, the “customer” word 0x1F will use the “dur” and “del” configuration in addition to the “customer2” word 0x17. COM.del The field “del” is a bit located at address 0x1E[16]. This bit is part of the location “COM”. Disable EEPROM lock for CUST2 (EEPROM word 0x17) and, if CUD = 1, CUST word 0x1F. EEPROM lock will not affect write- ability of word 0x17 (and 0x1F if enabled). Intended for turns counter savings. COM.dur The field “dur” is a bit located at address 0x1E[17]. This bit is part of the location “COM”. Disable unlock requirement for CUST2 (EEPROM word 0x17) and if CUD = 1, CUST word 0x1F. COM.cse The field “cse” is a bit located at address 0x1E[18]. This bit is part of the location “COM”. Enable CVH self-test at power-up. COM.lbe The field “lbe” is a bit located at address 0x1E[19]. This bit is part of the location “COM”. Power-up logic BIST enable. COM.lock The field “lock” is a bit field located at address 0x1E[23:20]. This bit field is part of the location “COM”. Lock options:

1100 Lock EEPROM writes

0011 Lock EEPROM writes AND indirect register writes.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Location 0x1F (“CUS”) CUS.customer The field “customer” is a bit field located at address 0x1F[23:0]. This bit field is part of the location “CUS”. Customer-useable field, intended for storing data. With certain settings, this word can be written even if EEPROM is locked. Details are given in the chapter “EEPROM Write Lock”. If COM.cud = ‘1’, then, depending on COM.dur and COM.del settings, this word can be written even if EEPROM is locked. Details are given in the section “EEPROM Write Lock”. Location 0x20 (“LIN00”) LIN00.Linearization Error Segment 0 The field “Linearization Error Segment 0” is a bit field located at address 0x20[11:0]. This bit field is part of the location “LIN00”. Correction value at segment boundary. Signed, resolution is based on LS bit. Will be subtracted from sensor angle to produce linearized angle. For LS = 0, range is ±22.5 degrees. For LS = 1, range is ±45 degrees. LIN00.Linearization Error Segment 1 The field “Linearization Error Segment 1” is a bit field located at address 0x20[23:12]. This bit field is part of the location “LIN00”. Correction value at segment boundary. Signed, resolution is based on LS bit. Will be subtracted from sensor angle to produce linearized angle. For LS = 0, range is ±22.5 degrees. For LS = 1, range is ±45 degrees. NOTE: linearization segments 2…29 have been omitted from the datasheet for reasons of brevity. Location 0x2F (“LIN15”) LIN15.Linearization Error Segment 30 The field “Linearization Error Segment 30” is a bit field located at address 0x2F[11:0]. This bit field is part of the location “LIN15”. Correction value at segment boundary. Signed, resolution is based on LS bit. Will be subtracted from sensor angle to produce linearized angle. For LS = 0, range is ±22.5 degrees. For LS = 1, range is ±45 degrees. LIN15.Linearization Error Segment 31 The field “Linearization Error Segment 31” is a bit field located at address 0x2F[23:12]. This bit field is part of the location “LIN15”. Correction value at segment boundary. Signed, resolution is based on LS bit. Will be subtracted from sensor angle to produce linearized angle. For LS = 0, range is ±22.5 degrees. For LS = 1, range is ±45 degrees. Location 0x80 (“ALV”) ALV.alive counter The field “alive counter” is a bit field located at address 0x80[31:0]. This bit field is part of the location “ALV”. Alive counter is a 32-bit counter, which increments periodically from zero after power-on or hard reset. The alive increment period is based on the EEPROM lpm_cycle_time, which has a resolution of 8.192 ms. The alive counter can overflow. The overflow period of the counter is [232 × 8.192 × (lpm_cycle_time + 1)] millisec- onds. At cycle_time = 0, this period is approximately 400 days.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com SAFETY AND DIAGNOSTICS The AAS33051 was developed in accordance to the ASIL design flow. It incorporates several diagnostics. Alive Counter A 32-bit counter increments periodically from zero after power-on or hard reset. It is read via an extended read at address 0x80. The alive increment period is based on the EEPROM lpm_cycle_time, which has a resolution of 8.192 ms. The alive counter can overflow. The overflow period of the counter is [2 32 × 8.192 × (lpm_cycle_time + 1)] milliseconds. At lpm_cycle_time = 0, this period is approximately 400 days. Oscillator Watchdogs The watchdogs run constantly when in full power or “wake” modes. They are disabled during sleep mode, and are reset when waking up to ensure there is not a false positive due to a partial clock count. These watchdogs are intended to detect gross fail- ures of either oscillator. Logic running on clocks based on each oscillator effectively counts clock periods produced in the other clock domain and compares to expected limits. Logic Built-In Self-Test (LBIST) Logic BIST is implemented to verify the integrity of the AAS33051 logic. It can be executed in parallel with the CVH self-test. LBIST is effectively a form of auto-driven scan. The logic to be tested is broken into 31 scan chains. The chains are fed in parallel by a 31-bit linear feedback shift register (LFSR) to generate pseudo-random data. The output of the scan chains are fed back into a multiple input shift register (MISR) that accumu- lates the shifted bits into a 31-bit signature. LBIST takes typically 30 ms to verify. CVH Self-Test CVH self-test is a method of verifying the operation of the CVH transducer without applying an external magnetic field. This feature is useful for both manufacturing test and for integration debug. The CVH self-test is implemented by changing the switch configuration from the normal operating mode into a test configu- ration, allowing a test current to drive the CVH in place of the magnetic field. By changing the direction of the test current and by changing the elements in the CVH that are driven, the self-test circuit emulates a changing angle of magnetic field. The mea- sured angle is monitored to determine a passing or failing device. CVH self-test typically takes 30 ms to verify. Self-test can be run on power-up, by setting the EEPROM field SHA.COM.cse = 1 Self-test can also be invoked via the serial control register by issuing the corresponding “special” command. The test is complete when either:

• “STA.sdn” = 1 (special done) or
• “STA.cstr” = 0 (CVH self-test not running). Failure is indicated by:
• “ERR.stf” = 1 (assuming it was cleared before test was run).

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Magnetic Target Requirements The AAS33051 is designed to operate with magnets constructed with a variety of magnetic materials, geometries, and field strengths. See Table 15 for a list of common magnet dimensions. The AAS33051 actively measures and adapts to its magnetic environment. This allows operation throughout a large range of field strengths (recommended range is 300 to 1000 G, operation beyond this range will not result in long term damage). Due to the greater signal-to-noise ratio provided at higher field strengths, performance inherently increases with increasing field strength. Table 15: Target Magnet Parameters Magnetic Material Diameter (mm) Thickness (mm) Neodymium (sintered)* 10 2.5 Neodymium (sintered) 8 3 Neodymium / SmCo 6 2.5 N S Thickness Diameter * A sintered Neodymium magnet with 10 mm (or greater) diameter and 2.5 mm thickness is the recommended magnet for redundant applications. 1600 1400 1200 1000 800 600 400 200 Air Gap (mm) SmCo24 NdFe30 Ceramic (Ferrite) Magnetic Field (G) Figure 39: Magnetic Field versus Air Gap for a magnet 6 mm in diameter and 2.5 mm thick. Allegro can provide similar curves for customer application magnets upon request. Allegro recommends larger magnets for applications that require optimized accuracy performance.

APPLICATION INFORMATION

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Zener Diode (for protection) To WAKE Pin Schottky Diodes 3-Phase “Star” Motor Winding BYP CSB SCLK MOSI MISO WAKE VCC PWM A / U B / V I / W GND Sensor 100 Ω, use only if supplied by car battery and voltage drop can be tolerated 100 nF 100 nF Supply or battery WAKE circuit - optional Micro Controller CSB SCLK MOSI MISO GPIO-out Float if unused Float if unused Float if unused Float if unused Typical SPI and ABI/UVW Applications Below, typical application diagrams for SPI and ABI/UVW are given. Programming and controlling are possible using the SPI interface and the Manchester interface. The Manchester program- ming interface is useful for low pin count applications (e.g. ABI). See “Manchester Interface” section for details on programming with this interface. Notes:

• PWM and ABI/UVW can be used in parallel to the SPI interface.
• Entering and exiting low power mode is controlled using the SPI lines.
• The WAKE pin does not have to be used, but should be grounded if unused. Figure 40: Typical SPI Application Diagram

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Figure 41: Typical ABI / UVW Application Diagram Zener Diode (for protection) To WAKE Pin Schottky Diodes 3-Phase “Star” Motor Winding BYP CSB SCLK MOSI MISO WAKE VCC PWM A / U B / V I / W GND Sensor 100 Ω, use only if supplied by car battery and voltage drop can be tolerated 100 nF 100 nF Supply or battery WAKE circuit - optional Micro Controller PWM in (GPIO) A/U in (GPIO) B/V in (GPIO) I/W in (GPIO) GPIO-out Logic High Level Float Notes:

• Entering and exiting low power mode is controlled using the CSB, MOSI, and SCLK line. It is possible to connect CSB, MOSI, and SCLK together and connect them to the microcontroller on one line to control entering/exiting low power mode if required.
• PWM output can be left floating if not required. The absolute position is transferred through ABI pins after power on, so that PWM information is not needed to find the start position. The AAS33051 is different from the A1339 in this regard.
• For programming the sensor, CSB and MOSI determine the slave address. Read the Manchester Interface section for more details.
• If not needed by the host, any of the ABI outputs can be left floating. For example, □ If only rotational frequency is needed, only pin A could be used. □ If frequency and position is needed, but direction is always the same, only pin B and I could be used.

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com I/O STRUCTURES 33 Ω A/U, B/V, I/W PWM 33 Ω SCK/CSN/MOSI 1 kΩ WAKE 1 kΩ 1 MΩ VPOS VREF

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com PACKAGE OUTLINE DRAWINGS Figure 42: Package LP, 24-Pin TSSOP with Exposed Thermal Pad For Reference Only –N ot for Tooling Use (Reference MO-153 ADT) NOT TO SCALE Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A

1.20 MAX

0.15 0.00 0.30 0.19 0.20 0.09 0.60 ±0.15 1.00 REF C SEATING PLANE C0.10 24X

0.65 BSC

0.25 BSC

7.80 ±0.10 GAUGE PLANE SEATING PLANE B

4.32 NOM

3 NOM

0.65 6.103.00 4.32 1.65 0.45 C PCB Layout Reference View A C E Hall elements (E1, E2), corresponding to respective die; not to scale. D Branding scale and appearance at supplier discretion. F Terminal #1 mark area. Reference land pattern layout (reference IPC7351 TSOP65P640X120-25M); all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5). Active Area Depth. F1: 0.47 mm; F2: 0.62 mm. D Standard Branding Reference View B Exposed thermal pad (bottom surface); dimensions may vary with device. EE1 2.20E E 3.90 Lines 1, 2, 3: Maximum 9 characters per line Line 1: Part number Line 2: Logo A, 4-digit date code Line 3: Characters 5, 6, 7, 8 of Assembly Lot Number XXXXXXXXX Date Code Lot Number F F1 F F2

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Figure 43: Package LE, 14-Pin TSSOP For Reference Only – Not for Tooling Use (Reference DWG-2870) Dimensions in millimeters – NOT TO SCALE Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A B B Branding scale and appearance at supplier discretion. Hall element (D1); not to scale. C D 6.00 0.650.45 1.70 2 1 C PCB Layout Reference View Standard Branding Reference View Lines 1, 2: Maximum 7 characters per line Line 3: Maximum 5 characters per line Line 1: Part number Line 2: Logo A, 4-digit date code Line 3: Characters 5, 6, 7, 8 of Assembly Lot Number Terminal #1 mark area. Reference land pattern layout (reference IPC7351 TSOP65P640X120-14M); All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5). XXXXXXX Date Code Lot Number A

1.10 MAX

0.15 0.00 0.95 0.85 0.30 0.19 0.20 0.09 0.60

1.00 REF

C SEATING PLANE C0.10 16X 5.00 ±0.10 4.40 ±0.10 6.40 BSC GAUGE PLANE SEATING PLANE D D D Branded Face +0.15 –0.10 2.50 2.20 D D1 DD 1 E Active Area Depth 0.36 mm.E

Precision Angle Sensor IC with Incremental and Motor Commutation Outputs and On-Chip LinearizationAAS33051 Allegro MicroSystems, LLC Manchester, NH 03103-3353 U.S.A. www.allegromicro.com For the latest version of this document, visit our website: www.allegromicro.com

Revision History

– March 27, 2018 Initial release

1 April 18, 2018 Corrected selection guide part numbers

2 August 29, 2018 Updated Terminal List table (page 4)

Copyright ©2018, Allegro MicroSystems, LLC Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of Allegro’s product can reasonably be expected to cause bodily harm. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. Copies of this document are considered uncontrolled documents.