A8500

A8500 ALLEGRO

Document overview

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Technical content

EN pin dimming: serial pulse train input VEN IOUT PWM pin dimming: digital PWM input IOUT VPWM IOUT VAPWM APWM pin dimming: analog PWM input FSET COMP ISET RISET RFSET APWM LED1 LED3 LED5 LED7 LGND SKIP CC VIN SW SW OVP COUT VIN ROVP D1VS

5 V ±10%

1 µF/ 25 V CIN 0.1 µF/ 10 V 2.2 µF 50 V 10 µH A8500 LED8 LED6 LED4 LED2 SEL1 SEL2 SEL3 EN PWM AGND PGND Approximate Scale 1:1 Typical Application

Description

The A8500 is a multi-output WLED driver for medium display backlighting. The A8500 integrates a boost converter and eight current-sinks to provide a flexible WLED/RGB backlight driver. The boost converter can provide output voltage up to 47 V . The flexible channel selection control and high voltage capability allow a wide range of LED backlight applications. The A8500 can support any application requiring 4 to 96 WLEDs. The boost converter is a constant frequency current- mode converter. Each LED channel can sink 30 mA, and channels can be paralleled for higher currents. Flexible dimming allows output channels to either run at an adjustable DC value or with externally controlled PWM duty cycles. The A8500 is available in a 26 pin, 4 mm × 4 mm QFN/MLP package that is only 0.75 mm nominal in height. Applications include: ▪ Thin notebook displays ▪ LCD TV ▪ RGB backlight ▪ GPS systems ▪ Portable DVD players 8500-DS Features and Benefits ▪ Active current sharing between LED strings for ±1.5% typical current matching and ±1.2% typical accuracy ▪ Drive up to 12 series × 8 parallel = 96 LEDs (Vf = 3.2 V , If = 20 mA) ▪ Flexible dimming, using alternative methods: ▫ LED duty cycle control (PWM pin) ▫ DC current using serial programming (EN pin) ▫ DC current using external PWM signal (APWM pin) ▫ An external resistor ▪ Boost converter with integrated 50 V, 2 A DMOS ▪ LED sinks rated for 30 mA ▪ 200 kHz to 2 MHz switching frequency ▪ Open LED disconnect ▪ Boost current limit, thermal shutdown, and soft start ▪ No audible ceramic capacitor noise during PWM dimming ▪ Adjustable overvoltage protection (OVP) ▪ No pull-up resistors required for LED modules that use ESD capacitors Flexible WLED/RGB Backlight Driver for Medium Size LCDs Package: 26 pin QFN/MLP (suffix EC) A8500 Figure 1. LCD monitor backlight, driving 96 LEDs. LED Vf = 3.2 V, 20 mA per LED string. Overvoltage for EN, PWM, and APWM control. See also: Recommended Components table, page 14.

Flexible WLED/RGB Backlight Driver for Medium Size LCDsA8500 2Allegro MicroSystems, Inc.

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com Selection Guide Part Number Package Packing* A8500EECTR-T 4 mm × 4 mm QFN/MLP 1500 pieces / 7-in. reel *Contact Allegro for additional packing options Absolute Maximum Ratings Characteristic Symbol Notes Rating Units SW and OVP Pins –0.3 to 50 V LED1 through LED8 Pins –0.3 to 23 V VIN Pin VIN –0.3 to 6 V Remaining Pins –0.3 to VIN+ 0.3 V Operating Ambient Temperature TA Range E –40 to 85 ºC Maximum Junction Temperature TJ(max) 150 ºC Storage Temperature Tstg –55 to 150 ºC Package Thermal Characteristics* Characteristic Symbol Note Rating Units Package Thermal Resistance RθJA Measured on 3 in. × 3 in., 2-layer PCB 48.5 °C/W *Additional information is available on the Allegro website Device package is lead (Pb) free, with 100% matte tin leadframe plating.

Flexible WLED/RGB Backlight Driver for Medium Size LCDsA8500 3Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com LGND PGND COMP CC CIN ISET APWM LED1Current Sinks PGND LED3 LED5 LED7 LGND SKIP FSET RFSET RISET VIN 10 µH SW CBAT SW OVP ROVP VOUTD1 COUT VIN 100 kΩ EN 100 kΩ 100 kΩ 100 kΩ AGND Q S R Reference and Soft Start On/Off Serial Interface PWM Generator IOUT_SET Amp Feedback Loop Functional Block Diagram

Flexible WLED/RGB Backlight Driver for Medium Size LCDsA8500 4Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com ELECTRICAL CHARACTERISTICS, valid at TA = –40°C to 85°C, typical values at TA = 25°C, VIN = 5 V, unless otherwise noted Characteristics Symbol Test Conditions Min. Typ. Max. Units Input Voltage Range VIN 4.2 – 5.5 V Undervoltage Lockout Threshold VUVLO VIN falling – – 4 V UVLO Hysteresis Window VUVLOhys – 0.2 – V Supply Current ISUP Switching at no load, TA = 25°C – 5 – mA Shutdown EN = PWM = APWM = VIL – 0.1 1 µA APWM Frequency Range fAPWM 20 – 2000 kHz Error Amplifier Error Amplifier Open Loop Gain AVEA – 60 – dB Error Amplifier Unity Gain Bandwidth UGBEA – 3 – MHz Error Amplifier Transconductance GmEA ∆ICOMP = ±10 µA – 850 – µA/V Error Amplifier Output Sink Current IEAsink VLED1-8 = 1 V – 280 – µA Error Amplifier Output Source Current IEAsource VLED1-8 = 0 V – –280 – µA Boost Controller Switching Frequency fSW RFSET = 13 kΩ, SKIP = VIL 1.8 2 2.2 MHz RFSET = 26.1 kΩ, SKIP = VIL – 1 – MHz RFSET = 32.4 kΩ, SKIP = VIH – 200 – kHz Minimum Switch Off-Time tOFFmin – 70 – ns Logic Input Levels (APWM , EN, MODE, PWM, SELx, and SKIP pins unless otherwise specified) Input Voltage Level Low VIL – – 0.4 V Input Voltage Level High VIH 1.5 – – V Input Leakage Current (APWM, EN, PWM, and SKIP pins) IIleak VI(pin) = 5 V, TA = 25°C – – 100 µA Input Leakage Current (SELx pins) ISELleak – – 1 µA Over Voltage Protection (OVP) Output Overvoltage Rising Limit VOVP 28 – 32 V OVP Sense Current IOVPH – 54.9 – µA OVP Release Current IOVPL – 47.8 – µA OVP Leakage Current IOVPleak VVOP = 21 V – 0.1 – µA Boost Switch Switch On Resistance Rds(on) ISW = 1.5 A – 225 – mΩ Switch Leakage Current ISWleak VSW = 5 V, TA = 25°C – – 1 µA VSW = 21 V – 1 – µA Switch Current Limit ISWlim 1.8 2 – A Continued on the next page…

Flexible WLED/RGB Backlight Driver for Medium Size LCDsA8500 5Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com LED Current Sinks LEDx Regulation Voltage VLEDx – 500 – mV ISET to ILEDx Current Gain AISET ISET = 100 µA – 210 – – Voltage on ISET Pin VISET – 1.23 – V ISET Allowable Current Range ISET 40 – 150 µA LEDx Accuracy ErrLEDx RISET = 12 kΩ; 100% current ratio, measured as average of LED1 to LED8; LED1 to LED8 = 0.5 V – ±1.2 – % LEDx Matching ∆LEDx ISET = 100 µA , 100% current ratio; LED1 to LED8 = 0.5 V – ±1.5 – % LEDx Switch Leakage Current ILSleak5 VLEDx= 5 V, EN = PWM = APWM = 0, TA = 25°C – – 1 μA LEDx Switch Leakage Current ILSleak21 VLEDx= 21 V, EN = PWM = APWM=0 – 1 – μA Serial Pulse Timing (see figure 4 for further explanation) EN Pulse Low Time tLO 0.5 – 100 μs EN Pulse High Time tHI 0.5 – 100 μs Initial EN or APWM Pulse High Time (rela- tive to switching period) tHI(init) First EN or APWM pulse after shutdown SKIP = Low – 256 – Switching Pulses SKIP = High – 64 – Switching Pulses Level Change Delay (relative to switching period) tHID SKIP = Low – 256 – Switching Pulses SKIP = High – 64 – Switching Pulses Shutdown Delay (relative to switching period on EN or APWM) tSHDN Falling edge of EN or APWM pulse SKIP = Low – 256 – Switching Pulses SKIP = High – 64 – Switching Pulses Soft Start Soft Start Boost Current Limit ISWSS Initial soft start current for boost switch - 1 - A Soft Start LEDx Current Limit ILEDSS Current through enabled LEDx pins during soft start, RISET=12 kΩ - 1.25 - mA Thermal Shutdown Threshold TSHDN 40°C hysteresis – 165 – °C ELECTRICAL CHARACTERISTICS (continued), valid at TA = –40°C to 85°C, typical values at TA = 25°C, VIN = 5 V, unless otherwise noted Characteristics Symbol Test Conditions Min. Typ. Max. Units

Flexible WLED/RGB Backlight Driver for Medium Size LCDsA8500 6Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com VBAT (V) 8.5 17.6 ILED(mA) 0 20 40 60 80 100 Eff (%) Duty Cycle (%) Eff (%) VIN (%) VBAT (V) 8.5 17.6 100 0 20 40 60 80 100 Eff (%) Duty Cycle (%) VBAT (V) 8.5 17.6 100 0 20 40 60 80 100 Eff (%) Duty Cycle (%) VBAT (V) 8.5 17.6 0 20 40 60 80 100 Eff (%) Duty Cycle (%) APWM Efficiency VIN = 5 V, 6 ch. with 7 LEDs per ch., 20 mA per ch., fSW = 1 MHz APWM Efficiency VIN = 5 V, 6 ch. with 7 LEDs per ch., 20 mA per ch., fSW = 2 MHz Efficiency versus Input Voltage with EN Dimming VIN = VBAT, 8 ch. with 8 LEDs per ch., fSW = 1 MHz Performance Characteristics Efficiency with EN dimming is similar to that with APWM dimming. APWM light load efficiency can be improved by reducing boost switching frequency with SKIP set high. PWM Efficiency VIN = 5 V, 6 ch. with 7 LEDs per ch., 20 mA per ch., fSW = 1 MHz PWM Efficiency VIN = 5 V, 6 ch. with 7 LEDs per ch., 20 mA per ch., fSW = 2 MHz

Flexible WLED/RGB Backlight Driver for Medium Size LCDsA8500 7Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com EN Pin Turn On VIN = VBAT = 5 V; 8 ch., 8 LEDs per ch. EN Pin Turn Off VIN = VBAT = 5 V; 8 ch., 8 LEDs per ch. Performance Characteristics Symbol Parameter Units/Division C1 EN 5 V C2 IOUT 100 mA C3 VOUT 10 V C4 IIN 1 A t time 500 µs EN IOUT VOUT IIN Symbol Parameter Units/Division C1 EN 5 V C2 IOUT 100 mA C3 VOUT 10 V C4 IIN 1 A t time 100 µs EN IOUT VOUT IIN PWM Turn On at 50% Duty Cycle VIN = VBAT = 5 V; 8 ch., 8 LEDs per ch. PWM Turn On at 5% Duty Cycle VIN = VBAT = 5 V; 8 ch., 8 LEDs per ch. Symbol Parameter Units/Division C1 PWM 5 V C2 IOUT 100 mA C3 VOUT 10 V C4 IIN 1 A t time 5 ms PWM IOUT VOUT IIN Symbol Parameter Units/Division C1 PWM 5 V C2 IOUT 100 mA C3 VOUT 10 V C4 IIN 1 A t time 10 ms PWM IOUT VOUT IIN APWM Turn On at 50% Duty Cycle FAPWM=100 kHz Symbol Parameter Units/Division C1 APWM 5 V C2 IOUT 100 mA C3 VOUT 10 V C4 IIN 1 A t time 200 µs APWM IOUT VOUT IIN t t t t t

3.2 V , If = 20 mA), or 8 WLEDs in 8 series at 20 mA per LED

mally, without excessive power dissipation. AGND pins, and with the SKIP pin set to logic low (see figure 2). connected to logic low, switching frequency is as set by RFSET. improve efficiency at light loads. formance for the desired application. to table 1 for further description. where ISET is in mA and RISET is in kΩ. Table 1. LEDx Channel Enable Table Figure 2. Switching frequency setting by value of RFSET.

of the value of RISET are shown in figure 3. analog dimming with an external PWM signal on the APWM pin. Note: Only one dimming technique can be used at a time. A8500 begins evaluating pulse patterns applied on the EN pin. continues to count if additional pulses are applied. Figure 3. Effect of value of RISET on (A) “100% current” level, and Table 2. Serial Dimming Levels *The counter resets on the sixteenth pulse. Figure 4. Timing diagram for serial dimming.

10Allegro MicroSystems, Inc. Figure 5. Serial dimming response. The numbers indicate the quantity of EN pulses at each step. Figure 6. Timing diagram for dimming using the PWM pin. Figure 8. PWM pin dimming linearity. Figure 7. PWM pin dimming fPWM = 200 Hz, Duty Cycle =10%. to 0 and begins counting pulses again at the next valid pulse. verter continues to work in normal fashion.

11Allegro MicroSystems, Inc. boost current and the LEDx pin currents are set to 100% current. immediately when PWM goes low. soft start routine similar to serial dimming. tion temperature falls by 40°C. the OVP pin exceeds 54.9 µA, the OVP comparator goes high. When the OVP pin current falls below 47.8 µA, OVP is reset. Figure 9. APWM pin dimming linearity. Figure 10. Overvoltage protection circuit. Three alternative

12Allegro MicroSystems, Inc. sink current up to the programmed current level. a short length of time, or reach OVP level on a transient event. OVP event occurs on any other LEDx pin. Figure 11. Open LED fault protection.

Flexible WLED/RGB Backlight Driver for Medium Size LCDsA8500 13Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com EN PWM FSET COMP ISET RISET RFSET RA VA CC LED1 LED3 LED5 LED7 LGND VIN SW SW OVP COUTROVP VS

Application Information

Figure 12. Typical application circuit for PWM dimming, using digital PWM (on the Figure 13. Configuration for 1000:1 dimming. Figure 14. Typical accuracy, normalized to the 100% current level, versus dimming level, with FPWM = 100 Hz. applied to the ISET pin through a resistor, RA. ISET = VSET / RSET – (VA – VSET) / RA . changed in the range from 40 µA to 150 µA. dimmed by applying 100% to 0.35% duty cycle on the PWM pin.

14Allegro MicroSystems, Inc. Figure 16. Typical application circuit for LED modules with ESD capacitors. Figure 15. Typical application circuit for PWM dimming, using digital PWM (on the

Flexible WLED/RGB Backlight Driver for Medium Size LCDsA8500 15Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com Number Name Description 1 PGND Power ground pin. 2 SKIP Reduces boost switching frequency in case of light load to improve frequency. Normally, this pin should be low; when high, fSW is divided by 4. 3 COMP Compensation pin; connect external compensation network for boost converter. 4 FSET Sets boost switching frequency. Connect RFSET from FSET to GND to set frequency. Range for RFSET is 13 to 40 kΩ. 5 ISET Sets 100% current through LED string. Connect RISET from ISET to GND. Range for RISET is 8.2 to 30 kΩ. 6 APWM On/off and analog LED current control with external PWM. Apply logic level PWM (1.2 V < VIH < 5 V) for PWM controlled dimming mode. When unused, connect to AGND.

7 LED1

LEDx capable of 30 mA.8 LED3

9 LED5

10 LED7

11 LGND Power ground pin for LED current sink.

12 LED8

LEDx capable of 30 mA.13 LED6

14 LED4

15 LED2

16 SEL1

SEL1, SEL2, and SEL3 decide active LED strings.17 SEL2

18 SEL3

19 EN On/off and serial dimming control. EN high enables IC and EN low disables IC. This pin can also be used to program LEDx current. When unused, connect to AGND. 20 PWM On/off and on/off LED current control with external PWM. Apply logic level PWM for PWM controlled dimming mode. When unused, connect to AGND. 21 PGND Power ground pin. 22 OVP Connect to this pin to output capacitor +Ve node through a resistor to enable OVP (overvoltage protection). Default OVP level with 0 Ω resistor is 30 V, and it can be programmed up to 47 V. 23 SW DMOS drain node.24 SW 25 VIN Input supply for the IC. Decouple with a 0.1 µF ceramic capacitor. 26 AGND Circuit ground pin. – EP Exposed pad. Electrically connectred to PGND and LGND; connect to PCB copper plane for heat transfer. Terminal List Table EP AGND VIN SW SW OVP LED3 LED5 LED7 LGND LED8 LED6 LED4 PGND PWM EN SEL3 SEL2 SEL1 LED2 PGND SKIP COMP FSET ISET APWM LED1 (Top View) Pin-out Diagram

Flexible WLED/RGB Backlight Driver for Medium Size LCDsA8500 16Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com Package EC, 4 × 4 mm 26-Pin QFN/MLP 4.0 NOM .157 4.0 NOM .157 0.20R REF .008 0.20 NOM .008 0.40 NOM .016 0.95 NOM .037 4X0.20 MIN .008 12X0.20 MIN .008 A B 0.80 0.70 .031 .028 0.05 0.00 .002 .000 0.20 REF .008 CSEATING PLANEC0.08 [.003] 26X 26X 0.07 [.003] M C A B 0.05 [.002] M C 0.25 0.15 .014 .010 0.50 0.30 .020 .012 4.10 3.90 .161 .154 4.10 3.90 .161 .154 0.40 .016 A Terminal #1 mark area B Exposed thermal pad (reference only, terminal #1 identifier appearance at supplier discretion) All dimensions reference only, not for tooling use (reference JEDEC MO-220WGGE) Dimensions in millimeters U.S. Customary dimensions (in.) in brackets, for reference only Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown C C Reference land pattern layout (reference IPC7351 QFN40P400X400X80-29M); adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5) (Top View) (Pads on PCB) (Bottom View) 1.23 NOM .048 1.10 NOM .043 1.23 NOM .048 1.10 NOM .043 2.45 NOM .096 2.45 NOM .096 B 4X 0.20 MIN .008 For the latest version of this document, visit our website: www.allegromicro.com Copyright ©2006, 2007, Allegro MicroSystems, Inc. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to per- mit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use.